PHASE VARIABLE SPEED MOTOR CONTROLLER aMC8500 full featured monol
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aMC8500
PHASE VARIABLE SPEED MOTOR CONTROLLER
aMC8500 full featured monolithic brushless motor controller containing required functions implement speed control. This device features selectable slope pulse width modulator (PWM) efficient speed control with analog digital control signal compatibility, programmable minimum speed setting, Hall amplifier with propriety noise immunity circuitry proper drive sequencing, fixed non-overlapping commutation delay reduced supply current spiking, dual on-chip power MOSFETs with thermal protection direct motor drive, programmable cycle-by-cycle current limiting, internal fault timer with auto start retry, motor kick start timer insure start combined frequency generator rotor lock output, uncommitted with reference thermal sensor voltage scaling, selectable automatic current power down mode power sensitive applications.
PRODUCT SPECIFICATION
Configuration
Phase Output Current Limit Hall
Phase Output
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Freq Gen. Rotor Lock Slope Select Power Ground Signal Ground Speed Control Input Output
Hall Reference Output Minimum Speed Non-Inverting Input Inverting Input
aMC8500
Features
Analog digital speed control signal compatibility Programmable minimum speed setting Selectable speed control slope Latching enhanced noise immunity Integrated fault timer with auto start retry Motor kick start timer Combined frequency generator rotor lock output Differential unbuffered digital Hall compatibility Hall amplifier with propriety noise immunity circuitry Pinned reference Uncommitted thermal sensor voltage scaling Fixed non-overlapping commutation delay Dual on-chip MOSFET motor drives Programmable cycle-by-cycle current limit protection Thermal shutdown protection Under voltage lockout protection Selectable automatic current power down mode Personal computer fans Workstation mainframe fans server blowers Industrial control system fans Telcom system fans Instrumentation test measurement fans Card rack fans
Application Diagram
Ref. Non-Inv. Inv. Output
Output
Reference Fault Timer Commutation Logic Motor Drive
Applications
Minimum Speed Speed Control
Logic
Current Limit
Current Limit
Slope Select
Signal
Power
Ordering Information
Part Number
aMC8500DE16 aMC8500QS16
Ayww Assembly site year workweek
Package
SOIC Lead Exposed QSOP Lead
Operating Junction Temperature Range
-40°C 125°C
Marking
aMC8500 Ayww
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aMC8500
Absolute Maximum Ratings (Note
Parameter Power Supply Voltage (Pin Hall Input Voltage Range (Pin Speed Control Input Voltage Range (Pin Minimum Speed Input Voltage Range (Pin Reference Output Load Current (Pin Input Voltage Range (Pin Symbol VIR(Hall) VIR(S) VIR(MSS) IO(Ref) VIR(OA) VOR(OA) IO(OA) VIR(LS) VIR(ILim) VOR(FG/RL) ISink(FG/RL) Rating -0.3 -0.3 -0.3 -0.3 Internally Limited -0.3 -0.3 -0.3 VREF -0.3 VREF -0.3 -0.3V -1.5 Unit
Preliminary Specification Subject change without notice
Output (Pin Note Voltage Range Source Sink Current Slope Select Input Voltage Range (Pin Current Limit Input Voltage Range (Pin Frequency Generator Rotor Lock Output (Pin Voltage Range Sink Current Drive Outputs (Pin Note Voltage Range Sink Current Source Current Thermal Characteristics SOP-16 Exposed Package Thermal Resistance, Junction Thermal Resistance, Junction QSOP-16 Package Thermal Resistance, Junction Operating Junction Temperature Range Storage Temperature Range Reflow Peak Temperature Lead Soldering Temperature sec) Electrostatic Discharge (Note Human Body Model Machine Model
Preliminary Specification Subject change without notice
°C/W
TJ(max) Tstg Treflow Tlead
-40°C -60°C 2000
Notes: Absolute maximum ratings limits beyond which operation cause permanent damage device. These stress ratings only. Functional operation above these limits implied. Human Body Model: capacitor discharged through resistor into each pin. Machine Model: capacitor discharged directly into each pin. These specifications guaranteed only test conditions listed. Maximum package power dissipation limits must observed.
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aMC8500
Electrical Characteristics
25°C, unless otherwise noted. Specifications subject change without notice [Note 3].) Parameter SPEED CONTROL (Pin MINIMUM SPEED (Pin Input Threshold Voltage Drive Conduction 100% Drive Conduction Open Drive Conduction 100% Drive Conduction Speed Control Input Threshold Voltage Power Down (IO(ref) Input Voltage Below Drive Conduction, Vth(0%), Input Voltage Above Drive Conduction, Vth(0%), Open Speed Control Input Signal Transition Time Maximum allowable rise fall time digital control Input Bias Current, (Vin Modulation Frequency SLOPE SELECT (Pin Input Threshold Voltage State Increasing voltage causes increase drive conduction High State Increasing voltage causes decrease drive conduction State Input Pull-Up Current (VIL(S) HALL AMPLIFIER (Pin Input Differential Voltage Sensitivity Required signal level enable drive commutation Input Hysteresis Voltage (Vin Input Resistance Input Common Mode Voltage Range (Pin Input Offset Voltage (Vin 3.5V) Input Bias Current (Vin Gnd) Input Common Mode Voltage Range Open Loop Voltage Gain Gain Bandwidth Product kHz) Output Voltage Swing High State (Isource Gnd) State (Isink VDD) VICM(OA) AVOL VOH(OA) VOL(OA) -1.5 VID(Hall) VIH(Hall) RIN(Hall) VICM(Hall) -0.3 +0.3 mVpp VIL(S) VIH(S) II(S) Vth(0%) (100%) Vth(0%) Vth(100%) Vth(PD) tr/tf fPWM 0.95 2.85 2.85 0.95 1.05 3.15 3.15 1.05 Symbol Units
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
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REFERENCE (Pin Output Voltage Line Regulation (VDD Load Regulation (VDD Short Circuit Current (Note Reference Output Load Current Automatic Power Down Feature (Pin Gnd, 2.0s) (Pin Open, 2.0s) Enabled Disabled FAULT TIMER Drive Enabled Time During Fault Condition Drive Disabled Time Before Restart KICK START TIMER Motor Kick Start Time (100% duty cycle applied) FREQUENCY GENERATOR ROTOR LOCK (Pin State Output Sink Voltage (Isink Off-State Leakage Current (Voff Minimum Hall Frequency Rotor Lock Output High State MOTOR DRIVES (Pin State Output Voltage (Isink Off-State Leakage Current (Voff Current Limit Threshold (Pin open, Note Non-Overlapping Commutation Delay TOTAL DEVICE (Pin Power Supply Threshold Voltage Start-Up (VDD increasing) Hysteresis (VDD decreasing after turn-on) Power Supply Current Operating Power Down (Pin IO(ref) 2.0s, Gnd) Vth(on) IS(PwrDn) VOL(Drv) Ioff(Drv) ILim tdly(Com) 1100 1300 VOL(FG/RL) Ioff(Tach) fRL(min) 0.13 0.25 ton(KS) ton(Flt) toff(Flt) 0.25 Vref Refline Refload IO(PD) 3.325 3.675
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
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%ton, Motor Drives Percent On-Time
%ton, Motor Drives Percent On-Time
Figure Motor Drives Percent On-Time versus Speed Control Input Voltage
Kick Start sec. Motor remains speed setting. Auto power down disabled. IO(Ref) 25°C
Figure Motor Drives Percent On-Time versus Speed Control Input Voltage
Kick Start sec. Motor remains speed setting. Auto power down disabled. IO(Ref)
Minimum speed shown
Open 25°C
Preliminary Specification Subject change without notice
Motor turns on/off speed setting. Auto power down enabled after sec. IO(Ref)
Motor turns on/off speed setting. Auto power down enabled after sec. IO(Ref)
Minimum speed shown
Preliminary Specification Subject change without notice
Vin(SC), Speed Control Input Voltage
Vin(SC), Speed Control Input Voltage
Figure Small Signal Transient Response
+1.0 25°C
Figure Large Signal Transient Response
+1.0 25°C
Output Voltage
Output Voltage
2.05
1.95
s/Division
s/Division
VOL(FG/RL), State Output Voltage
VO(OA), Output Voltage -1.0 -2.0
Figure Source Sink Output Voltage versus Current
High state output Load ground 25°C
Figure Frequency Generator Rotor Lock State Output Voltage versus Sink Current
25°C
state output Load
Output Load Current (mA)
Isink, Sink Current (mA)
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aMC8500
Vref, Reference Output Voltage Change (mV)
25°C
Vref, Reference Output Voltage
Figure Reference Output Voltage Change versus Output Source Current
Figure Reference Output Voltage versus Power Supply Voltage
-8.0
25°C
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Reference Output Source Current (mA)
VDD, Power Supply Voltage
VOL(Drv), State Voltage
25°C
Ron, Drive Output Resistance
Figure Phase Phase Drive Output State Voltage versus Sink Current
Figure Phase Phase Drive Output Resistance versus Power Supply Voltage
ISink 25°C
Isink, Sink Current
VDD, Power Supply Voltage
Figure Phase Phase Current Limit Threshold versus Programming Voltage Ilim, Current Limit Threshold Vpgm, Programming Voltage, Ilim, Current Limit Threshold
CPin 25°C
Figure Programming Resistance versus Current Limit Threshold
CPin 25°C
Rpgm, Programming Resistance
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aMC8500
Figure Representative Block Diagram
Hall Input
Hall Input
Phase Output
Phase Output
Reference Output
Reference
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation Fault Timer Power Down Kick Start
Motor Drives
Preliminary Specification Subject change without notice
Non-Inverting Input Inverting Input Output Minimum Speed Input
Frequency Generator Rotor Lock Output
Preliminary Specification Subject change without notice
Thermal Shutdown Current Limit Latch
Oscillator
Speed Comparator Comparator Logic
Power Ground
Speed Control Input
Current Limit Comparator Current Limit
Digital Detector
Signal Ground
Slope Select
INTRODUCTION aMC8500 full featured phase half wave variable speed brushless motor controller containing required functions implementing control system. Motor control features consists selectable slope pulse width modulator (PWM) with double pulse suppression efficient speed control that compatible with analog voltage varying duty cycle digital pulse train, programmable minimum speed input, uncommitted with pinned reference speed control signal scaling, Hall sensor amplifier with propriety noise immunity circuitry proper drive sequencing, non-overlapping commutation drive reduced supply current spiking, on-chip power MOSFETs direct coil drive. Protective diagnostic features include internal fault timer with auto start retry, motor kick start timer insure proper start programmable cycle-by-cycle current limiting, power supply under voltage lockout, over temperature thermal shutdown, combined frequency generator rotor lock output status reporting. Also included selectable automatic current power down mode aimed power sensitive applications. aMC8500 designed thermal open closed loop systems. controlled simple thermistors, Simistorsilicon temperature sensors, complex digital microcontroller based temperature monitors. FUNCTIONAL DESCRIPTION representative block diagram shown Figure detailed discussion each functional blocks features given following sections. complete list functions with brief description shown Figure
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Preliminary Specification Subject change without notice
Speed Control Motor speed efficiently controlled with pulse width modulation, PWM. voltage applied Speed Control Input, provides control motor speed varying drive percent on-time conduction time Phase Phase outputs during commutation cycle. control signal form analog voltage ranging from variable duty cycle digital pulse train having state maximum 0.98 high state minimum 3.02 with maximum transition times control signal transfer slope Speed Control Input voltage drive percent on-time, controlled Slope Select input, When connected ground, increase control voltage digital high state results increase drive output on-time. When unconnected, increase control voltage digital high state results decrease drive output on-time. Minimum Speed Input made available control transfer slope that identical that designed programmed form analog voltage that ranges from which derived from Reference. minimum speed programmed this input will take control motor speed greater than speed being requested Speed Control input. When directly controlling motor speed from variable duty cycle digital pulse train, minimum speed feature available comparator input must disabled. method preserving this feature shown Figure Figure shows Motor Drives percent on-time versus Speed Control input voltage with connected ground positive slope control. Notice that there defined outcomes when Speed Control input voltage falls below that Minimum Speed Set. first that motor continuously runs programmed minimum speed setting this selected loading Reference with more disable auto Power Down. second outcome that motor turns after second this selected loading Reference with less enable auto Power Down. This gives designer choice between letting motor minimum speed stop running when Speed Control falls below programmed minimum speed setting. Figure shows Motor Drives percent on-time versus Speed Control input voltage with unconnected negative slope control. minimum speed operating characteristics selected same manner above with defined outcomes occurring when Speed Control input voltage rises above that Minimum Speed Set. speed control minimum speed operations shown table form Figure Compatibility with both analog digital control signals combined with ability select both transfer slope automatic power down, allows this device interface into vast array applications. Figure Speed Control Minimum Speed Operation
Speed Control Input Signal >1.0 <3.0 Voltage <1.7 >1.7 Positive Pulse >3.0 Pulse <0.98 >3.02 <3.0 >1.0 Voltage >2.3 <2.3 Negative Pulse <1.0 Pulse >3.02 <0.98 Minimum Speed Input (Disabled)
Preliminary Specification Subject change without notice
Controlling Input
Slope Select
Motor Drive Low) Duty Cycle
Comments
Speed Control Minimum Speed Speed Control Speed Control Speed Control Minimum Speed Speed Control Speed Control
Zero speed, power down mode IO(ref) 1.0s. %ton (VSC 1.0) 0.02 Maximum speed. Speed control voltage less than minimum speed set. Speed control voltage greater than minimum speed set. Maximum speed. Positive pulse width duty cycle controlled from Zero speed, power down mode IO(ref) 1.0s. %ton (VSC 0.02) Maximum speed. Speed control voltage greater than minimum speed set. Speed control voltage less than minimum speed set. Maximum speed. Negative pulse width duty cycle controlled from
(Disabled) Tied (Disabled)
Open
Duty Cycle
Tied (Disabled)
Note that application does require programmed minimum speed controlled variable duty cycle digital pulse train, Minimum Speed comparator must disabled shown Figure applications that require speed control, device configured provide commutation only, yielding maximum motor speed without requiring additional components. This accomplished directly grounding Pins while leaving open.
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aMC8500
Hall Inputs Rotor position detected single Hall sensor enable proper motor drive commutation. Amplifier inputs designed interface with wide variety economical unbuffered 'naked' buffered 'digital' Hall sensor types. unbuffered sensors provide level differential output signal that directly proportional rotors applied magnetic field. sensor outputs connect directly inputs. Amplifier differential input sensitivity with common mode voltage range that extends from ground. extending input range include ground, need offsetting Hall output voltage with series ground resistor eliminated. Figures through show three methods biasing unbuffered Hall sensors. aMC8500 Hall Amplifier features enhanced noise rejection combining small level input hysteresis with propriety zero crossing detector timed lockout. buffered Hall sensors provide high level digital output signal that changes state direct response rotor magnetic pole transitions. This output signal single ended applied either input while biasing unused input level that within output voltage swing sensors. Economical buffered Hall sensors typically contain open collector sink only output which requires pull-up resistor. Figures show methods biasing buffered Hall sensors.
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Commutation aMC8500 features non-overlapping commutation delay circuit that prevents simultaneous drive conduction reduced power supply current spikes radio frequency interference (RFI). non-overlap delay time (tdly) internally commutation waveforms truth table shown below Figures Figure Phase, Step, Half Wave Commutation Waveforms
Hall Inputs HVClamp Rotor Electrical Position (Degrees)
Phase Drain Voltage VMotor Phase Drain Current
tdly(Com) tdly(Com)
VClamp Phase Drain Voltage VMotor Phase Drain Current FGRL Output Voltage
Full Speed (100% PWM) Reduced Speed PWM)
Figure Commutation Truth Table
Hall Inputs (Pin (Pin High High Don't care Andigilog, Inc. 2006 System Fault None None Drive Outputs Phase Phase (Pin (Pin FGRL Output (Pin High High
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Reference pinned Reference with tolerance ±5.0% made available ease implementation motor control allow additional system features. Reference used program minimum speed input, provide Hall sensor power, thermal sensor voltage scaling when used conjunction with uncommitted Amp. Reference output also provides means selectively enable disable device's automatic current power down feature. Automatic power down enabled output load current less, disabled greater. Reference source only output therefore designed sink current from higher voltage source. capable sourcing excess over temperature short circuit protection. applications that require additional current capability, output buffered with addition external transistor shown Figure This simple circuit advantage moving additional regulator power dissipation chip does maintain output short circuit protection. fully compensated with access both inputs output provided facilitate thermal sensor voltage scaling. amplifier features wide input common mode voltage range that extends from ground voltage gain gain bandwidth product. amplifier output exhibits voltage swing that extends from ground capable sinking sourcing unity gain stability when driving capacitive loads. applications where single amplifier input exceed upper level common mode voltage range, output will always maintain proper state. both inputs exceed upper level common mode voltage range, state output phase reversal occur although destructive, result unexpected system behavior. intended application does require Amp, inputs must connected fixed impedance source manner that will force output into defined state. This will prevent possibility amplifying unwanted noise which result erratic circuit behavior. Figure shows three suggested connection methods. Frequency Generator Rotor Lock Motor speed fault signals provided Frequency Generator Rotor Lock output These signals provide diagnostic information thermal system controller. During normal operation, output provides digital square wave that switches Hall sensor commutation frequency. Internally, this signal used continuously reset Fault Timer. motor encounters obstruction, decrease rotational speed will result corresponding increase time between reset pulses. this time exceeds 0.25 (ton(Flt)) fault will detected, which turn will terminate motor drive place into high state, thus indicating rotor lock condition. After time cool down period (toff(Flt)) elapsed, Fault Timer circuit will apply maximum drive attempt restart motor another 0.25 This on/off cycling will repeat indefinitely until motor restarts, commanded stop Speed Control Minimum Speed inputs. Upon successful restart, will resume switching Hall commutation rate after completion Kick Start interval. Frequency Generator Rotor Lock output consists N-channel open drain device therefore requires external pull-up resistor. internal high gain buffer with hysteresis used insure that output waveform always rectangular even when peak peak Hall output signals level. operating waveforms shown Figure Figure Frequency Generator Rotor Lock Waveforms
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Differential Hall Inputs Rotor Locked Fault Timer Fault Detected 0.25 Running Frequency Generator Rotor Lock Output Constant Speed
Possible High State Rotor Free ton(Flt) 0.25 toff(Flt) Retry Cool Down Kick Start Accelerating Constant Speed Running
Motor Drives
Cool Down
Defaults High State After Fault Detected
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Kick Start Most motors exhibit large difference between voltage required insure startup minimum speed operation. Figure shows this difference hysteretic characteristic dependent upon bearing friction, lubrication, temperature, rotor inertia. With majority motor controllers presently available, applied voltage minimum speed operation must equal greater than that required startup. This limits motors useful speed range from about percent even though most motors will operate down percent. order guarantee near minimum speed operation, mechanical startup hysteresis must overcome. This accomplished aMC8500 kick starting motor controlled manner where full power initially applied prescribed time, control then reverts back level that dictated either Speed Control Minimum Speed input. This graphically shown Figures With reliable starting guaranteed, useful speed range increased approximately 25%, yielding lower speed operation reduced acoustic noise extended motor life.
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Figure Typical Motor Startup Characteristics
%Smax, Percent Maximum Motor Speed
Kick Start Extended Speed Range
Kick Start 100% Voltage Second
Typical Useful Speed Range
Minimum Startup Speed On-Time Minimum Speed On-Time %ton, Motor Drives Percent On-Time
Kick Start time, ton(KS), internally second automatically activated whenever motor rest commanded run, when under command following events takes place: Device comes power down mode Rotor locked obstruction cleared Device recovered from thermal shutdown Device comes under voltage lockout condition
Current Limit Abnormally high drive current conditions occur motor mechanically overloaded result device drive coil overheating. During motor overload, reduction rotational speed reduces generated back electromotive force, EMF, resulting corresponding increase drive current. most severe condition occurs when rotor locked there back generated. Under this condition, drive current limited only resistance total MOSFET switch driven coil. order protect device motor from abnormally high currents, programmable Current Limit Comparator incorporated. comparator indirectly senses drive current when maximum level exceeded, motor drive on-time immediately terminated cycle-by-cycle basis either internal oscillator digital control signal applied Speed Control Input. current limit threshold defaults peak current with open. This level reduced either applying bias voltage connecting single resistor from this ground. Figures show current limit behavior while Figure illustrates biasing methods. Current Limit input high impedance most applications will require bypass capacitor prevent false triggering noise pick
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Motor Drives aMC8500 contains N-channel power MOSFETs that designed directly drive motor coils from Phase Phase outputs. drive characteristics shown Figures Each output contains zener with series diode that connects from drain gate. This configuration provides active clamp protection MOSFETs when switching inductive motor load. applications that demand driving higher current higher voltage motors, external MOSFET power transistors used. examples shown Figures Although this device designed drive phase half wave motors, method driving single phase full wave motors shown Figure inherent winding coupling that present phase motors, drain voltage phase will driven negative current will sourced from that output. This current will cause additional device heating affect operation high current motors elevated ambient temperatures. simple solution place cathode forward drop Schottky diode from each drive output ground. Likewise motor windings highly inductive, internal active clamp will required dissipate this energy which will also result additional heating. This eliminated with addition external zener diode connected from each drain ground. zener breakdown voltage should range Under Voltage Lockout Auto Power Down Under Voltage Lockout circuit been incorporated prevent erratic device operation under power supply conditions. This circuit enables Motor Drives when rises above guarantee full functionality, disables drives when falls below UVLO circuit hysteresis prevent oscillations thresholds crossed during power-up power-down. designed directly drive motors. previously discussed, device features selectable auto Power Down mode. This mode automatically entered when voltage applied Speed Control Input commands zero less than zero percent on-time. When entered, power supply current reduced from Refer Figures Thermal Shutdown Internal Thermal Shutdown circuitry provided protect device event that maximum junction temperature exceeded. When activated, typically 140°C, Motor Drive outputs disabled reduce device power dissipation. This feature intended prevent catastrophic device failures event accidental overheating. Although possible operate device above specified maximum junction temperature 125°C, this protection feature intended used substitute proper thermal system design. When junction temperature falls below 120°C, normal device operation resumes. Refer Figure
Preliminary Specification Subject change without notice
Figure Thermal Shutdown Operation
Thermal Shut Down Deactivated Motor Drives Enabled
Thermal Shut Down Activated Motor Drives Disabled
TJ(max)
Junction Temperature (°C)
SYSTEM APPLICATIONS following section shows numerous device circuit configurations several complete control solutions with brief description. clarity, many circuits show only internal functional blocks that interest with associated numbers.
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Figure Motor Supply Powered Unbuffered Hall
Asahi Kasei HW-101A
aMC8500
Figure Reference Powered Unbuffered Hall
Reference
Toshiba TSH124
Hall Amplifier Non-Overlap Commutation
Under Voltage Lockout
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
When powering unbuffered Hall sensor from motor voltage resistor required. This resistor sets Hall operating current places output within input common mode voltage range Hall Amplifier.
Unbuffered Hall sensors that require less than powered directly from Reference output thus eliminating need bias resistor This bias method will disable automatic power down feature sensors require more than
Figure Powered Unbuffered Hall
Figure Motor Supply Biased Buffered Hall
Reference
Toshiba TSH124
Chip ATS177
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation
output used alternative method powering unbuffered Hall sensors that require less than This method eliminates need bias resistor while also preserving automatic power down feature. With this bias method reference output essentially unloaded.
Pull-up resistor required when using buffered Hall sensors that have open collector output. Resistors bias unused amplifier input level that within input common mode range.
Figure Reference Biased Buffered Hall
Figure Reference Buffer
Reference
Chip ATS177
KTA1270
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation
Load
Reference
Under Voltage Lockout
Resistor required buffered Hall sensors with open collector output. Resistors eliminated biasing unused amplifier input from reference.
With addition economical transistor, Reference output current boosted above This simple buffer circuit will have benefit maintaining short circuit protection.
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Figure Higher Voltage Reference
aMC8500
Reference VRef
used gain Reference voltage applications that require additional regulated voltage source. This circuit supply powering additional circuitry provide higher reference voltage. insure that output maintains regulation, maximum programmed output voltage must less than
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Figure Connections Required
Reference
Reference
Reference
Unity gain amplifier configuration with output forced low.
Comparator configuration with output forced high.
Comparator configuration with output forced low.
Figure Connections Disable Minimum Speed Digital Signal Speed Control Operation Slope Select Grounded
Reference
Slope Select Open
Reference
Oscillator
Speed Comp Comp Logic Digital Detector
Oscillator
Speed Comp Comp Logic Digital Detector
application does require programmed minimum speed controlled variable duty cycle digital pulse train,
Minimum Speed comparator must disabled connecting directly
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Figure Driving Higher Current Motors
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Under Voltage Lockout
Hall Amplifier Non-Overlap Commutation
Motor Drives
Current Limit Comparator protects Motor Drives limiting output sink current 1100 applications that require driving higher current motors, drive current significantly increased with addition external P-channel MOSFET. Current limit protection maintained since load longer series with internal MOSFETs.
Figure Driving Higher Voltage Motors
Under Voltage Lockout
Hall Amplifier Non-Overlap Commutation
Motor Drives
Motor Drives limited maximum These outputs cascoded with external N-channel MOSFETs driving higher voltage motors. cascode configuration maintains current limit protection since load series with internal MOSFETs.
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Figure Driving Single Phase Full Wave Motors
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Under Voltage Lockout
Hall Amplifier Non-Overlap Commutation
Motor Drives
Single phase full wave motors driven with addition external P-channel MOSFETs. With gates cross coupled shown above, internal external MOSFETs perform full bridge driver. Commutation shoot through current minimized internal non-overlapping delay circuit. resistor capacitor time constant must just long enough prevent pulse width modulation external PFETs. Current limit protection maintained since load series with internal MOSFETs. motor drive outputs limited maximum
Figure Current Limit Threshold Programming, Noise Pick Motor Soft Acceleration
Current Limit Latch Current Limit Comparator
Current Limit
Noise Pick Elimination
Current Limit Threshold Reduction
Vref
Soft Motor Acceleration
Optional
Bypass Capacitor Single Resistor Current Source Biased Dual Resistor Reference Biased
Caccl
Current Limit input susceptible noise pick most applications will require bypass capacitor. Current Limit Comparator threshold reduced connecting single resistor from ground. This most economical programming method somewhat less accurate than using dual resistor method shown. This fact that Reference Output more accurate than absolute values internal current source pull-up terminating resistor. Motor soft acceleration during power-up accomplished connecting capacitor from ground. During initial device power-up, internal current source will charge capacitor Caccl thus gradually increasing current limit threshold. diode shown optional required there sufficient time internal components discharge capacitor from when power source removed then reapplied.
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Figure Function Description
Function Phase Output Current Limit Hall Hall Reference Output Minimum Speed Non-Inverting Input Inverting Input Output Speed Control Input Signal Power Ground Slope Select Freq. Generator Rotor Lock Phase Output Description
aMC8500
Preliminary Specification Subject change without notice
This output directly drives phase unipolar motor. active when voltage applied Hall input exceeds that Hall This input left unconnected maximum motor drive current sink current 1100 sink current programmed lower level connecting resistor from this input ground. Most applications will require bypass capacitor this prevent noise pick This input connects output unbuffered differential type Hall sensor. This input connects output unbuffered differential type Hall sensor. This reference output capable sourcing excess also used selectively enable disable automatic power down feature. Automatic power down enabled reference load current less, disabled more. This input used conjunction with Reference Output program minimum motor speed threshold automatic power down. continuous minimum speed operation desired, automatic power down feature must disabled. minimum speed feature available when controlling motor speed from variable duty cycle digital pulse train this input must disabled connected This non-inverting input Amp. operating voltage range that extends from ground This inverting input Amp. operating voltage range that extends from ground This output capable sinking sourcing used conjunction with Reference scaling speed control signal derived from temperature sensor. voltage level that ranges from variable duty cycle pulse applied this input controlling motor speed. positive negative speed control slope selected This ground return control circuitry. connects directly power source ground terminal. Internally this connects device substrate exposed thermal pad. This control circuit positive supply. connects power source positive terminal. This ground return motor drive MOSFETs. connects power source ground terminal. This input selects between positive negative speed control slope. When connected ground, increasing voltage increases motor speed. When connected, increasing voltage decreases motor speed. This input internal current source pull-up. This output provides digital square wave signal that switches Hall sensor frequency active when voltage applied Hall input exceeds that Hall motor turns slow stalled, output will assume high state. This active open drain output requires pull-up resistor. This output directly drives phase unipolar motor. active when voltage applied Hall input exceeds that Hall
Preliminary Specification Subject change without notice
Layout Considerations High frequency printed circuit layout techniques required prevent pulse jitter possibility erratic operation. This caused excessive noise pick-up imposed upon Hall Error Amplifier inputs. printed circuit layout should contain much copper ground possible with separate current signal high current motor drive grounds that return back power supply input filter capacitor. Ceramic bypass capacitors connected close integrated circuit Vref pins also required depending upon circuit board layout source voltage impedance. bypass capacitors will provide impedance path ground filtering high frequency noise. signal power ground pins along with exposed thermal must connected together package. high current loops should kept short possible with wide traces minimize generation radiated electro magnetic interference, EMI. Wide copper trace connections with copious amounts foil placed under device will greatly enhance devices ability dissipate power.
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Figure Thermistor Sensing Variable Speed Temperature Regulator
Preliminary Specification Subject change without notice
Reference
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation Fault Timer Power Down Kick Start
Motor Drives
Preliminary Specification Subject change without notice
25°C 3694
Thermal Shutdown
Oscillator
Speed Comp Comp Logic
Current Limit Latch Current Limit Comp
Digital Detector
Application Requirements Tmin Speed Tmax Speed Minimum Speed Setting Thermistor 10000 10000 10000 10000 10000
Closest Standard 1.0% Resistor Values Linearization 6650 6980 4990 5900 4640 11500 11500 15400 10200 14700 Gain 32400 16200 29100 133000 49900 Offset 1130 1870 1370 1000 1000 1150 1330 1300 1000 1000 Speed 2550 2550 2910 2910 1330 1330 1330 1330
used conjunction with Reference extremely useful providing voltage gain offset condition thermistor signal that drive Speed Control Input. table shows five different application requirements with calculated closest standard 1.0% resistor values. each example, required motor speed defined sensor temperatures along with minimum speed setting. third application, minimum speed input required comparator must disabled connecting Note that total Reference load current must exceed order disable automatic power down feature.
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Figure SimistorSensing Variable Speed Temperature Regulator
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Reference aSM121 Oscillator
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation Fault Timer Power Down Kick Start
Motor Drives
Thermal Shutdown
Speed Comp Comp Logic
Current Limit Latch Current Limit Comp
Digital Detector
Application Requirements Tmin Speed Tmax Speed Minimum Speed Setting
Closest Standard 1.0% Resistor Values Gain 13700 10500 1070 1070 13000 16500 76800 8870 48700 169000 1400 1370 1330 2320 Offset 5360 6810 4120 7320 Speed 1070 1070 1070 1130 1130 1270 1130
This application circuit uses Simistotrsolid state silicon temperature sensor that provides precision signal mV/°C with offset 0°C. conjunction with Reference used gain-up offset signal before applying speed control input. above table shows five application requirements that similar those Figure with calculated resistor values. Simistorsensor allows reduced component count when compared equivalent thermistor circuit. each example, required motor speed defined minimum maximum sensor temperature, minimum speed setting. third application, minimum speed input required comparator must disabled connecting Note that total Reference load current must exceed order disable automatic power down feature.
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
aMC8500
Figure Thermistor Sensing Thermostatic Temperature Regulator
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Reference
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation Fault Timer Power Down Kick Start
Motor Drives
Speed Comp Oscillator
Thermal Shutdown
25°C 3694
Current Limit Latch Logic Current Limit Comp
Comp
Digital Detector
Application Requirements Speed Transition Temperature Minimum Speed Setting Thermistor 10000 10000 10000 10000 10000
Closest Standard 1.0% Resistor Values Linearization 8060 7500 6340 5760 4990 Threshold 1020 1020 1020 1050 1050 1000 1100 1070 1100 1130 Hysteresis 158000 66500 113000 180000 73200 Speed 1070 1070 1070 1070 1130 1130 1270 1270
Thermostatic control accomplished configuring non-inverting voltage comparator. above table shows five different application examples with calculated resistor values. applications motor will switch from programmed minimum setting maximum speed sensor temperature rises above required transition temperature. controlled amount positive feedback shifts transition temperatures provide thermal hysteresis sensor cools. third application requirement, motor speed switches between zero full speed. this case minimum speed input required comparator must disabled connecting Note that total Reference load current must exceed order disable automatic power down feature.
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
aMC8500
Figure SimistorSensing Thermostatic Temperature Regulator
Preliminary Specification Subject change without notice
Reference aSM121
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation Fault Timer Power Down Kick Start
Motor Drives
Preliminary Specification Subject change without notice
Thermal Shutdown
Oscillator
Speed Comp Comp Logic
Current Limit Latch Current Limit Comp
Digital Detector
Application Requirements Speed Transition Temperature Minimum Speed Setting
Closest Standard 1.0% Resistor Values Threshold 1740 Hysteresis 221000 40200 60400 68000 35700 2320 3240 2490 2490 Speed 1210 1690 1150 1150
Thermostatic control achieved configuring voltage comparator. inverting input monitors Simistorsolid state thermal sensor while non-inverting input biased reference level. above table shows five different application examples with calculated resistor values. applications motor speed switches from programmed minimum setting maximum sensor temperature rises above required transition temperature. controlled amount positive feedback shifts transition temperatures provide thermal hysteresis sensor cools. third application requirement, motor switches between zero full speed. this case minimum speed input required comparator must disabled connecting Note that total Reference load current must exceed order disable automatic power down feature.
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
Figure Balanced Technology Extended (BTX) Closed Loop Speed Control
aMC8500
Duty Cycle Voltage Converter
Control Signal Input
Error Oscillator Speed Comp Comp Reference Under Voltage Lockout
FGRL
Hall Amplifier Non-Overlap Commutation Fault Timer Power Down Kick Start
Motor Drives
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
74AC86PC
Thermal Shutdown Current Limit Latch Current Limit Comp
Temperature Controlled Clamp
Thermistor
(°C) 10464 10061 9712 9027 8394 7828 7291 6799 3300
Logic Digital Detector
Frequency Voltage Converter
Figure Speed versus Control Signal Duty Cycle Various Inlet Temperatures 4800 Inlet Temperature 4000 Speed (RPM) 3200 2400 1600
Speed Intercept Points
2600 2200 Speed (RPM) 1800 1400
Figure Speed versus Motor Voltage Various Control Signal Duty Cycles
Control Signal Inlet Temperature 30°C Duty Cycle
Duty Cycle
Duty Cycle
1000 10.8
Control Signal Duty Cycle
11.2
11.6
12.0 12.4 12.8 Motor Voltage
13.2
13.6
above circuit controls speed closed loop manner that proportional control signal duty cycle inlet temperature. voltage indicating required speed Reference applied derived from Duty Cycle Voltage Converter Temperature Controlled Clamp circuits. Duty Cycle Voltage Converter consists gate buffer that drives pass filter, with high state level limited Temperature Controlled Clamp. voltage indicating actual speed Feedback applied derived from Frequency Voltage Converter that consists gates. first buffers FGRL tachometer signal connects second which configured edge transition one-shot that drives pass filter. compares difference between Reference Feedback voltages generates Error signal that drives corrective fashion causing either faster slower that Feedback voltage level becomes same Reference. Performance data shown above graphs. Note that Error signal applied instead that must biased between proper operation.
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
Figure Digital Pulse Speed Control with Programmable Minimum Speed
aMC8500
Reference
Under Voltage Lockout Hall Amplifier Non-Overlap Commutation Fault Timer Power Down Kick Start
Motor Drives
Preliminary Specification Subject change without notice
Pulse Input Oscillator
Preliminary Specification Subject change without notice
Thermal Shutdown
Speed Comp Comp Logic
Current Limit Latch Current Limit Comp
Digital Detector
programmable minimum speed feature preserved when controlling motor speed from varying duty cycle pulse. above circuit uses transistor capacitor Reference convert digital control signal analog voltage. With resistor values shown, voltage varies between with with which represents on-time 100% respectively. value capacitor dependent upon pulse frequency should sized that ripple less than required this application connected unity gain follower with noninverting grounded. Minimum Speed input programmed on-time approximately 33%. Since Reference always required, programming resistors also provide load that exceeds disabling automatic power down feature.
Figure Speed Control Alarm
Reference Oscillator
0.02(%ton) Open 0.02(%ton) R2/R1 (Vref Vth) Speed Alarm Output Speed Comp Comp
Reference
Speed Alarm Output
Oscillator
Speed Comp Comp
Speed Control Input
Speed Control Input
Reference used generate speed control alarm signal. Resistors divide down Reference output voltage trip threshold Vth. compares speed control input voltage trip threshold output changes state when crossed. circuit left, speed alarm output transitions from high state Speed Control Input voltage increases. With circuit right, speed alarm output transitions from high state speed control input voltage increases. Threshold hysteresis added circuit right placing resistor from
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
aMC8500
Figure Dual Redundancy
UVLO Hall Commutation
Drives
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Timers Power Down
Logic Digital Detector
Latch Current Limit
UVLO Hall Commutation Timers Power Down
Drives
Latch Logic
Current Limit
Digital Detector
applications that require increased system reliability, multiple cooling fans employed redundancy. this example aMC8500s cross coupled that each device drives while monitoring operation other. Resistors program Speed Control inputs operate each speed. During normal operation, Frequency Generator Rotor Lock outputs, continuously discharges their respective capacitors. event that should fail, will allow charge above This causes output drive Minimum Speed input above maximum speed remaining fan. values resistors chosen that each Reference Output loaded excess order disable automatic power down feature.
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
aMC8500
Figure QSOP16 Package Outline Drawing View Bottom View
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Side View
View
Detail
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
aMC8500
Figure SOIC16 Exposed Package Outline Drawing
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Andigilog, Inc. 2006
www.andigilog.com
August 2006 70A04018
aMC8500
Data Sheet Classifications
Preliminary Specification This classification shown heading each page specification products that either under development (design qualification), formative planning stages. Andigilog reserves right change discontinue these products without notice. Release Specification This classification shown heading first page only specification products that either under later stages development (characterization qualification), early weeks release production. Andigilog reserves right change specification information these products without notice.
Preliminary Specification Subject change without notice
Preliminary Specification Subject change without notice
Fully Released Specification Fully released datasheets contain classification first page header. These documents contain specification products that full production. Andigilog will change guaranteed limits without written notice customers. Obsolete datasheets that were written prior January 2001 without header classification information should considered obsolete non-active specifications, best case Preliminary Specifications.
LIFE SUPPORT POLICY ANDIGILOG'S PRODUCTS AUTHORIZED CRITICAL COMPONENTS LIFE SUPPORT DEVICES SYSTEMS WITHOUT EXPRESS WRITTEN APPROVAL PRESIDENT GENERAL COUNSEL ANDIGILOG, INC. used herein: Life support devices systems devices systems which, intended surgical implant into body, support sustain life, whose failure perform when properly used accordance with instructions provided labeling, reasonably expected result significant injury user. critical component component life support device system whose failure perform reasonably expected cause failure life support device system, affect safety effectiveness.
Andigilog, Inc. 8380 Kyrene Rd., Suite Tempe, Arizona 85284 Tel: (480) 940-6200 Fax: (480) 940-4255 Andigilog, Inc. 2006 www.andigilog.com August 2006 70A04018
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