Memory Cell Dynamic memory( DRAM Refresh: Completely free Power Down:
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A64S16161
Memory Cell Dynamic memory( DRAM Refresh: Completely free Power Down: Control CS2( Data Retention Byte Control Capable single byte operation Power Consumption: 100A( Standby Current Operating Temperature Range: -40'C~+85'C Composition:2,097,152 Word Supply Power Voltage:2.70V 3.30V Access Time: 70nS Access Time Page Access Read 30nS Terminal :Input Output Common 3-state output
Voltage Super
CE1#
DQ10
DQ11
Description
Name CS1# IO0-7 IO8-15 Description Chip select Active Chip select High Active Write enable Active Output enable Active Address Input Page Address) Lower Byte Input Output Upper Byte Input Output Lower Byte Control Active Upper Byte Control Active Power Supply Ground
DQ12
DQ14
DQ13
DQ15
Description
A64S16161 virtually static RAM, which uses DRAM type memory cells, refresh transparency, that need imply refresh operation. Furthermore interface completely compatible power Asynchronous type SRAM, operate same Asynchronous SRAM. A64S16161 2,097,152 Words asynchronous random access memory monolithic CMOS chip with marvelous power consumption technology. power also noise makes ideal mobile applications.
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Block Diagram
Decoder Address Buffer Column Decoder Column Gate 256X16 8192 Memory Cell
Control Refresh Control CS1# CS1#,CS2 Control Input Output Buffer WE#,OE# LB#,UB# Control
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161 Functions
Truth Table
A0-20 CS1# I/O0~7 Data-Out Data-Out High-Z High-Z High-Z Data-In Data-In High-Z High-Z High-Z I/O8~15 Data-Out High-Z Data-Out High-Z High-Z Data-In High-Z Data-In High-Z High-Z Mode Read Read Read Output Disable Output Disable Write Write Write Standby Power
Valid Address. High Data Retention
Read Operation
possible control data width pins. (1)Reading data from lower byte Date read when address while holding CS1#=L, CS2=H, #=L. (2)Reading data from upper byte Date read when address while holding CS1#=L, CS2=H, #=L. (3)Reading date from both bytes Date read when address while holding CS1#=L, CS2=H, #=L. (4)Page access read Date read changing A0-A2 when A3-A20 while holding CS1#=L, CS2=H, #=H, #=L, #=L.
Writing Operation
Writing data into lower byte control Data written adding pulse into when address while holding CS1#=L, CS2=H, #=H, #=H. data lower byte latched into memory cell during Writing data into lower byte control) Data written adding pulse into when address while holding CS1#=L, OE#=H, WE#=L. data lower byte latched into memory cell during Writing data into upper byte control) Data written adding pulse into when address while holding #=L, #=H, #=L. data upper byte latched into memory cell during PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Writing data into upper byte control) Data written adding pulse into when address while holding #=L, #=H, #=L. data upper byte latched into memory cell during #=L. Writing data into both byte control) Data written adding pulse into when address while holding #=L, CS2=H, #=H, #=L. data latched into memory cell during #=L, #=L. Writing data into both byte control) Data written adding pulse into when address while holding CS1#=L, CS2=H, #=L. data latched into memory cell during #=L,
Read write with using both timing edge must same. While pins output state, data that opposite output data should given.
Standby cycle
When CS1# device will standby cycle. this case data pins Hi-Z input pins inhibited.
Power Down
When device will power down. this case, internal refresh stops data might lost.
ABSOLUTE MAXIMUM RATINGS (VSS=0V)
Parameter Supply voltage Input voltage Input Output voltage Input Output voltage Operating temperature Storage temperature Symbol Topr Tstg Ratings -0.5 -0.5* VCC+0.3 -0.5* VCC+0.3 Unit
pulse width less than 1.0V
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
ELECTRICAL CHARACTERISTICS Recommended Operating Conditions (Ta=-40~85C)
Parameter Supply voltage Symbo1 Input voltage pulse width less than -1.0V -0.3* 2.70 VCC-0.3 3.30 VCC+0.3 Unit
ELECTRICAL CHARACTERISTICS Characteristics (Ta=-40~85'C)
Parameter Input leakage current Output leakage current Symbol Condition VI=0V UB#=H CS1#=H WE#=L OE#=H CS2=L VI/O=0V High level output voltage level output voltage Power Down Current Standby Current Operating current Operating current Operating current IDDPD IDDS IDDA1 IDDA2 IDDA3 IOH=-0.5A IOL=0.5A CS20.2V VCC-0.2VCS1# I/O=0A, I/O=0A, I/O=0A, Vcc-0.3 Unit
*1:Typical values measured Ta=25'C =3.0V *2:Random access *3:Page access read
Terminal Capacitance
(Ta=25'C f=1MHz) Parameter Input Capacitance Capacitance Symbol Conditions VI=0V I/O=0V Unit
NoteThis parameter measured sampling products.
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Electrical Characteristics Read Cycle 85'C)
Parameter Read cycle time Page read cycle time Address access time Page address access time access time access time access time CS1# high pulse width Address output time output floating time output time output floating time output time output floating time Output hold time Symbol tRCP tACC tACCP tACS tC1H tASO tCHZ tCLZ tBLZ tBLZ tOLZ tOHZ Teat Conditions 32000 32000 Unit
Write Cycle (Ta= 40~85'C)
Parameter Write cycle time Chip select time CS1# pulse width Address enable time Address time Write pulse width LB,UB select time Address hold time Data time Data hold time Symbol tC1H Test Conditions 32000 Unit
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Power Down Cycle(Ta= 40~85C)
Parameter time Power Down entry hold time before Power Down exit pulse width hold time after Power Down exit Symbol tSSP tSHP TC2LP tHPD Test Conditions Unit
Power Timing Requirement(Ta= 40~85C)
Parameter time after Power Standby hold time after Power Symbol tSHU tHPU Test Conditions Unit
Data Retention Timing Requirement(Ta= 40~85C)
Parameter hold time during active CS1# hold time Either tBAH tCSH required data retention. Symbol tBAH tCSH Test Conditions Unit
Address Skew Timing Requirement(Ta= 40~85C)
Parameter Maximum address skew Symbol tSKEW Test Conditions Unit
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
TEST CONDITION
Input pulse voltage level Input ascend descend time Input output timing reference level Output load
0.3V 0.3V tr=tf=3nS 2.0V/0.8V CL=50pF(Includes capacity)+1TTL
TEST CONDITION
Input pulse voltage level Input ascend descend time Input output timing reference level Output load
0.3V 0.3V tr=tf=3nS ±100mV(The level change from stable voltage CL=5pF(Includes capacity)+1TTL
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161 TIMING CHART
Read Cycle
Address
tACC tACS
CS1#
tCHZ
LB#/UB#
tASO
tBHZ
tOLZ tOHZ tBLZ tCLZ
Dout
must level entire read cycle. Read Cycle Page Access Address (A20-A3)
Change tRCP tRCP
Address (A2-A0) CS1#
tCHZ tACS tACCP tACCP
tCLZ
Dout
must level entire read cycle.
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Read Cycle Page Access Address (A20-A3)
Change tRCP tRCP
Address (A2-A0) CS1#
tASO
tACS
tACCP tACCP
tCHZ
tOLZ
Dout
must level entire read cycle.
Write Cycle Control
Address
CS1#
must level entire read cycle.
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Write Cycle Control
Address
CS1#
must level entire read cycle.
Standby
tC1H
CS1#
Active
Standby
Active
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Power Down Mode Entry Exit CS1#
tSHP tC2LP tHPD
tSSP
Power CS1#
tSHU tHPU
VCC(min)
Data Retention(1)
tBAH
Address (A20-A3)
CS1#
This applies both read write.
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Data Retention Address (A20-A3)
tCSH Change
CS1#
This applies both read write.
Address Skew(1) A0-20
tSKEW
CS1# tSKEW from first address change last address change
Address Skew(2) A0-20
tSKEW
CS1#
tSKEW from first address change last address change
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Address Skew(3) A0-20
tSKEW
CS1#
tSKEW from first address change stand-by
Reference External Wiring Diagram
Address Input
Control
Input Output
CS1#
A64S16161
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Ordering Information
Operating Current Max. (mA) Power Down Mode Standby Current Max. (µA)
Part
Access Time (ns)
Package
A64S0616G-70I
Mini
Note: industrial operating temperature range
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
A64S16161
Pins FBGA Package outline drawing
-A6.00 PIN#1 -B0.08 CAVITY 0.96 0.10
8.00
0.10
SOLDER BALL SEATING PLANE
0.25
DETAIL
SECTION
3.75 0.75
0.35
DETAIL 5.25
PRELIMINARY (December, 2003, Version 0.0)
AMIC Technology Corp.
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