Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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High-performance, Low-power Enhanced RISC Architecture
Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Power-down Modes Bond Locations Conforming 7816-2 Protection 6000V Operating Ranges: 1.62 5.5V Compliant with GSM, 3GPP 2000 Specifications; Industry Compatible Available Wafers, Modules, Industry-standard Packages
Memory
Bytes Program Memory Bytes EEPROM, Including Bytes 384-byte Bit-addressable Area
128-byte Program Erase Program Erase Typically More than 500,000 Write/Erase Cycles Temperature 25oC Years Data Retention Bytes
Secure Microcontroller Smart Cards AT90SC 6436RT Summary
Peripherals
Port
Configurable Support Communication Protocol Including ISO7816-3
16-bit Timer Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller
Security
Advanced Protection Against Physical Attack Environmental Protection Systems Voltage Monitor Secure Memory Management/Access Protection (Supervisor Mode) SPA/DPA Counter Measure
Development Tools
Voyager Emulation Platform (ATV2 Standard) Support Software Development Systems EWAVR® V3.10 Debugger Atmel's Studio® Version 4.07 Above Software Libraries Application Notes
6505AS-SMIC-30Mar04
Note: This summary document. complete document will available under NDA. more information, please contact your local Atmel sales office.
Description
AT90SC6436RT power, high performance, 8/16-bit microcontroller based enhanced RISC architecture, with flexible program memory EEPROM data memory. executing powerful instructions single clock cycle, AT90SC6436RT achieves throughputs close MIPS Mhz. Harvard architecture includes general-purpose working registers directly connected ALU, allowing independent registers accessed single instruction executed clock cycle. ability EEPROM code space allows parts program memory reprogrammed in-system. This technology combined with versatile 8/16-bit monolithic chip provides highly flexible cost-effective solution many smartcard applications. AT90SC6436RT also configured offer compatibility with AT90SC6432R. Figure shows AT90SC6436RT block diagram. Figure AT90SC6436RT secureAVR Enhanced RISC Architecture
Data 8-bit EEPROM User Memory Flash Program Memory Instruction Register Instruction Decoder Control Lines Timer Status Register On-Chip Security Reset Circuit Access Control General Purpose Registers Secure Control
Data Memory Access Control Interrupt Unit
7816 Port
IN/OUT0
AT90SC6436RT
6505AS-SMIC-30Mar04
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6505AS-SMIC-30Mar04

Powerful Instructions (Most Executed Single Clock Cycle) Power Idle Po

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