Powerful Instructions (Most Executed Single Clock Cycle) With ISO14443

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Powerful Instructions (Most Executed Single Clock Cycle) With ISO14443

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High-performance, Low-power secureAVRCore Enhanced RISC Architecture
Powerful Instructions (Most Executed Single Clock Cycle) With ISO14443 Contactless only interface Power-saving Wait Very Power Stop Modes Power-up Detection Available Wafers, Contactless Modules Inlays Industry-standard Packages Compliant with Master Card PayPass/ VISA Specifications
Contactless Mode
Contactless Interface Controller (CIC) with Full Support ISO/IEC 14443 Type
Protocol Supply Voltage Clamp Regulation Full-bridge Power Rectification On-chip Tuning Capacitance: 20pF 120pF 13.56 Clock Extraction 6.78 Internal Frequency Reader-to-card: ISO/IEC Type 100% Modulation Modified Miller Coding ISO/IEC Type Modulation Coding Card-to-reader: ISO/IEC Type Generation 847.5KHz Subcarrier with Modulation Manchester Coding ISO/IEC Type Modulation Incoming Carrier Resistive Load Switching Generation 847.5KHz Subcarrier with BPSK Modulation data Encoding Baud Rates: 106Kbps, Kbps Kbps Frame: bytes
Secure Microcontroller Smart Cards AT90SC 6404RFT Summary
Memory
Bytes Program Memory Bytes EEPROM, Including Bytes Bit-addressable Bytes
64-byte Program/Erase, Program, Erase Endurance: 500,000 Write/Erase Cycles 25°C, Years Data Retention Bytes Bytes dedicated
Peripherals
Programmable Internal Oscillator internal Clock) 16-bit Timers Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller Hardware Triple DPA/DEMA Resistant Checksum Accelerator Engine (Compliant with ISO/IEC 3309) Controller (Used Speed-Up Data Transfers when Communicating Contactless Interface)
Security
Dedicated Hardware Protection Against SPA/DPA/DEMA Attacks Advanced Protection Against Physical Attack, Including Active Shield Environmental Protection Systems, Temperature Monitor, Light Protection Secure Memory Management/Access Protection (Supervisor Mode) Security Certification Targeted: Common Criteria EAL4+
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Note: This summary document. complete document will available under NDA. more information, please contact your local Atmel sales office.
Development Tools
Voyager Emulation Platform (ATV4 Advanced) Support Software Development Embedded Workbench® V3.20c Debugger Atmel's Studio® Version 4.07 Above Software Libraries Application Notes
Description
AT90SC6404RFT low-power, high-performance, 8-/16-bit microcontroller with program memory, EEPROM data memory, based secureAVR enhanced RISC architecture with contactless interface. executing powerful instructions single clock cycle, AT90SC6404RFT achieves throughputs close MIPS MHz. Harvard architecture includes general-purpose working registers directly connected ALU, allowing independent registers accessed single instruction executed clock cycle. AT90SC6404RFT uses secureAVR architecture that allows linear addressing bytes code bytes data well number functional security features. AT90SC6404RFT features bytes high-performance EEPROM (fast erase/write time, high endurance). ability EEPROM code space allows parts program memory reprogrammed in-system. Additional security features include temperature protection logic, logical scrambling program data addresses, power analysis countermeasures, memory accesses controlled supervisor mode. This product specifically designed Smart Cards targets Transport Banking applications. Figure shows block diagram AT90SC6404RFT.
Figure Block diagram AT90SC6404RFT.
Data 8-bit
EEPROM User Memory 64KB Program Memory Instruction Register Instruction Decoder
Access Control
General Purpose Registers
Data Memory Interrupt Unit
ISO14443 Controller (CIC)
Controller
Modulator Power Clock
Control Lines Status Register
Timers
DES/Triple Access Control Counter Measures
Checksum Accelerator
AT90SC6404RFT
6520-SMIC-18Jul05
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6520-SMIC-18Jul05

Powerful Instructions (Most Executed Single Clock Cycle) With ISO14443

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