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Powerful Instructions (Most Executed Single Clock Cycle) Bond Location
Top Searches for this datasheetHigh-performance, Low-power secureAVR Core Enhanced RISC Architecture Powerful Instructions (Most Executed Single Clock Cycle) Bond Locations Conforming 7816-2 Protection 6000V Operating Ranges: from 2.7V 5.5V Compliant with ICAO specifications; 2000 Specifications; Industry Compatible Power-saving Wait Very Low-power Stop Modes Power-up Detection Available Wafers, Modules, Dual Interface Module, Contactless Module Inlay Industry-standard Packages Contactless Mode Contactless Interface Controller (CIC) with Full Support ISO/IEC 14443 Type Protocols Supply Voltage Clamp Regulation Full-bridge Power Rectification On-chip Tuning Capacitance: Internal Maximum Frequency with Clock Extracted From External Clock (AVR®) (AdvX) Clock Internally Generated 13.56 Clock Extraction Internal Frequency Reader-to-card: ISO/IEC Type 100% Modulation Modified Miller Coding ISO/IEC Type Modulation Coding Card-to-reader: ISO/IEC Type Generation 847.5Khz Subcarrier with Modulation Manchester Coding ISO/IEC Type Modulation Incoming Carrier Resistive Load Switching Generation 847.5Khz Subcarrier with BPSK Modulation Data Encoding Baud Rates: kbps Frame: Bytes Secure Microcontroller Smart Cards AT90SC 12872RCFT Summary Memory 128K Bytes Program Memory Bytes EEPROM, Including Bytes 384-byte Bit-addressable Area 128-byte Program Erase Program Erase Typically More than 500,000 Write/Erase Cycles Temperatures 250C Minimum Years Data Retention Bytes Bytes Dedicated Bytes Dedicated Atmel's Crypto Library Peripherals 7816 Controller kbps Compliant with Protocols Ports (Configurable Support ISO7816-3, 2-wire protocols.) Programmable Internal Oscillator AdvX Internal clock) Three16-bit Timers (Watchdog capability) Random Number Generator (RNG) 2-level, 8-vector Interrupt Controller Hardware Triple (DPA, SPA, DEMA Resistant) 6502AS-SMIC-05Apr05 Note: This summary document. complete document will available under NDA. more information, please contact your local Atmel sales office. Checksum Accelerator Engine (Compliant with ISO/IEC 3309) 32-Bit AdvX Cryptographic Accelerator Public Operations RSA, DSA, ECC, Diffie-Hellman Controller (Used Speed-Up Data Transfers when Communicating Contactless Interface) Security Dedicated Hardware Protection Against SPA/DPA/DEMA Attacks Advanced Protection Against Physical Attack, Including Active Shield Environmental Protection Systems Voltage Monitor Frequency Monitor Temperature Monitor Light Protection Secure Memory Management/Access Protection (Supervisor Mode) Designed meet Common Criteria EAL4+ Development Tools Voyager Emulation Platform (ATV4 Advanced) Support Software Development Embedded Workbench® V3.20c Debugger Atmel's Studio® Version 4.07 Above Software Libraries Application Notes Description AT90SC12872RCFT low-power, high-performance, 8-/16-bit microcontroller with program memory, EEPROM data memor based secureAVR enhanced RISC architecture with dual interface (contact+contactless). executing powerful instructions single clock cycle, AT90SC12872RCFT achieves throughputs close MIPS MHz. Harvard architecture includes general-purpose working registers directly connected ALU, allowing independent registers accessed single instruction executed clock cycle. AT90SC12872RCFT uses secureAVR architecture that allows linear addressing bytes code bytes data well number functional security features. AT90SC12872RCFT features bytes high-performance EEPROM (fast erase/write time, high endurance).This allows system developers offer their customers true bytes EEPROM, while still being able remaining bytes their purposes (customization patches, example). ability EEPROM code space allows parts program memory reprogrammed in-system. cryptographic accelerator featured AT90SC12872RCFT AdvX, N-bit multiplier-accumulator dedicated performing fast encryption authentication functions. cryptographic routines executed secureAVR core which uses AdvX accelerator during encryption/decryption. AdvX based 32-bit technology, thus enabling fast computation power operation. AdvX supports standard finite fields arithmetic functions (including RSA, DSA, ECC) GF(2N) arithmetic functions (including ECC). Additional security features include power, frequency temperature protection logic, logical scrambling program data addresses, power analysis countermeasures, memory accesses controlled supervisor mode. This product specifically designed Smart Cards targets Access Control applications. block diagram AT90SC12872RCF shown Figure AT90SC12872RCFT 6502AS-SMIC-05Apr05 AT90SC12872RCFT Figure AT90SC12872RCFT Contact/Contactless secureAVR Enhanced Architecture Cryptography Data 8-bit 72KB EEPROM User Memory 128KB Program Memory Instruction Register Instruction Decoder Access Control Secure Control General Purpose Registers Data Memory Interrupt Unit 7816 Controller 7816 Port IN/OUT0 7816 Port IN/OUT1 Control Lines Status Register ISO14443 Controller (CIC) Controller Access Control Modulator Power Clock Timers DES/Triple Reset Circuit AdvX Crypto-Accelerator Counter Measures Checksum Accelerator 6502AS-SMIC-05Apr05 Atmel Corporation 2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Operations Memory 2325 Orchard Parkway Jose, 95131, Tel: 1(408) 441-0311 Fax: 1(408) 436-4314 RF/Automotive Theresienstrasse Postfach 3535 74025 Heilbronn, Germany Tel: (49) 71-31-67-0 Fax: (49) 71-31-67-2340 1150 East Cheyenne Mtn. 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