operation Ultralow resistance typical maximum supply Excellent audio p

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CMOS, Dual DPDT Switch WLCSP/LFCSP/TSSOP Packages ADG888
operation Ultralow resistance typical maximum supply Excellent audio performance, ultralow distortion 0.07 typical 0.14 maximum flatness High current carrying capability continuous peak current Automotive temperature range: -40°C +125°C Rail-to-rail switching operation Typical power consumption (<0.1
ADG888
05432-001
APPLICATIONS
Cellular phones PDAs players Power routing Battery-powered systems PCMCIA cards Modems Audio video signal routing Communication systems Data switching
SWITCHES SHOWN LOGIC INPUT
Figure
GENERAL DESCRIPTION
ADG888 voltage, dual DPDT (double-pole, double-throw) CMOS device optimized high performance audio switching. With power small physical size, ideal portable devices. This device offers ultralow resistance less than over full temperature range, making ideal solution applications requiring minimal distortion through switch. ADG888 also capability carrying large amounts current, typically operation. When each switch conducts equally well both directions input signal range that extends supplies. ADG888 exhibits break-before-make switching action. ADG888 available 16-ball WLCSP, 16-lead LFCSP, 16-lead TSSOP. These packages make ADG888 ideal solution space-constrained applications.
PRODUCT HIGHLIGHTS
<0.6 over full temperature range -40°C +125°C. High current handling capability (400 continuous current (0.008% typical). Tiny 16-ball WLCSP, 16-lead LFCSP, 16-lead TSSOP.
Rev.
Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. Specifications subject change without notice. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective owners.
Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. rights reserved.
ADG888 TABLE CONTENTS
Features Applications. Functional Block Diagram General Description Product Highlights Revision History Specifications. Absolute Maximum Ratings. Caution.5 Configurations Function Descriptions Typical Performance Characteristics Test Circuits.9 Terminology Outline Dimensions Ordering Guide
REVISION HISTORY
12/06-Rev. Rev. Updated Format.Universal Changes Table Changes Table Changes Ordering Guide 7/05-Revision Initial Version
Rev. Page
ADG888 SPECIFICATIONS
unless otherwise noted. Table
Parameter ANALOG SWITCH Analog Signal Range Resistance (RON) Resistance Match Between Channels (RON) Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Leakage (Off Channel Leakage (On) DIGITAL INPUTS Input High Voltage, VINH Input Voltage, VINL Input Current IINL IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tOFF Break-Before-Make Time Delay (tBBM) Charge Injection Isolation Channel-to-Channel Crosstalk +25°C Version Version1 0.48 0.04 0.06 0.07 0.11 ±0.2 ±0.2 0.005 ±0.1 Total Harmonic Distortion (THD Insertion Loss Bandwidth (Off (On) POWER REQUIREMENTS 0.008 -0.03 0.003
Unit
Test Conditions/Comments
0.55
VDD, Figure
0.07 0.13
0.075 0.14
V/4.5 Figure Figure
VINL VINH
Figure Figure Figure Figure kHz; Figure Adjacent channel; kHz; Figure Adjacent switch; kHz; Figure kHz, Figure Figure
Digital inputs
Temperature range version -40°C +125°C TSSOP LFCSP; temperature range version -40°C +85°C WLCSP. Guaranteed design, production tested.
Rev. Page
ADG888
unless otherwise noted. Table
Parameter ANALOG SWITCH Analog Signal Range Resistance (RON) Resistance Match Between Channels (RON) Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Leakage (Off Channel Leakage (On) DIGITAL INPUTS Input High Voltage, VINH Input Voltage, VINL Input Current IINL IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS tOFF Break-Before-Make Time Delay (tBBM) Charge Injection Isolation Channel-to-Channel Crosstalk +25°C Version Version1 0.045 0.072 0.16 0.75 Unit 0.005 ±0.1 Total Harmonic Distortion (THD Insertion Loss Bandwidth (Off (On) POWER REQUIREMENTS 0.01 -0.04 0.003
Test Conditions/Comments
Figure V/2.6 Figure Figure
0.077
0.083 0.262
±0.2 ±0.2
VINL VINH
Figure Figure Figure Figure kHz; Figure Adjacent channel; kHz; Figure Adjacent switch; kHz; Figure kHz, Figure Figure Digital inputs
Temperature range version -40°C +125°C TSSOP LFCSP; temperature range version -40°C +85°C WLCSP. Guaranteed design, production tested.
Rev. Page
ADG888 ABSOLUTE MAXIMUM RATINGS
25°C, unless otherwise noted. Table
Parameter Analog Inputs, Digital Inputs1 Peak Current, operation Continuous Current, operation Operating Temperature Range Automotive Version) TSSOP LFCSP packages Industrial version) WLCSP package Storage Temperature Range Junction Temperature 16-Lead TSSOP Package Thermal Impedance (4-Layer Board) Thermal Impedance 16-Lead WLCSP Package Thermal Impedance (4-Layer Board) 16-Lead LFCSP Package Thermal Impedance (4-Layer Board) Reflow Soldering (Pb-Free) Peak Temperature Time Peak Temperature
Rating -0.3 -0.3 whichever occurs first (pulsed duty cycle max)
Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability. Only absolute maximum rating applied time.
CAUTION
-40°C +125°C -40°C +85°C -65°C +150°C 150°C 112°C/W 27.6°C/W 130°C/W
30.4°C/W
260(+0/-5)°C
Overvoltages clamped internal diodes. Limit current maximum ratings given.
Rev. Page
ADG888 CONFIGURATIONS FUNCTION DESCRIPTIONS
BALL INDICATOR
05432-002
05432-004
INDICATOR
05432-003
ADG888
VIEW (Not Scale)
VIEW
VIEW (BALL SIDE DOWN) Scale (SOLDER BALLS OPPOSITE SIDE)
Figure 16-Ball WLCSP Configuration
Figure 16-Lead LFCSP Configuration
Figure 16-Lead TSSOP Configuration
Table Function Descriptions
WLCSP Ball LFCSP TSSOP Mnemonic Description Most Positive Power Supply Potential. Ground Reference. Source Terminal. input output. Drain Terminal. input output. Logic Control Input.
Table Truth Table
Logic (IN1/IN2) Switch 1A/2A/3A/4A Switch 1B/2B/3B/4B
Rev. Page
ADG888 TYPICAL PERFORMANCE CHARACTERISTICS
0.40 4.2V 0.35 4.5V 0.30 0.25 0.20 0.15 0.10
05432-005
25°C 100mA
+125°C +85°C
100mA
5.5V
+25°C -40°C
Figure Resistance (VS),
Figure Resistance (VS) Different Temperatures,
25°C
2.7V
25°C 100mA
QINJ (pC)
3.3V 3.6V
05432-006
05432-009
Figure Resistance (VS),
Figure Charge Injection Source Voltage
0.45 0.40 0.35 0.30 +125°C
100mA
TIME (ns)
CHANNELS CHANNELS CHANNELS CHANNELS
+85°C +25°C -40°C
0.25 0.20 0.15 0.10 0.05
tOFF CHANNELS CHANNELS
05432-007
TEMPERATURE (°C)
Figure Resistance (VS) Different Temperatures,
Figure tON/tOFF Times Temperature
Rev. Page
05432-010
05432-008
0.05
ADG888
0.020 0.025 25°C
RESPONSE (dB)
05432-011
0.015
0.010
0.005 25°C 4.2V, 100k FREQUENCY (Hz)
0.5V
05432-014
FREQUENCY (Hz)
100M
Figure Bandwidth
Figure Total Harmonic Distortion Noise (THD
25°C 4.2V,
25°C 4.2V, DECOUPLING SUPPLIES
ATTENUATION (dB)
ATTENUATION (dB)
05432-012
-100
05432-023
-120
100k
100M
-100
100k
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure Isolation Frequency
Figure PSRR
25°C 4.2V, ADJACENT CHANNELS (S1A-S2A)
ATTENUATION (dB)
ADJACENT SWITCHES (S1A-S1B)
-100 S1A-S4A
05432-013
-120 -140
100k FREQUENCY (Hz)
100M
Figure Crosstalk Frequency
Rev. Page
ADG888 TEST CIRCUITS
V1/IDS
05432-015
(ON)
05432-017
Figure Resistance
Figure Leakage
(OFF)
(OFF)
05432-016
Figure Leakage
0.1F
VOUT 35pF VOUT
05432-018
tOFF
Figure Switching Times, tON, tOFF
0.1F 35pF VOUT VOUT
tBBM
tBBM
05432-019
Figure Break-Before-Make Time Delay, tBBM
VOUT VOUT
05432-020
VOUT
QINJ VOUT
Figure Charge Injection
Rev. Page
ADG888
0.1F NETWORK ANALYZER
0.1F NETWORK ANALYZER VOUT
05432-022
05432-021
VOUT
ISOLATION
VOUT
INSERTION LOSS
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Figure Isolation
Figure Bandwidth
0.1F
VOUT
NETWORK ANALYZER VOUT
05432-024
CHANNEL-TO-CHANNEL CROSSTALK
VOUT
CHANNEL-TO-CHANNEL CROSSTALK
VOUT
Figure Channel-to-Channel Crosstalk (S1A S1B)
Figure Channel-to-Channel Crosstalk (S1A S2A)
Rev. Page
05432-025
ADG888 TERMINOLOGY
Positive supply current. (VS) Analog voltage Terminal Terminal Ohmic resistance between Terminal Terminal RFLAT (ON) Flatness defined difference between maximum minimum value resistance measured. resistance match between channels. (OFF) Source leakage current with switch off. (ON) Channel leakage current with switch VINL Maximum input voltage Logic VINH Minimum input voltage Logic IINL (IINH) Input current digital input. (OFF) switch source capacitance. Measured with reference ground. (ON) switch capacitance. Measured with reference ground. Digital input capacitance. Delay time between points digital input switch condition. tOFF Delay time between points digital input switch condition. tBBM time measured between points both switches when switching from another. Charge Injection measure glitch impulse transferred from digital input analog output during on-off switching. Isolation measure unwanted signal coupling through switch. Crosstalk measure unwanted signal that coupled through from channel another result parasitic capacitance. This specified conditions: Adjacent channel, that S2A, S2B, S4A, S4B. Adjacent switch, that S1B, S2B, S3B, S4B.
Bandwidth frequency which output attenuated Response frequency response switch. Insertion Loss loss resistance switch. ratio harmonic amplitudes plus signal noise fundamental.
Rev. Page
ADG888 OUTLINE DIMENSIONS
0.65 0.59 0.53 SEATING PLANE BALL IDENTIFIER 2.06 2.00 1.94 0.50 BALL PITCH 0.36 0.32 0.28
VIEW
(BALL SIDE DOWN)
Figure 16-Ball Wafer Level Chip Scale Package [WLCSP] (CB-16) Dimensions shown millimeters
5.10 5.00 4.90
4.50 4.40 4.30
6.40
1.20 0.20 0.09 0.65 0.30 0.19 COPLANARITY 0.10 SEATING PLANE 0.75 0.60 0.45
0.15 0.05
COMPLIANT JEDEC STANDARDS MO-153-AB
Figure 16-Lead Thin Shrink Small Outline Package [TSSOP] (RU-16) Dimensions shown millimeters
4.00 0.60 0.60
INDICATOR 2.25 2.10 1.95 0.25 1.95
INDICATOR
VIEW
0.65 3.75 0.75 0.60 0.50
EXPOSED
(BOTTOM VIEW)
1.00 0.85 0.80
0.80 0.65 0.05 0.02
SEATING PLANE
0.30 0.23 0.18
0.20
COPLANARITY 0.08
COMPLIANT JEDEC STANDARDS MO-220-VGGC
Figure 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] Body, Very Thin Quad (CP-16-4) Dimensions shown millimeters
Rev. Page
111105-0
0.28 0.24 0.20
0.11 0.09 0.07
BOTTOM VIEW
(BALL SIDE
ADG888
ORDERING GUIDE
Model ADG888YRUZ ADG888YRUZ-REEL2 ADG888YRUZ-REEL72 ADG888YCPZ-REEL2 ADG888YCPZ-REEL72 ADG888BCBZ-REEL2 ADG888BCBZ-REEL72 EVAL-ADG888EB
Temperature Range -40°C +125°C -40°C +125°C -40°C +125°C -40°C +125°C -40°C +125°C -40°C +85°C -40°C +85°C
Package Description 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Thin Shrink Small Outline Package [TSSOP] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 16-Ball Wafer Level Chip Scale Package [WLCSP] 16-Ball Wafer Level Chip Scale Package [WLCSP] Evaluation Board
Package Option RU-16 RU-16 RU-16 CP-16-4 CP-16-4 CB-16 CB-16
Branding
Branding these packages limited three characters space constraints. Pb-free part.
Rev. Page
ADG888
NOTES
Rev. Page
ADG888
NOTES
Rev. Page
ADG888
NOTES
©2006 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners. D05432-0-12/06(A)
Rev. Page

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