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Isolation LITELINK® Phone Line Interface (DAA) Features
Top Searches for this datasheetCPC5622 Isolation LITELINK® Phone Line Interface (DAA) Features Superior voice solution with noise excellent part-to-part gain accuracy kVRMS line isolation Simultaneous ringing detection monitoring worldwide applications Provides both full-wave ringing detect half-wave ringing detect maximum versatility Transmit power into Data access arrangement (DAA) solution modem speeds V.92 3.3V power supply operation Easy interface with modem voice CODECs Worldwide dial-up telephone network compatibility CPC5622 used circuits that comply with requirements TIA/EIA/IS-968 (FCC part 68), UL60950 (UL1950), EN60950, IEC60950, EN55022B, CISPR22B, EN55024, TBR-21 Line-side circuit powered from telephone line Compared other silicon solutions, LITELINK: Uses fewer passive components Takes less printed-circuit board space Uses less telephone line power single-IC solution Embedded modems terminals, automated banking, remote metering, vending machines, security, surveillance Description LITELINK single-package silicon phone line interface (PLI) used voice data communication applications make connections between host equipment telephone networks. LITELINK uses on-chip optical components inexpensive external components form required high voltage isolation barrier. LITELINK eliminates need large isolation transformers capacitors used other phone line interface configurations. LITELINK also provides phone line terminations, switchhook, 2-wire 4-wire hybrid, ringing detection, full time receive on-hook transmission capability. CPC5622 member builds upon Clare's third generation LITELINK products with improved insertion loss performance lower minimum current draw from phone line. CPC5622 version LITELINK provides concurrent ringing detection monitoring world wide applications. Both half-wave full-wave ringing detection provided maximum versatility. Applications Computer telephony gateways, such VoIP PBXs Satellite cable set-top boxes V.92 (and other standard) modems machines Voicemail systems Ordering Information Part Number CPC5622A CPC5622ATR Description 32-pin Phone Line Interface, 50/tube 32-pin Phone Line Interface, tape reel, 1000/reel Figure CPC5622 Block Diagram Isolation Barrier Transmit Diff. Amplifier Transmit Isolation Amplifier MODE Gain Trim Gain Trim Transconductance Stage Wire Hybrid AC/DC Termination Hook Switch Receive Isolation Amplifier RING Receive Diff. Amplifier Ringing Detect Outputs Ringing Det. Snoop Amplifier CSNOOP CSNOOP RING RING2 Half Wave Full Wave RSNOOP RSNOOP DS-CPC5622 Rev. www.clare.com CPC5622 Electrical Specifications Absolute Maximum Ratings. Performance Description Application Circuits Resistive Termination Application Circuit 2.1.1 Resistive Termination Application Circuit Part List. Reactive Termination Application Circuit. 2.2.1 Reactive Termination Application Circuit Part List Using LITELINK Switch Hook Control (On-hook Off-hook States) On-hook Operation: OH=1. 3.2.1 Ringing Signal Reception Snoop Circuit. Off-Hook Operation: OH=0 3.3.1 Receive Signal Path. 3.3.2 Transmit Signal Path Initialization Requirement Following Power-up Characteristics. 3.5.1 Setting Current Limit Characteristics. 3.6.1 Resistive Termination Applications 3.6.2 Reactive Termination Applications. 3.6.3 Mode Usage. Regulatory Information LITELINK Design Resources Clare, Inc. Design Resources LITELINK Performance Manufacturing Information Mechanical Dimensions. Tape Reel Packaging Manufacturing Assembly Processes 7.3.1 Moisture Reflow Sensitivity 7.3.2 Reflow Profile www.clare.com Rev. CPC5622 Electrical Specifications Absolute Maximum Ratings Parameter Isolation Voltage Continuous Ring Current (RZDC 5.2) Total Package Power Dissipation Logic Inputs Operating temperature Storage temperature -0.3 -0.3 Minimum Maximum 3000 +125 Unit VRMS Absolute maximum ratings stress ratings. Stresses excess these ratings cause permanent damage device. Functional operation device conditions beyond those indicated operational sections this data sheet implied. Unless otherwise specified specifications 25°C VDD=5.0V. Performance Parameter Characteristics Operating Voltage Operating Current Operating Voltage VDDL Operating Current IDDL On-hook Characteristics Metallic Resistance Longitudinal Resistance Ringing Signal Detect Level Ringing Signal Detect Level Snoop Circuit Frequency Response Snoop Circuit CMRR1 Ringer Equivalence Longitudinal Balance1 Off-Hook Characteristics Impedance Longitudinal Balance1 Return Loss Transmit Receive Characteristics Frequency Response 4000 corner frequency ring, using resistive termination application circuit part Into 1800 0.01B >4000 VRMS VRMS part ring, applied applied from ring Earth ground ringing signal applied ring ringing signal applied across ring corner frequency Clare application circuit VRMS common-mode signal across ring Host side Host side Line side, derived from ring Line side, drawn from ring while off-hook Minimum Typical Maximum Unit Conditions Rev. www.clare.com CPC5622 Parameter Transhybrid Loss Minimum Typical Maximum Unit Conditions Into 1800 with resistive termination application circuit kHz, Resistive termination application circuit with MODE de-asserted. Reactive termination application circuit with MODE asserted. flat bandwidth dBm, harmonic Single-tone sine wave. into Single-tone sine wave. into Sink source Transmit Receive Insertion Loss -0.4 Average In-band Noise Harmonic Distortion Transmit Level Receive Level RX+/RX- Output Drive Current TX+/TX- Input Impedance Isolation Characteristics Isolation Voltage Surge Rise Time MODE Control Logic Inputs Input Voltage Input High Voltage High Level Input Current Level Input Current RING RING2 Output Logic Levels Output High Voltage Output Voltage 3000 2000 -0.4 -126 -120 -120 dBm/Hz VP-P VP-P Vrms V/µS Line side host side, minute duration damage ring IOUT -400 IOUT Specifications subject change without notice. performance characteristics based Clare application circuits. Functional operation device conditions beyond those specified here implied. NOTES: This parameter layout component tolerance dependent. www.clare.com Rev. CPC5622 Description Name TXSM TXTX+ MODE RING Function Host (CPE) side power supply Transmit summing junction Negative differential transmit signal from host Positive differential transmit signal from host Transmit differential amplifier output When asserted low, changes gain path path accommodate reactive termination networks Host (CPE) side analog ground Assert logic off-hook operation Half wave ringing detect output signal Full wave ringing detect output signal Negative differential analog signal received from telephone line. Must coupled with Positive differential analog signal received from telephone line. Must coupled with Positive differential snoop input Negative differential snoop input Receive photodiode amplifier output Receive photodiode summing junction Power supply line side, regulated from ring. Receive isolation summing junction Receive pre-bias current Bridge rectifier return Electronic inductor DCR/current limit feedback output slope control Network amplifier feedback External MOSFET gate control Receive signal input Bridge rectifier return Transmit photodiode summing junction Receiver impedance Transmit transconductance gain Transmit photodiode amplifier output 1.25 reference Figure Pinout TXSM TXTX+ MODE RING RING2 RXRX+ SNP+ SNPRXF REFL TXSL BRNTS DCS1 DCS2 BRRPB VDDL RING2 SNP+ SNP15 VDDL BR21 DCS2 DCS1 BR28 TXSL REFL Rev. www.clare.com CPC5622 Application Circuits LITELINK used with telephone networks worldwide. Some public telephone networks, notably North America Japan require resistive line termination. Other telephone networks Europe, China elsewhere require reactive line termination. application circuits that follow address both types line termination models. reactive termination application circuit that describes TBR-21 implementation shown Figure page This circuit easily adapted other reactive termination needs. Resistive Termination Application Circuit Figure Resistive Termination Application Circuit Schematic (RTX) 80.6K TXSM MODE LITELINK REFL TXSL BRNTS 0.1µ TXTX+ 0.1µ 0.1µ (RTXF) 60.4K (RNTX) 261K 0.01µ 500V (RNTS) RING RING2 RING RING2 RXRX+ (RDCS1A) 6.49M (RDCS1B) 6.49M (CDCS) 0.027µ (RGAT) (RNTF) 499K CPC5602C 0.01µ 500V 100p (CGAT) DCS1 DCS2 0.1µ RX0.1µ SNP+ SNP15 (RRXF) 130K (RDCS2) 1.69M VDDL (RPB) 68.1 (RVDDL) ZDC) BRR76 (RHTF) 200K 221K HTX) (RZTX) 3.32K BRBR- (RZNT) RING (CSNP-) 220p (RSNPD) 1.5M (CSNP+) 220p (RSNP-2) 1.8M (RSNP+2) 1.8M (RSNP-1) 1.8M (RSNP+1) 1.8M NOTE: Unless otherwise noted: Resistor values Ohms resistors Capacitor values Farads. design tested found comply with Part with this Sidactor. Other compliance requirements require different part. power supplies require substitution inductor, Toko 380HB-2215 similar. Power Quality section Clare application note AN-146, Guidelines Effective LITELINK Designs more information. enhanced transhybrid loss. 4Use voltage ratings based isolation requirements your application. www.clare.com Rev. CPC5622 2.1.1 Resistive Termination Application Circuit Part List Quantity Reference Designator C13, C10, (optional) R44, R21, Description ±10% ±10% 0.01 ±10% 0.027 ±10% ±10% ±10% 80.6 1/16 1/16 1/16 68.1 1/16 60.4 1/16 1/10 1/16 1/16 1/16 1/16 1/16 1.69 1/16 3.32 1/16 1/16 6.49 1/16 1/16 ±5%, inductor 1/16 1/16 ferrite bead S1ZB60 bridge rectifier CPC5602 CPC5622 LITELINK Supplier(s) AVX, Murata, Novacap, Panasonic, SMEC, Tecate, etc. Panasonic, Electro Films, FMI, Vishay, etc. Murata BLM11A601S similar Shindengen, Diodes, Inc. Bourns (TISP4350H3) Teccor (P3100SC) Clare voltage ratings based isolation requirements your application. Typical applications will require safely hold isolation voltage. components that allow enough space account possibility high-voltage arcing. Rev. www.clare.com CPC5622 Reactive Termination Application Circuit Figure Reactive Termination Application Circuit Schematic (RTX) 80.6K TXSM MODE LITELINK REFL TXSL BR31 0.1µ TXTX+ 0.1µ 0.1µ (RTXF) 60.4K (RNTX) 110K 0.01µ 500V (RNTS) RING RING2 (RNTF) 221K DCS1 DCS2 (RDCS1A) 6.49M (RDCS1B) 6.49M (CDCS) 0.027µ (RGAT) RING RING2 RXRX+ CPC5602C 0.01µ 500V 100p (CGAT) 0.1µ RX0.1µ SNP+ SNP15 (RRXF) 130K (RDCS2) 1.69M VDDL (RPB) 68.1 (RVDDL) ZDC) (RHTF) 200K (RHTX) 200K (RZNT1) (CZNT) 0.68µ BRBR- (RZTX) BRBR- RING (RZNT2) (CSNP-) 220p (RSNPD) 1.5M (CSNP+) 220p (RSNP-2) 1.8M (RSNP+2) 1.8M (RSNP-1) 1.8M (RSNP+1) 1.8M NOTE: Unless otherwise noted: Resistor values Ohms resistors Capacitor values Farads. design tested found comply with Part with this Sidactor. Other compliance requirements require different part. power supplies require substitution inductor, Toko 380HB-2215 similar. Power Quality section Clare application note AN-146, Guidelines Effective LITELINK Designs more information. RZDC sets loop-current limit, "Setting Current Limit" page Also Clare application note AN-146 heat sinking recommendations CPC5602C FET. voltage ratings based isolation requirements your application. www.clare.com Rev. CPC5622 2.2.1 Reactive Termination Application Circuit Part List Quantity 1Use Reference Designator C13, C10, R44, R21, Description ±10% ±10% 0.01 ±10% 0.027 ±10% ±10% 0.68 ±10% 80.6 1/16 1/16 1/16 68.1 1/16 60.4 1/16 1/10 1/16 1/16 1/16 1/16 1/16 1/16 1.69 1/16 1/16 1/16 6.49 1/16 1/16 ±5%, inductor 1/16 1/16 ferrite bead S1ZB60 bridge rectifier CPC5602 CPC5622 LITELINK Supplier AVX, Murata, Novacap, Panasonic, SMEC, Tecate, etc. Panasonic, Electro Films, FMI, Vishay, etc. Murata BLM11A601S similar Shindengen, Diodes, Inc. Bourns (TISP4350H3) Teccor (P3100SC) Clare voltage ratings based isolation requirements your application. Typical applications will require safely hold isolation voltage. components that allow enough space account possibility high-voltage arcing. Rev. www.clare.com CPC5622 Using LITELINK full-featured telephone line interface, LITELINK performs following functions: termination slope control impedance control 2-wire 4-wire conversion (hybrid) Current limiting Ringing detect signalling reception Caller signalling reception Switch hook LITELINK's ringing detector amplifiers both active. Asserting causes LITELINK answer originate call entering off-hook state. off-hook state, loop current flows through LITELINK. On-hook Operation: OH=1 LITELINK application circuit leakage current less than with across ring tip, equivalent greater than on-hook resistance. LITELINK accommodate specific application features without sacrificing basic functionality performance. Application features include, limited High transmit power operation Pulse dialing Ground start Loop start Parallel telephone off-hook detection (line intrusion) Battery reversal detection Line presence detection World-wide programmable operation 3.2.1 Ringing Signal Reception Snoop Circuit on-hook state asserted), internal multiplexer engages snoop circuitry. This circuit simultaneously monitors telephone line conditions; incoming ringing signal caller data bursts. Refer application schematic diagram (see Figure page (CSNP-) (CSNP+) provide high-voltage isolation barrier between telephone line SNP- SNP+ input pins LITELINK while coupling signals snoop amplifier. snoop circuit "snoops" telephone line continuously while drawing current. LITELINK, incoming ringing signals compared reference level. When ringing signal exceeds preset threshold, internal comparators generate RING RING2 signals which output from LITELINK pins respectively. Selection which output dependent upon support logic responsible monitoring filtering ringing detect signals. reduce eliminate false ringing detects this signal should digitally filtered qualified system valid ringing signal. logic output RING RING2 indicates that LITELINK ringing signal detect threshold been exceeded. absence incoming signal RING RING2 outputs held high. CPC5622 RING output signal generated half-wave ringing detector while RING2 output generated full-wave ringing detector. half-wave ringing detector's output frequency follows frequency incoming ringing signal from Central Office (CO) while full-wave ringing detector's output frequency twice that incoming signal. Because RING output half-wave detector, will output logic pulse cycle ringing frequency. Also, because RING2 output Rev. This section data sheet describes LITELINK operation standard configuration usual operation. Clare offers additional application information on-line (see Section page following topics: Circuit isolation considerations Optimizing LITELINK performance Data Access Arrangement architecture LITELINK circuit descriptions Surge protection considerations Other specific application materials also referenced this section appropriate. Switch Hook Control (On-hook Off-hook States) LITELINK operates conditions, on-hook off-hook. on-hook condition telephone line available calls. off-hook condition telephone line engaged. control input used place LITELINK these states. With high, LITELINK on-hook ready make receive call. Also while on-hook, www.clare.com CPC5622 full-wave detector will output logic pulses cycle ringing frequency. Hence, nomenclature RING2 twice output pulses. set-up ringing detector comparator causes RING output pulses remain most half-cycle ringing signal remains high entire second half-cycle ringing signal. RING2 output, pulses remain during most both halves ringing cycle returns high only short period near zero-crossing ringing signal. Both ringing outputs remain high during silent interval between ringing bursts. Hysteresis employed LITELINK ringing detector circuit improve noise immunity. ringing detection threshold depends values (RSNPD), (RSNP-), (RSNP+), (CSNP-), (CSNP+). value these components shown application circuits recommended typical operation. ringing detection threshold changed according following formula: 750mV RINGPK SNPD SNPD -TOTAL RING external snoop circuit components from valid ringing signal. 3.2.3 On-hook Caller Signal Reception On-hook Caller IDentity (CID) data burst signals coupled through snoop components, buffered through LITELINK output RXpins. North America, data signals typically sent between first second ringing signal while other countries information arrive prior other signalling state. applications that transmit after first ringing burst such North American, follow these steps receive on-hook caller data LITELINK outputs: Detect first full ringing signal burst RING RING2. Monitor process data from outputs. applications China Brazil where arrive prior ringing, follow these steps receive on-hook caller data LITELINK outputs: Simultaneously monitor data from outputs ringing RING RING2. Process appropriate signalling data. Note: Taking LITELINK off-hook (via pin) disconnects snoop path from receive outputs disables ringing detector outputs RING RING2. gain from ring determined Where: RSNPD application circuits shown this data sheet. RSNPTOTAL total R44, application circuits shown this data sheet. CSNP application circuits shown this data sheet. RING frequency ringing signal. Clare Application Note AN-117 Customize Caller Gain Ring Detect Voltage Threshold spreadsheet trying different component values this circuit. Changing ringing detection threshold will also change caller gain timing polarity reversal detection pulse, used. SNPD GAIN -SNP TOTAL SNPD 3.2.2 Polarity Reversal Detection On-hook State full-wave ringing detector CPC5622 makes possible detect ring battery polarity reversal using RING2 output. When polarity battery voltage applied ring reverses, pulse RING2 indicates event. system logic must able discriminate single pulse approximately msec when using recommended Where: RSNPD application circuits this data sheet. RSNPTOTAL total R44, application circuits this data sheet. CSNP application circuits this data sheet. frequency signal Rev. www.clare.com CPC5622 recommended components application circuits yield gain 0.26 2000 Clare Application Note AN-117 Customize Caller Gain Ring Detect Voltage Threshold spreadsheet trying different component values this circuit. Changing gain will also change ringing detection threshold timing polarity reversal detection pulse, used. single-ended receive applications where only output used, snoop circuit gain adjusted back changing value snoop series resistors from 1.8M 715k. This change results negligible modification ringing detect threshold. application note AN-157, Increased LITELINK Transmit Power more information. Figure Differential Single-ended Receive Path Connections LITELINK Host-side CODEC Voice Circuit RX0.1uF 0.1uF LITELINK 0.1uF Off-Hook Operation: OH=0 3.3.1 Receive Signal Path Signals from telephone network appear ring connections application circuit. Receive signals extracted from transmit signals LITELINK two-wire four-wire hybrid then converted infrared light receive path LED. intensity light modulated receive signal coupled across electrical isolation barrier SELV side photodiode. host equipment (low voltage) side barrier, receive signal converted photodiode into photocurrent. photocurrent, linear representation receive signal, amplified converted differential voltage output RX-. Variations gain controlled within ±0.4 factory gain trim. accommodate single-supply operation, LITELINK includes small bias outputs Vdc. Most applications should couple receive outputs shown Figure LITELINK used differential single-ended output shown Figure Single-ended will produce less signal output amplitude. exceed referenced (2.2 VP-P) signal output level with standard application circuits. 3.3.2 Transmit Signal Path Transmit signals from CODEC TXpins LITELINK should coupled through capacitors shown Figure minimize offset errors. Differential transmit signals converted single-ended signals within LITELINK then coupled optical transmit amplifier manner similar receive path. output optical amplifier coupled voltage-to-current converter transconductance stage where transmit signal modulates telephone line loop current. receive path, transmit gain calibrated factory, limiting insertion loss ±0.4 Differential single-ended transmit signals into LITELINK should exceed signal level referenced VP-P). output power levels above 0dBm consult application note AN-157, Increased LITELINK Transmit Power more information. www.clare.com Rev. CPC5622 Figure Differential Single-ended Transmit Path Connections LITELINK Host CODEC Transmit Circuit LITELINK refer guidelines thermal management provided AN-146, Guidelines Effective LITELINK Designs. 0.1uf TXA1 TXA2 0.1uf TXTX+ Characteristics 3.6.1 Resistive Termination Applications North American Japanese telephone line termination requirements with resistive 2-wire termination. these applications LITELINK's 2-wire network termination impedance resistor RZNT (R10) located (pin with value 301. Host CODEC Transmit Circuit LITELINK 0.1uf TXA1 TXTX+ 3.6.2 Reactive Termination Applications Many countries single-pole complex impedance model telephone network transmission line characteristic impedance shown table below. Initialization Requirement Following Power-up must de-asserted (set logic high) once after power-up least 50ms transfer internal gain trim values within LITELINK. This would normal operation most applications. Failure comply with this requirement will result transmission gain errors possibly distortion. Line Impedance Model Australia China Characteristics CPC5622 designed worldwide applications. Modification values components ZDC, DCS1, DCS2 pins allow control slope characteristics LITELINK. Selecting appropriate resistor values RZDC (R16) RDCS2 (R15) provided application circuits enable compliance with various requirements. Proper gain termination impedance circuits complex impedance requires complex network shown "Reactive Termination Application Circuit" page 3.6.3 Mode Usage Assert MODE (MODE introduces into transmit path adds gain receive path. These changes compensate gain changes made transmit receive paths necessary reactive termination implementations. Overall insertion loss with reactive termination application circuit MODE asserted Overall insertion loss with MODE de-asserted (MODE resistive termination application circuit 3.5.1 Setting Current Limit LITELINK includes telephone line current limit feature that selectable choosing desired value RZDC (R16) using following formula: Amps 0.008A Clare recommends using RZDC most applications, limiting telephone line current Whether using recommended value above when setting RZDC higher lower loop current limit Rev. www.clare.com CPC5622 Regulatory Information LITELINK used build products that comply with requirements TIA/EIA/IS-968 (formerly part 68), part 15B, TBR-21, EN60950, UL1950, EN55022B, IEC950/IEC60950, CISPR22B, EN55024, many other standards. LITELINK provides supplementary isolation. Metallic surge requirements through inclusion crow protection device application circuit. Longitudinal surge protection provided LITELINK's optical-across-the-barrier technology high-voltage components application circuit needed. information provided this document intended inform equipment designer sufficient assure proper system design regulatory compliance. Since equipment manufacturer's responsibility have their equipment properly designed conform relevant regulations, designers using LITELINK advised carefully verify that their end-product design complies with applicable safety, EMC, other relevant standards regulations. Semiconductor components rated withstand electrical overstress electrostatic discharges resulting from inadequate protection measures board system level. LITELINK Design Resources Clare, Inc. Design Resources Clare, Inc. site wealth information useful designing with LITELINK, including application notes reference designs that already meet applicable regulatory requirements. LITELINK data sheets also contains additional application design information. following links: LITELINK datasheets reference designs Application note AN-117 Customize Caller Gain Ring Detect Voltage Threshold Application note AN-146, Guidelines Effective LITELINK Designs Application note AN-155 Understanding LITELINK Display Feature Signal Routing Applications www.clare.com Rev. CPC5622 LITELINK Performance following graphs show LITELINK performance using North American application circuit shown this data sheet. Figure Receive Frequency Response Figure 10.Transmit Ring Gain THD+N -100 -120 1000 1500 2000 2500 3000 3500 4000 -140 1000 1500 2000 Frequency 2500 3000 3500 4000 Frequency Figure Transmit Frequency Response Figure 11.Transhybrid Loss Gain 1000 1500 2000 2500 3000 3500 4000 1000 1500 2000 2500 3000 3500 4000 Frequency Frequency Figure Receive Figure 12.Return Loss THD+N Return Loss (dB) -100 -120 -140 1000 1500 2000 Frequency 2500 3000 3500 4000 1000 1500 2000 Frequency (Hz) 2500 3000 3500 4000 Rev. www.clare.com CPC5622 Figure 13.Snoop Circuit Frequency Response Gain (dBm 1000 1500 2000 2500 3000 3500 4000 Frequency (Hz) Figure 14.Snoop Circuit 1.5K 2.5K 3.5K Figure 15.Snoop Circuit Common Mode Rejection -2.5 -7.5 -12.5 -17.5 -22.5 -27.5 CMRR (dBm) -32.5 -37.5 -42.5 -47.5 -52.5 -57.5 Frequency (Hz) www.clare.com Rev. CPC5622 Manufacturing Information Mechanical Dimensions Figure Dimensions 10.287 .254 (0.405 0.010) Max. 7.493 0.127 (0.295 0.005) 10.363 0.127 (0.408 0.005) 0.635 (0.025 7.239 0.051 (0.285 0.002) 1.016 Typ. (0.040 Typ.) 0.203 (0.008) 0.635 0.076 (0.025 0.003 TYP) 2.134 Max. (0.084 Max.) 1.981 0.051 (0.078 0.002) 0.330 0.051 (0.013 0.002) 9.525 0.076 (0.375 0.003) 0.102 (0.004 MAX) DIMENSIONS (Inches) Coplanar 0.08/(0.003) Figure Recommended Printed Circuit Board Layout 11.380 (0.448) 1.650 (0.065) 0.635 (0.025) 0.330 (0.013) 9.730 (0.383) Rev. www.clare.com CPC5622 Tape Reel Packaging Figure Tape Reel Dimensions 330.2 DIA. (13.00 DIA) Cover Tape Thickness .102 MAX. (.004 MAX) 16.30 (0.642 MAX) 10.70 (0.421) Embossed Carrier Cover Tape 2.70 (0.106) 4.90 (0.193) 12.00 (0.172) Feed Direction 10.90 (0.430) Embossment Dimensions (inches) Manufacturing Assembly Processes 7.3.1 Moisture Reflow Sensitivity Clare characterized moisture reflow sensitivity LITELINK using IPC/JEDEC standard J-STD-020. Moisture uptake from atmospheric humidity occurs diffusion. During solder reflow process, which component attached PCB, whole body component exposed high process temperatures. combination moisture uptake high reflow soldering temperatures lead moisture induced delamination cracking component. prevent this, this component must handled accordance with IPC/JEDEC standard J-STD-020 labelled moisture sensitivity level (MSL), level 7.3.2 Reflow Profile Recommended soldering processes limited 245°C component body temperature seconds. 7.3.3 Washing Ultrasonic cleaning LITELINK will cause permanent damage device. Clare does recommend ultrasonic cleaning chlorinated solvents. additional information please visit www.clare.com Clare, Inc. makes representations warranties with respect accuracy completeness contents this publication reserves right make changes specifications product descriptions time without notice. Neither circuit patent licenses indemnity expressed implied. Except forth Clare's Standard Terms Conditions Sale, Clare, Inc. assumes liability whatsoever, disclaims express implied warranty relating products, including, limited implied warranty merchantability, fitness particular purpose, infringement intellectual property right. products described this document designed, intended, authorized, warranted components systems intended surgical implant into body, other applications intended support sustain life, where malfunction Clare's product result direct physical harm, injury, death person severe property environmental damage. Clare, Inc. reserves right discontinue make changes products time without notice. Specification: DS-CPC5622 Rev. Copyright 2005, Clare, Inc. LITELINK® registered trademark Clare, Inc. rights reserved. Printed USA. 2/18/2005 Other recent searchesSOGN-0001 - SOGN-0001 SOGN-0001 Datasheet Pseudo - Pseudo Pseudo Datasheet random - random random Datasheet number - number number Datasheet generation - generation generation Datasheet using - using using Datasheet linear - linear linear Datasheet feedback - feedback feedback Datasheet shift - shift shift Datasheet registers - registers registers Datasheet OL3356L - OL3356L OL3356L Datasheet NES1823P-30 - NES1823P-30 NES1823P-30 Datasheet LSR20241 - LSR20241 LSR20241 Datasheet CSTLS10M0G53-B0 - CSTLS10M0G53-B0 CSTLS10M0G53-B0 Datasheet 1981020000 - 1981020000 1981020000 Datasheet
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