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This document gives overview receiver chain AT86RF211S associated embe


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Data Demodulation Crystal Selection AT86RF211S
This document gives overview receiver chain AT86RF211S associated embedded features: Discriminator: Demodulation signal (principle, measurement/tuning output voltage) Data slicer:From analog digital world (different modes functioning, data slicer threshold) also emphasizes possibilities AT86RF211S Selection lower cost crystal Data rate kbps Frequency deviation wider than ±100
AT86RF211S Transceiver Radio Applications Application Note
From Analog Digital
Demodulation
2.1.1 Principle modulation used AT86RF211S consists coding each follows: "0": transmission signal frequency "1": transmission signal frequency channel frequency carrier) middle frequency F1)/2 called frequency deviation
receiver therefore overall task Down-convert signal lower frequencies (for filtering purposes): 10.7 Convert frequencies into voltages discriminator) Make decision separate from levels data slicer)
Rev. 5418A-WIRE-04/05
Figure 2-1.
Principle Demodulation
Signal down-converted 10.7
down-conversion
filtering stage
filtering stage
Discriminator Converter
10.7 bandwidth hundreds
bandwidth tens SYNCHRONOUS RESHAPED CMOS LEVELS
DATAMSG Data slicer threshold DATACLK CLOCK RECOVERY
Embedded function
AT86RF211S discriminator analog: output voltage proportional input frequency. particularly designed accept very long sequence "zeros" "ones" (i.e. constant input frequency). This case receivers other words, with some transceivers necessary DC-free data encoding).
Figure 2-2.
Classic Discriminator without Ability
Sequence
AT86RF211S Application Note
5418A-WIRE-04/05
AT86RF211S Application Note
Figure 2-3. AT86RF211: Discriminator with Ability
Sequence
2.1.2
Standard/Narrowband Modes Discriminator Since output swing discriminator proportional input frequency deviation, small frequency deviations (used narrowband applications) lead smaller peak-to-peak values discriminator output. this reason, discriminator's gain selected. AT86RF211S features four different gains NDB, SDB, where fully compatible with AT86RF211.
slope demodulator Standard Discriminator Bandwidth mode: mV/kHz 2.4V volt power supply) Narrow Discriminator Bandwidth mode: mV/kHz 2.4V (+10 volt power supply) Medium Discriminator Bandwidth mode: mV/kHz 2.4V volt power supply) Wide Discriminator Bandwidth mode: mV/kHz 2.4V volt power supply) 2.1.3 System Requirements order system operate properly, basic requirements following: frequency deviation must accordance with data rate (the higher data rate, larger frequency deviation). down-converted frequencies must remain within filters over entire operating conditions (temperature range, ageing), particularly when narrow filter used. typical values are: 10.7 filter: ±150 (ceramic filter) optional second filter: ±17.5 (ceramic filter). output discriminator must exceed maximum allowed voltage range. level DISCOUT depends several parameters: received signal frequency, receiver local oscillator, amplifier offsets, etc. Important Notes: temperature drifts crystal often given (parts million) over given temperature range. MHz, with 10.245 crystal.
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crystal specifications this document (ageing temperature drifts) given bands. application band, these specifications relaxed multiplied These specifications (temperature ageing) include sides: overall drift must meet these requirements. Thanks high resolution AT86RF211S synthesizer (typically given accuracy achieved software: small shift frequency (made software) able compensate temperature ageing drift with additional hardware cost.
Data Slicing
Once frequency been converted into voltage, decision must made identify levels convert them into CMOS levels. This achieved thanks comparator. AT86RF211S offers data-slicing possibilities.
Figure 2-4.
Data Slicing
Data slicer threshold SKFILT
Data slicing options
Demodulated signal DISCOUT
Data slicer threshold level internal (DSREF)
With AT86RF211S, hold possible SKFILT capacitor. This helps maintain average value signal captured without discharge during reception message.
2.2.1
External Mode Comparing Signal Average Value first possibility consists comparing signal average value: capacitor SKFILT (pin charged average value signal.
AT86RF211S Application Note
5418A-WIRE-04/05
AT86RF211S Application Note
Figure 2-5.
Demodulator Output (DSIN)
"External" Comparison Mode: Signal Compared Average Value.
Data Slicer
100K
Data Slicer Threshold
DATAMSG
SKFILT
value capacitor trade-off: must enough make charging time short possible, high enough "memorize" level during length maximum number similar consecutive bits. lower data rate, higher capacitor. Practical values are: Data rate 2400 Data rate 4800 Data rate 9600 Data rate 19200 This procedure makes impossible receive signal containing component long sequence "1"): signal data slicer thresholds become very close another decision longer made. Therefore, adequate data encoding technique must used prevent component. Manchester encoding popular preventing existence component. consists encoding data follows: Logical "0": Logical "1": This way, long sequence "0s" will transformed into "0101010101." sequence. maximum similar successive high levels seen.
Note: Many other DC-free data encoding techniques possible that increase effectiveness encoding, principle operation same.
Thanks "Charge Hold" feature AT86RF211S, possible suppress message encoding. dedicated application note entitled "Benefits Charge Hold" reference 5420, available that details this.
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2.2.2
Internal Mode Comparing Signal Fixed Level second possibility consists comparing signal fixed threshold (that does depend signal itself). This very powerful mode: enables take advantage receiver's full bandwidth without need preamble (the first data sliced correctly processed microcontroller). Figure 2-6. Internal Comparison Mode: Signal Compared Fixed Level
DISCOUT
DATAMSG
Signal
DSIN
Fixed threshold (internally software, DTR[5:2])
this mode, system designer must make sure that data slicer threshold tuned close middle demodulated signal. Figure 2-7.
DISCOUT: demodulated data
"Internal" Comparison Mode
Comparator threshold Time
Notes:
active low-pass filter with transistor (Sallen-Key instance) inserted between DISCOUT DSIN, internal comparison mode must avoided offsets demodulated signal data slicer window. amp. does offset signal thereafter allowed active filtering. recommended simple low-pass filter instead active one.
2.2.3 2.2.3.1
Manchester Manchester frequency spectrum uniform (same number frequencies). demodulator simple level). Data slicing very easy (the default threshold middle demodulated signal). preamble charge capacitor correct value required. transitions required send bit. Since number transitions second limited hardware, number "useful" bits divided two. instance, with transitions second allowed AT86RF211S, useful bits transmitted this mode.
AT86RF211S Application Note
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AT86RF211S Application Note
2.2.3.2 Enhanced encoding effectiveness. internal mode used: there need preamble once threshold properly set-up (the first demodulated). transitions second useful bits. threshold must tuned (this done automatically through software). external mode used: Hold mode grants data slicer long streams `1'. there need preamble "charge" CSKFILT.
Embedded Tools Discriminator/Data Slicer Tuning
AT86RF211S relevant embedded tools tune output discriminator data slicer threshold meet requirements. these operations carried software.
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Measuring Output Discriminator
voltage DISCOUT read setting CTRL1[24] CTRL1[1] ="1": result stored into STATUS[23:18]. unmodulated carrier must input receiver least above sensitivity).
Tuning Output Level Discriminator
output voltage discriminator shifted down) setting: DISCHIGH (DTR[1]="1") adds positive offset output +220 (Vcc 2.4V) SDB. DISCLOW (DTR[0]="1") adds negative offset output -220 (Vcc 2.4V) SDB. obtains ±220 2.4V ±340 3.6V. This selection. NDB, shift (SDB) MDB, shift (SDB) 2/3. WDB, shift (SDB) 2/5.
Tuning Data Slicer Threshold
DTR[5:2] make possible tune data slicer threshold around Vcc/2. levels possible (LSB Volt supply voltage). Vcc/2 corresponds DTR[5:2] "0111", reset value 1000. LSB's value usual values power supply voltage: 2.4V: 2.7V: 3.3V: 3.6V:
AT86RF211S Application Note
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AT86RF211S Application Note
Deviations Crystal Specifications
Overall Procedure
Rule frequency deviation accordance with data rate that demodulation operated properly. Rule down-converted signals (10.7 MHz, kHz) remain within filters over whole operating conditions range, ageing). Rule output discriminator stays within guaranteed range over whole operating conditions range, ageing). Rule data slicer threshold must tuned close middle demodulated signal "internal" mode used. not, drift compensation naturally done thanks SKFILT capacitor charge.
Note:
"internal" mode data slicer mandatory SKFILT capacitor used reference level (the discriminator ability demodulate CW). user must choose relevant value this capacitor ensure that capacitor remains charged during "0000." "1111." sequences. this case, possible send infinite sequence with internal mode. instance, using with 9600 data rate sets limit correct sequence received similar bits.
encoding used, then "Charge Hold" mode operated. allows SKFILT capacitor "hold". average level captured during preamble then kept during entire message. application note dedicated this subject available, entitled "Benefits Charge Hold" reference 5420.
4.1.1
Meeting Rule chosen deviation must wide possible maximize sensitivity. recommended minimum deviations following: <4800 bps: 9600 bps: 19,200 bps: 38,400 bps: ±19.2 50,000 bps: 100,000 bps: 128,000 bps:
4.1.2
Meeting Rule limitation very often comes from narrow bandwidth filter. margin must considered between total deviation bandwidth otherwise distortion appear. example, with bandwidth kHz, recommended have deviation wider than kHz. addition, drift crystal implies drift signal into filter. course, thanks fine software tuning synthesizer, this compensated very easily.
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4.1.3
Meeting Rule minimum maximum levels DISCOUT that must exceeded are: From 0.4V 2.2V 2.4V (total range 1.8V) From 0.7V 3.5V 3.6V (total range 2.8V) level DISCOUT frequency deviation crystal drifts natural level discriminator
natural level discriminator, understood with pure IF2IN, depends NDB, SDB, selection temperature. temperature drift neglected only crystal drifts need considered. These parameters lead Equivalent Deviation Range crystal drifts deviation). Without DISCHIGH/DISCLOW compensation, limits are:
Equivalent Deviation Range Maximum Notes: Example Deviation/Drifts (868/915 Bands) Deviation Crystal Drifts
previously noted, crystal drifts must understood +Tx) drifts. deviations expected user. drifts thereby modified accordance with EDR. band, crystal drifts relaxed initial tolerance crystal considered when mentioning drifts.
DISCHIGH/DISCLOW compensation possible selections. However, recommended SDB, natural level DISCOUT enough require compensation. above-described deviations tolerances wide enough enable application requirements. This compensation interest selection relax constraints over crystals. Moreover, once DISCHIGH/DISCLOW compensation done production bench, there expected drifts except those crystals. then becomes approximately providing relaxed crystal constraint compared non-compensated one. DISCHIGH/DISCLOW compensation means that best setting leading smallest offset from VCC/2 been programmed.
AT86RF211S Application Note
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AT86RF211S Application Note
4.1.4 Meeting Rule must ensure that demodulated data correctly data-sliced reshaped. ''external'' mode used, average level demodulated signal reference data slicer. There problem meeting rule ''external'' mode used combination with ''Charge Hold" mode, average level demodulated signal captured kept reference data slicer. There problem meeting rule n°4. ''internal'' mode used, reference level data slicer output. Therefore, must ensure that demodulated signal stays window data slicer comparator. "internal" level production bench, then stored memory application module. Afterwards, drifts considered compensated only drifts crystals, discriminator offers constant level over operating temperature range. data slicer from 2.4V) 3.6V). conversion gains discriminator expressed mV/ppm (instead mV/kHz) equivalent 868/915 bands. Therefore, whatever VCC, rule NBD: corresponds 0.80 SBD: corresponds 0.40 MBD: corresponds 0.25 WBD: corresponds 0.15
recommend that "internal" level checked modified accordance with following rule, where DSIN peak-to-peak demodulated signal corresponding current application: LSB: check each time drift corresponds LSB: check each time drift corresponds LSB: check each time drift corresponds following table derives from afore-described rules, providing maximum drifts allowed between "internal" corrections:
LSB) LSB) LSB)
current application does exceed these limits, only production bench setting mandatory. subsequent applications exceed these limits, compensation will necessary (based temperature conditions).
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Examples: selection with modulation kHz, data rate, operated band: peak-to-peak signal after demodulation range ±340 DAC's Therefore, voltage swing equals times LSB. compensation required drifts expected, whether from side, combination both. operated band, this constraint relaxed drift ppm.
selection with modulation kHz, kbps, operated band: peak-to-peak signal after demodulation range ±450 Notice that data rates, would ±550 because FCUT-OFF discriminator, kbps, signal less swing. DAC's Therefore, voltage swing equals times LSB. compensation required approximately drifts expected, whether from side. operated band, this drift relaxed ppm. This means that such applications, that compensation necessary.
AT86RF211S Application Note
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AT86RF211S Application Note
Appendix
Setting DTR[5:2]
This appendix relevant only internal data slicer mode used. given sequence feeds receiver with 010101. (50% duty cycle). DTR[5:2] tuned from "0000" "1111". lowest values, comparator level low, thereafter DATAMSG showing only discriminator output always below comparator threshold. highest values, comparator level high thereafter DATAMSG showing only discriminator output always above comparator threshold. value chosen which DATAMSG shows correct message DATAMSG pin. This value middle between "last" DTR[5:2] showing only DATAMSG "first" DTR[5:2] showing only DATAMSG pin. value [5:2] register stored application memory.
5.1.1
Duty Cycle Method (Internal Data Slicer Mode Only) given sequence feeds receiver 010101. (50% duty cycle). DTR[1:0] DTR[5:2] tuned have duty cycle output data slicer close possible 50%.
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Appendix
AT86RF211S Relevant Registers
CTRL1[24] CTRL1[6] CTRL1[4] CTRL1[1] [5:2] STATUS [23:18] MVCC: selection mode (RSSI Voltage) FSKBW: selection bandwidth discriminator DSREF: selection data slicing mode (internal external) MOFFSET: measurement level DISCOUT modulation) DSREF: word reference level adjustment data slicer threshold DISCHIGH: positive shift level DISCOUT DISCLOW: negative shift level DISCOUT MVCC: stores word
Extended mode:
CTRL1[0]=1
DTR[26:25]: DISCRANGE selection bandwidth range discriminator.
AT86RF211S Application Note
5418A-WIRE-04/05
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