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AKD4702

Evaluation board Rev.A for AK4702

ASAHI KASEI
AKD4702
Evaluation board Rev.A for AK4702
AKD4702 -Evaluation board for AK4702 (Cable for connecting with printer port of IBM-AT compatible PC and control software are enclosed with board.)
D5V VVD2 VVD1
PORT3 µ P-IF Control Data 10pin Heder Port1
AD DATA ROM DATA 10pin Header
(Digital)
JP8 JP9
TVOUTR VCROUTR TVINL VCRINL VCRSB VCRB TVSB VCRINR TVINR MONOIN VCROUTL
JP2~ 5
PORT2 Opt In
J1 EXT JP1 Clock Generator
AK4702
VCRVOUT
TVVOUT
ENCRC
TVVIN
VCRFB
VCRVIN
VCRRC
Figure 1. AKD4702 Block Diagram l Circuit diagram and PCB layout are attached at the end of this manual.
TVOUTL
MONOOUT
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AKD4702
n Operation sequence
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AKD4702
n Evaluation mode 1) S / PDIF mode (Optical Link or BNC: default)
Table 1. DIP-switch set-up Please match the data format of AK4702 via I C-bus control as following notes. Note 1. 16bit LSB justified Set up the DIP-switch as follows.
S1 AK4112B ON OFF
(Reserved) (Reserved) (Reserved) (Reserved)
Set up the control registers DIF1 / 0 of AK4702 by enclosed software as follows.
Note 2. 18bit LSB justified Set up the DIP-switch as follows.
ON OFF
Set up the control registers DIF1 / 0 of AK4702 by enclosed software as follows.
CM0 DIF2 DIF0
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AKD4702
Note 3. MSB justified Set up the DIP-switch as follows.
S1 AK4112B ON OFF
(Reserved) (Reserved) (Reserved) (Reserved)
Set up the control registers DIF1 / 0 of AK4702 by enclosed software as follows.
Note 4. I2S Set up the DIP-switch as follows.
ON OFF
Set up the control registers DIF1 / 0 of AK4702 by enclosed software as follows.
CM0 DIF2 DIF0
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AKD4702
1)-2. Jumper pins set up
JP1 EXT
JP2 MCLK
JP3 BICK
JP4 SDTI
JP5 LRCK
The JP6 selects the input port of S / P DIF bitstream form Port2 (TOTX176) or J2 (BNC RX).
BNC Using TORX
BNC Using BNC
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AKD4702
Table 2. DIP-switch set-up
2)-2. Jumper pins set up
JP1 EXT JP2 MCLK JP3 BICK JP4 SDTI JP5 LRCK
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AKD4702
3) Feeding all clocks from external
Table 3. DIP-switch set-up 3)-2. Jumper pins set up JP1 EXT JP2 MCLK JP3 BICK JP4 SDTI JP5 LRCK
n Other jumper pins set up
JP12(VCRRC): Input Jack selection for the VCRRC pin of AK4702 When the VCRC pin of AK4702 outputs 0V by setting CIO bit to "1", the signal can be fed through the J27 (VCRCOUT) to VCRRC pin. "I": The signal is fed through the J18(VCRRC) to VCRRC pin. (Default) "I / O": The signal is fed through the J27(VCRCOUT) to VCRRC pin. The CIO bit of AK4702 should be set to "1".
JP7(GND): Analog ground and digital ground Open: separated. (Default) Short: connected. (The jack "DGND" can be open.) JP7
DGND AGND
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AKD4702
n DIP-switch (S1) List
No. 1 2 3 4 5 Switch Name CM0 DIF0 DIF2 Default OFF OFF OFF OFF OFF Function Refer the "n Evaluation mode"
(Reserved) (Reserved) Table 4. DIP-switch list
Function
Clock source set-up
Short: Connect the DIR (AK4112B). (default) Open: Separate the DIR. Supply clocks via Port1.
TORX: Optical connector PORT2. (default) BNC: BNC connector J2.
Analog ground and digital ground 7 GND
Open: separated (default). Short: connected (The connector "DGND" can be open.).
Power supply source set-up for digital section of AKD4702. 8 D-A
Power supply source set-up for VD of AK4702. 9 REG
Power supply source set-up for VVD1 of AK4702. 10 VVD1
Power supply source set-up for VVD1 of AK4702. 11 VVD2
Input Selection for VCRRC 12 VCRRC
"I" side: Input to VCRRC from VCRRC jack. "I / O" side: Input to VCRC from VCRC jack. (Note: Refer CIO bit of AK4702)
Table 5. Jumper list
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AKD4702
n Serial Control
The AK4702 can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3 (µP-IF) with PC by 10 wire flat cable packed with the AKD4702. Be careful connector direction. Flat cable should be connected 10-pin header, red line put on 10pin header 5 and 6 pin.
Connect PC
SCL SDA SDA(ACK) AKD4702
RED 10 wire flat cable 5 10 pin Connector PORT3 µP-IF 6
10 pin Header
Figure 2. Connection of 10 pin flat cable for PORT3
n Input / Output port List
Table 6. Input / Output port List Signal Name J5 (VCRINL), J3 (VCRINR), J9 (TVINL), J8 (TVINR) J11 (MONOIN) J12 (VCROUTL), J10 (VCROUTR), J6 (TVOUTL), J7 (TVOUTR), J4 (MONOOUT) Port2 (TORX176) or J2 BNC (RX) J13 (ENCB), J15 (ENCG), J17 (ENCRC), J19 (ENCC), J21 (ENCV), J23(ENCY), J25(TVVIN), J14(VCRVIN), J18(VCRRC Note), J20(VCRG), J22(VCRB) J27 (VCRCOUT Note), J29 (TVVOUT), J30 (TVRC), J31 (TVG), J32 (TVB), J33 (RFV), J34 (VCRVOUT) J24 (VCRSB) J24 (VCRSB) , J28 (TVSB) J16 (VCRFB) J26 (TVFB) Notes Max: 2Vrms Max: 1Vrm Max: 3Vrm Max: D5V+0.3V Max: 1.5Vp-p Max: 3Vp-p Max: VP+0.3V Max: VP Max: VVD1+0.3V Max: VVD2
Input Audio Output Digital Input Input Video Output Slow Blanking Fast Blanking Input Output Input Output
Note: Refer JP12 and CIO bit of AK4702.
n The indication content for LED
LED turns on during each output is "H". LE1 (Unlock and Parity Error on S / P DIF): ERF of DIR (AK4112B). Normally off. LE2 (Validity Flag): V of DIR (AK4112B). Normally off.
n Toggle switch (SW1 on board) operation
"H": AK4702 is Active. "L": AK4702 is Powered Down . (Note When the power of AKD4702 is ON at first, SW1 should be switched from "L" to "H".)
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AKD4702
MEASUREMENT RESULTS n Audio
Plots
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AKD4702
n Video
Crosstalk DG DP
-52 -0.1 to +0.24 0 to +0.40
Plots
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AKD4702
Plots (Audio)
+0 -10 -20 -30 -40 -50 -60 d B r A -90 -100 -110 -120 -130 -140 -150 20 -70 -80
500 Hz
+0 -10 -20 -30 -40 -50 -60 d B r A -90 -100 -110 -120 -130 -140 -150 20 -70 -80
500 Hz
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AKD4702
+0 -10 -20 -30 -40 -50 -60 d B r A -90 -100 -110 -120 -130 -140 -150 20 -70 -80
500 Hz
Figure1-3. FFT (Noise Floor)
+0 -10 -20 -30 -40 -50 -60 d B r A -90 -100 -110 -120 -130 -140 -150 100 -70 -80
Figure1-4. FFT (Outband Noise)
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AKD4702
-60 dBFS
500 Hz
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AKD4702
-60 dBFS
-0.5 2k 4k 6k 8k 10k Hz 12k 14k 16k 18k 20k
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AKD4702
500 Hz
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AKD4702
Plots(Video)
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AKD4702
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AKD4702
CONTROL SOFTWARE MANUAL n Introduction
This is a manual of software that controls the AK4702, 2ch DAC with AV SCART switch. The enclosed software AKD4702.exe can control the registers of AK4702 using I2C control I / F.
n System Requirements
To use this software, the followings are required for PC.: · Windows 95 / 98 / ME / 2000 / XP. (This software does not operate on Windows NT.) · Printer port
n Set-up of evaluation board and control software
1. 2. Set up the AKD4702. Insert Connect IBM-AT compatible PC with AKD4702 by 10-line type flat cable (packed with AKD4702). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM disk when this control software is used on Windows 2000 / XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95 / 98 / ME, this installation is not needed. This control software does not operate on Windows NT.) The CD-ROM disk labeled "AKD4702 Control Program ver 1.0" into the CD-ROM disk drive.
n Operations
1 Execute the AKD4702.exe. Then the following window opens. The function of each button is shown below. Clicking the button does each operation in the alone.
Write defalt to all resisters.
Read all resisters.
Close this window.
" "means "1". Write each byte.
Space means "0".
Read the address in this box.
Read 08H.
Write the DATA to the address in this box.
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AKD4702
2 Write / Read Register There are two ways to Write / Read register. (1) Check box After checking each box of each bit, click the "Write" or "Read" button in the right end. " " in each check box means "1" and no check means "0". Each check mark toggles by clicking. The address 08H is Read-only. (2) Edit box There is an edit box in the left bottom. All register can be written and read using the edit box. When writing register, input the DATA and the Address in the box and click "Write" button. When reading register, input the Address in the box and click "Read" button.
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AKD4702
IMPORTANT NOTICE · These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. · AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. · Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. · AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. · It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
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AKD4702
MCLK BICK LRCK SDATA Logic
R2 10k Logic
Logic
EXT 74HCU04 22p C5 J1 BNC R3 75
(OPEN) C6 2 X1
(OPEN)
Logic
PORT2 6 5 6 5 GND VCC GND OUT 4 3 2 1 R-PACK5R 13
TORX176
C11 R8
BNC(RX)
Size A Date:
12.288MHz
DVDD DVSS TVDD V / TX XTI XTO PDN R AVDD AVSS RX1 DIF0 / RX2 DIF1 / RX3 DIF2 / RX4
CM0 / CDTO CM1 / CDTI OCKS1 / CCLK OCKS0 / CSN MCK01 MCK02 DAUX BICK SDTO LRCK ERF FS96 P / S AUTO
R82 10k R83 INTRUPT
JP2 MCLK
MCLK BICK SDTI LRCK Logic
JP3 JP4 JP5
BICK SDTI LRCK
AK4112BVF
74HCU04
DIF0 DIF2 CM0 DIF0 DIF2
U2C S1
AK4112B
74HCU04
Logic
U2D 9 8 74HCU04
CM0 DIF0 DIF2
U2E 11 10 74HCU04 U2F 12 74HCU04
JP6 RX TORX
BNC Title Document Number
AKD4702
AK4112B
Sheet
JP7 GND SCL
Resister Contorol
SDA Analog Ground PDN Digital Ground R10 R11 R12 R9
LRCK SDTI BICK MCLK
C12 DAC input
(VVSS) +C16
48 47 46 45 44 43 42 41 40 39 38 37 (VVSS) (VVSS)
C20 +C21
VCRVOUT
(VVSS2)
VCRC VVSS2 TVVOUT VVD2 TVRC TVG TVB VVD1 ENCB ENCG ENCRC
PVCOM DVCOM VP MONOOUT
(VVSS)
TVOUTL TVOUTR VCROUTL VCROUTR MONOIN TVINL TVINR INTRUPT VCRINR
AK 4702
MONOOUT TVOUTL TVOUTR VCROUTL VCROUTR
Analog output
(VVSS2) Video Block output
VCRC TVVOUT TVRC TVG TVB RFV VCRVOUT TVFB TVSB VCRSB ENCB ENCG ENCRC ENCC ENCV ENCY TVVIN VCRVIN VCRFB VCRRC VCRG VCRB
MONOIN TVINL TVINR VCRINL VCRINR
Analog input
VCRVIN
VCRRC
VCRSB
VCRFB
ENCC TVVIN ENCV ENCY
VCRINL
Video Block input / output
Video Block input
INTRUPT
Title Size A Date: Document Number
AKD4702
AK4702
Sheet
VCRINR R17 0.47u (open)
(VVSS)
MONOOUT 10k
J3 VCRINR
MONOOUT
(VVSS) (VVSS)
(VVSS) J6
VCRINL R21 0.47u (open) J8 TVINR
(VVSS)
TVOUTL 10k
J5 VCRINL
+ (VVSS)
TVOUTL
(VVSS)
(VVSS) J7
From Analog output
TVINR R26 0.47u (open)
(VVSS) (VVSS)
TVOUTR 10k
TVOUTR
FOR Analog input
(VVSS) C31 R28
(VVSS) J10
TVINL R29 0.47u (open)
VCROUTL 10k
J9 TVINL
+ (VVSS)
VCROUTL
(VVSS)
(VVSS) R32 J12
MONOIN R33 0.47u (open)
(VVSS) (VVSS)
VCROUTR 10k
J11 MONOIN
VCROUTR
(VVSS)
Title Size A Date:
Document Number
AKD4702
Sheet
Friday, April 11, 2003
Analog Input / Output Circuit
Logic 10k
100 SCL Logic
D1 R38
U5A 1 2 74HCT14 C34 SW1 3 U5B 4 74HCT14 PDN
10k SCL SDA SDA(ACK)
U5C 5 6 74HCT14 1
U6A 2 74LS07 U6B 4 74LS07 U6D 8 74LS07 U6E 10 74LS07 U6F 12 74LS07
R42 U6C 6 74LS07
Logic SDA
(short)
74HCT14 U5E 11 10 74HCT14 U5F 13 12 74HCT14
SDA(ACK)
D5V JP8 Logic D-A
T1 NJM78M05FA
+12V R44
GND 3 OUT IN
+12V Short
47u R45 +5V Short VVD1 JP10 VDD1 VVD2
47u Logic
C41 0.1u Logic 47u 0.1u
C42 0.1u
C43 0.1u
C44 0.1u
C45 + C40 0.1u 47u
R14 5.1
for 74HCT14, 74HCU04, 74LS07, 74HCT541
Title
R13 VVD2 short
JP11 VDD2
Size A Date:
Document Number
AKD4702
Sheet
POWER SUPPLY
J13 ENCB
R70 (short)
R46 75
J14 VCRVIN ENCB R47 75
(VVSS2) (VVSS2)
R77 (short)
C51 VCRVIN 0.1u
(VVSS2)
J15 ENCG
(VVSS2)
R71 R48 75 (short)
J16 VCRFB ENCG R49 75
(VVSS2) (VVSS2)
R78 VCRFB 300
(VVSS2)
(VVSS2) R72
J17 ENCRC R50 75
C53 ENCRC 0.1u
J18 VCRRC R51 75
(VVSS2) (VVSS2)
JP12 I
R79 (short)
C54 VCRRC 0.1u VCRCOUT
(short)
(VVSS2)
J19 ENCC R52 75
(VVSS2) (VVSS2)
R73 (short)
C55 ENCC 0.1u
J20 VCRG R53 75
(VVSS2) (VVSS2)
R80 (short)
C56 VCRG 0.1u
J21 ENCV
R74 R54 75 (short)
C57 ENCV 0.1u
J22 VCRB R55 75
(VVSS2) (VVSS2)
R81 (short)
C58 VCRB 0.1u
(VVSS2)
J23 ENCY R57 75
(VVSS2) (VVSS2)
R75 (short)
C59 ENCY 0.1u
J24 VCRSB R58 10K
(VVSS) (VVSS)
R56 VCRSB 300
J25 TVVIN R59 75
(VVSS2)
R76 (short)
C60 TVVIN 0.1u
Size A Date:
Title Document Number
AKD4702
Sheet
(VVSS2)
Video Block Input Circuit
75 VCRC
VCRCOUT RFV
VCRCOUT
R63 J29
(VVSS2)
75 TVVOUT
TVVOUT
R60 J26
75 TVFB
(VVSS2) R64 J30
75 TVRC
R62 J28
(VVSS2)
300 TVSB
(VVSS2) R65 J31
75 TVG
(VVSS2)
(VVSS2) R66 J32
75 TVB
(VVSS2) R68 J34
75 VCRVOUT
VCRVOUT
(VVSS2)
Title Size A Date:
Document Number
AKD4702
Sheet
Video Block Output Circuit