AKD4101A-B AK4101A Evaluation Board Rev.0 GENERAL DESCRIPTIO
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[AKD4101A-B]
AKD4101A-B
AK4101A Evaluation Board Rev.0
GENERAL DESCRIPTION AKD4101A-B evaluation board AK4101A, 192kHz DIT. AKD4101A-B interface with AKM's converter evaluation boards AKM's evaluation boards. Therefore, easy evaluate AK4101A. AKD4101A-B also digital audio interface achieve interface with digital audio systems optical link, unbalance balance connector. Ordering guide
AKD4101A-B -Evaluation board AK4101A cable connecting with printer port IBM-AT compatible control software packed with this. control software does operate Windows NT.)
FUNCTION Digital interface Compatible with types interface Direct interface with AKM's ADC, evaluation boards 10pin header Optical/BNC/XLR output Serial control data input/output port (10-pin port)
Control
AK4101A
C,U,V
Serial Data (For DIT)
Figure AKD4101A-B Block Diagram *Circuit diagram layout attached this manual.
<KM080100>
2005/10
[AKD4101A-B]
Evaluation Board Manual
Operating sequence power supply lines. (Red) [GND] (Black) evaluation mode jumper pins. (Refer following section.) Connect cables. (Refer following section.) Power AK4101A should reset once bringing PDN(SW2) upon power-up.
Evaluation modes Evaluation Serial Data in(10pin port) AK4101A S/PDIF out(optical, BNC)
MCLK BICK LRCK DAUX MCLK BICK LRCK DAUX
PORT5 (10pin Header)
AK4101A (DIT)
Optical, connector
S/PDIF
AKD4101A-B
MCLK, BICK, LRCK DAUX input 10pin header (PORT5: DIT). AKD4101A-B connected with AKM's evaluation board 10-line cable. Set-up Bi-phase output signal Connector JP19 (TXP) Optical (PORT4) (J3) (J4) Table Set-up
a-1. Set-up TXP/TXN TXP1/TXN1 TXP2/TXN2 TXP3/TXN3 TXP4/TXN4 JP21 (TXP) (short) (short) (short) (short) JP22 (TXN) (short) (short) (short) (short)
Table Set-up TXP/TXN
<KM080100>
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[AKD4101A-B]
Set-up clock input output used signals MCLK, LRCK, BICK SDTI (DAUX). signal level outputted inputted from PORT5 Clock PORT MCLK PORT5 BICK PORT5 LRCK PORT5 SDTI PORT5 (DAUX) Table Clock input/output CKS1 (SW3_5) CKS1 CKS0 (Sub_JP20) CKS0
MCLK
(max) Default
128fs 28k-192 256fs 28k-108 384fs 28k-54 512fs 28k-54 Table Master Clock Frequency Select
b-1. Set-up input/output BICK LRCK Please (DIT_I/O) according setup audio format AK4101A (Refer Table Audio format SW3_8 (DIT_I/O) Slave mode Master mode Table Set-up DIT_I/O Set-up audio data format sets 1_2, SW1_4 synchronous mode. Please DIF2-0 asynchronous mode. Mode DIF2 (SW1_4) DIF2 DIF1 (SW1_3) DIF1 DIF0 (SW1_2) DIF0 SDTI 16bit, Right justified 18bit, Right justified 20bit, Right justified 24bit, Right justified 24bit, Left justified 24bit, 24bit, Left justified 24bit, Table Audio format LRCK BICK 64fs 64fs 64fs 64fs 64fs 64fs 64-128fs 64-128fs
Default
Default
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[AKD4101A-B]
Inputs (synchronous mode)
synchronous mode (ANS=1), C(channel status), U(user data) V(validity) input 10pin header (PORT3: BCUV). output normal mode (TRANS=0), input audio routing mode (TRANS=1). case audio routing mode, BLS, directly input from AKD4114 10-line flat cable. layout PORT3 shown Figure
PORT3 BCUV
Figure PORT3 layout
Serial control
AK4101A controlled pins synchronous mode (ANS=1) internal register asynchronous mode (ANS=0). Synchronous/Asynchronous mode Table Mode Synchronous Asynchronous SW1-6 (ANS) JP18 (SDA/CDTO) FS3=1: Short "CDTO/CM0=H" side. FS3=0: Short "CM0=L" side. Short "CDTO/CM0=H" side. Table Synchronous/Asynchronous mode Sub_JP20 (ANS) Open. Short. Default
asynchronous mode (ANS=0), AK4101A controlled printer port (parallel port) IBM-AT compatible Connect PORT6 (uP-I/F) with 10-line flat cable packed with AKD4101A-B. Take care direction connector. There mark pin#1. layout PORT6 shown Figure
PORT6
Figure PORT6 layout Control software packed with AKD4101A-B. software manual included this eva-board manual.
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CDTO
CCLK
CDTI
2005/10
[AKD4101A-B]
Toggle switch set-up Reset switch AK4101A. during normal operation. Bring once after power supplied.
switch (SW1) set-up: -off- means Switch Name Function IPS0 Don't care DIF0 Set-up DIF0 pin. (synchronous mode) DIF1 Set-up DIF1 pin. (synchronous mode) DIF2 Set-up DIF2 pin. (synchronous mode) IPS1/IIC Don't care Set-up pin. "OFF": asynchronous mode, "ON": synchronous mode TEST Don't care ACKS Don't care
Default
switch (SW3) set-up: -off- means Switch Name Function Sampling frequency select synchronous mode (ANS=1). (See datasheet.) PSEL Don't care CKS1 Set-up CKS1 pin. (synchronous mode) Set-up TRANS pin. TRANS "OFF": normal mode, "ON": audio routing mode DIR_I/O Don't care Set-up transmission direction 74AC245 DIT_I/O "OFF": When inputting from PORT5, "ON": When outputting from PORT5
Default
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[AKD4101A-B]
Jumper Jumper Name D3V/VD
SDA/CDTO
TXP1
19(sub)
20(sub)
CKS0
21(sub)
22(sub)
Function Set-up Power supply source 74AC245. (default) Set-up Synchronous mode short CDTO/CM0="H" pin="H" short CM0="L" pin="L" Asynchronous mode: short CDTO/CM0="H" (default) Set-up TXP1 output circuit. Optical (default) Set-up depending synchronous asynchronous mode Open synchronous mode Short asynchronous mode (default) Set-up CKS0 Open CKS0 pin="H" Short CKS0 pin="L" (default) Set-up output Short: TXP1 (default) Short: TXP2 Short: TXP3 Short: TXP4 Set-up output Short: TXN1 (default) Short: TXN2 Short: TXN3 Short: TXN4
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[AKD4101A-B]
Control Software Manual Set-up evaluation board control software
AKD4101A-B according previous term. Connect IBM-AT compatible with AKD4101A-B 10-line type flat cable (packed with AKD4101A-B). Take care direction 10pin header. (Please install driver CD-ROM when this control software used Windows 2000/XP. Please refer "Installation Manual Control Software Driver device control software". case Windows95/98/ME, this installation needed. This control software does operate Windows NT.) Insert CD-ROM labeled "AKD4101A-B Evaluation Kit" into CD-ROM drive. Access CD-ROM drive double-click icon "akd4101A.exe" control program. Then please evaluate according follows.
Operation flow
Keep following flow. control program according explanation above. Click "Port Reset" button.
Explanation each buttons
[Port Reset] interface board (AKDUSBIF-A) [Write default] Initialize register AK4101A. [All Write] Write registers that currently displayed. [Function1] Dialog write data keyboard operation. [Function3] sequence register setting executed. [Function4] sequence that created [Function3] assigned buttons executed. [Function5]: register setting that created [SAVE] function main window assigned buttons executed. [SAVE] Save current register setting. [OPEN] Write saved values register. [Write] Dialog write data mouse operation.
Indication data
Input data indicated register map. letter indicates blue indicates "0". Blank part that defined datasheet.
<KM080100>
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[AKD4101A-B]
Explanation each dialog [Write Dialog]: Dialog write data mouse operation
There dialogs corresponding each register. Click [Write] button corresponding each register dialog. check check box, data becomes "1". not, "0". want write input data AK4101A, click [OK] button. not, click [Cancel] button.
[Function1 Dialog] Dialog write data keyboard operation
Address Box: Input registers address figures hexadecimal. Data Box: Input registers data figures hexadecimal. want write input data AK4101A, click [OK] button. not, click [Cancel] button.
[Save] [Open] 3-1. [Save]
Save current register setting data. extension file name "akr".
(Operation flow)
Click [Save] Button. file name push [Save] Button. extension file name "akr". 3-2. [Open] register setting data saved [Save] written AK4101A. file type same [Save].
(Operation flow)
Click [Open] Button. Select file (*.akr) Click [Open] Button.
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[AKD4101A-B]
[Function3 Dialog]
sequence register setting executed. Click [F3] Button. control sequence. address, Data Interval time. "-1" address step where sequence should paused. Click [Start] button. Then this sequence executed. sequence paused step Interval="-1". Click [START] button, sequence restarts from paused step. This sequence saved opened [Save] [Open] button Function3 window. extension file name "aks".
Figure Window [F3]
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[Function4 Dialog]
sequence that created [Function3] assigned buttons executed. When [F4] button clicked,
window shown Figure opens.
Figure [F4] window
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[AKD4101A-B]
5-1. [OPEN] buttons left side [START] buttons
Click [OPEN] button select sequence file (*.aks). sequence file name displayed shown Figure
Figure [F4] window(2) Click [START] button, then sequence executed.
5-2. [SAVE] [OPEN] buttons right side
[SAVE] sequence file names assign saved. file name *.ak4. [OPEN] sequence file names assign that saved *.ak4 loaded.
5-3. Note
This function doesn't support pause function sequence function. files need same folder used [SAVE] [OPEN] function right side. When sequence changed [Function3], file should loaded again order reflect change.
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[AKD4101A-B]
[Function5 Dialog] register setting that created [SAVE] function main window assigned buttons executed. When [F5] button clicked, following window shown Figure 7opens.
Figure [F5] window
6-1. [OPEN] buttons left side [WRITE] button
Click [OPEN] button select register setting file (*.akr).
Click [WRITE] button, then register setting executed.
6-2. [SAVE] [OPEN] buttons right side
[SAVE] register setting file names assign saved. file name *.ak5. [OPEN] register setting file names assign that saved *.ak5 loaded.
6-3. Note
files need same folder used [SAVE] [OPEN] function right side. When register setting changed [Save] Button main window, file should loaded again order reflect change.
<KM080100>
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[AKD4101A-B]
Revision History
Date (YY/MM/DD) 05/10/03 Manual Board Revision Revision KM080100 Reason First edition Contents
IMPORTANT NOTICE These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising from said product absence such notification.
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BICK LRCK FS0/CSN DIF0 DIF0 0.1u SDTI MCLK SDTI4 SDTI3 SDTI2 SDTI1 MCLK BICK
FS0/CSN
LRCK
TRANS
FS1/CDTI DIF1
FS1/CDTI
TRANS
CKS1
CKS1
DIF1
FS2/CCLK
FS2/CCLK
FS3/CDTO
FS3/CDTO
DIF2
DIF2
DAUX
AK4101A
SDTI
JP19
FS0/CSN
FS0/CSN
JP20
DIF2
DIF2 FS2/CCLK
FS2/CCLK
DIF1
DIF1 FS1/CDTI
FS1/CDTI
CKS0
CKS0
0.1u
FS3/CDTO
FS3/CDTO
CKS1 TXN4 TXN3 TXN2 TXN1 TXP4 TXP3 TXP2 TXP1
DIF0
DIF0
CKS1 0.1u MCLK MCLK LRCK LRCK
JP21
JP22
BICK
BICK
Title Size Date:
AKD4101A
Document Number
Tuesday, September 2004 Sheet
D3V/VD
AVDD AVDD
0.1u
0.1u0.1u0.1u
0.1u
P/SN/ANS ACKS
P/SN/ANS
ACKS
TVDD/VDD
RXN0
RXP0
short
TA48M033F AVDD AVDD
short
IPS0 DIF0 DIF1 DIF2/XSEL IPS1/IIC P/SN/ANS TEST ACKS
AVDD
AVDD
IPS0/RX4 DIF0 IPS1/IIC P/SN/ANS TEST ACKS DIF0/RX5 DIF1 JP10 DIF2/XSEL
TEST
TEST
DIF1/RX6
DIF2/XSEL/RX7
DVDD
DVDD
EMCK1 DAUX1
1S1588
74HC14
74HC14
DAUX2
DAUX
EMCK2 DAUX2
0.1u
MCKO1
74LVC157 MCKO2
OVDD
OVDD
BICK
SDTO
LRCK
Title Size Date:
AKD4101A-B
Document Number
MAIN
Wednesday, June 2005 Sheet
PORT3 T45_BK JP19 T45_BK TXP1
VOUT
BCUV
TVDD/VDD
VOUT
TVDD
PORT4
TOTX176
DA02-F
TXP1
0.1u
0.1u
JP14 JP15
TXN1
DA02-F
0.1u
XLOUT
TXN1
MCLK
MCKO EMCK D3V/VD EMCK1
100k
PORT5
DAUX1 JP16
ELRCK
100k
100k
100k
D3V/VD
MCLK BICK LRCK DAUX
OVDD OVDD
EBICK
DIT_I/O
74AC245 74HC14 74HC14 74HC14 74HC14 CM1/FS1 OCKS1/FS2 OCKS0/FS0 PSEL XTL0/CKS1 XTL1/TRANS DIR_I/O DIT_I/O PORT6
JP17
ELRCK
EMCK2
EMCK
ELRCK
INT0
INT1 CM0/CDTO/CAD1 74LS07 OCKS0/CSN/CAD0 DVDD DVDD
SCL/CCLK SDA/CDTI SDA(ACK)/CDTO
CM1/CDTI/SDA
OCKS1/CCLK/SCL
P/SN/ANS
uP-I/F
JP18 CDTO/CM0=H
74LVC157
IPS1/IIC IPS1/IIC
74LS07
CM0=L
SDA/CDTO
PSEL D3V/VD
XTL0
XTL1
DIR_I/O DIT_I/O
74LS07
74LS07
74LS07
74LS07
Title Size Date:
AKD4101A-B
Document Number
MAIN
Wednesday, June 2005 Sheet
AKD4115-A
AKD4115-A L1_SILK
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