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SSD1339
132RGB with smart Icon lines Matrix OLED/PLED Segment/Common Driver with Controller
This document contains information product. Specifications information herein subject change without notice. http://www.solomon-systech.com SSD1339 1/59 2005 Copyright 2005 Solomon Systech Limited
TABLE CONTENTS GERENAL DESCRIPTION.5 FEATURES.5 ORDERING INFORMATION.6 BLOCK DIAGRAM.7 FLOOR PLAN.8 DESCRIPTION.15 FUNCTIONAL BLOCK DISCRIPTIONS OSCILLATOR CIRCUIT DISPLAY TIME GENERATOR.19 RESET CIRCUIT COMMAND DECODER COMMAND INTERFACE PARALLEL 6800-SERIES INTERFACE.20 PARALLEL 8080-SERIES INTERFACE.20 SERIAL INTERFACE GRAPHIC DISPLAY DATA (GDDRAM) GRAY SCALE GRAY SCALE TABLE CURRENT CONTROL VOLTAGE CONTROL SEGMENT DRIVERS/COMMON DRIVERS DC-DC VOLTAGE CONVERTER COMMAND TABLE COMMAND DESCRIPTIONS MAXIMUM RATINGS.47 CHARACTERISTICS.48 CHARACTERISTICS.49 APPLICATION EXAMPLE PACKAGE INFORMATION.54 SSD1339U3 ASSIGNMENT.54 SSD1339U3 DETAILS DIMENSIONS
Solomon Systech
2005
2/59
SSD1339
TABLE FIGURES FIGURE BLOCK DIAGRAM FIGURE SSD1339Z ASSIGNMENT FIGURE SSD1339Z ALIGNMENT MARK DIMENSIONS FIGURE TRAY INFORMATION FIGURE OSCILLATOR CIRCUIT FIGURE DISPLAY DATA READ BACK PROCEDURE INSERTION DUMMY READ.20 FIGURE DISPLAY DATA WRITE PROCEDURE MODE FIGURE GRAPHIC DISPLAY DATA STRUCTURE FIGURE 262K COLOR DEPTH DATA WRITING SEQUENCE 18-BIT INTERFACE FIGURE 262K COLOR DEPTH DATA WRITING SEQUENCE 16-BIT INTERFACE OPTION FIGURE 262K COLOR DEPTH DATA WRITING SEQUENCE 16-BIT INTERFACE OPTION FIGURE 262K COLOR DEPTH GRAPHIC DISPLAY DATA WRITING SEQUENCE 9-BIT INTERFACE FIGURE 262K COLOR DEPTH GRAPHIC DISPLAY DATA WRITING SEQUENCE 8-BIT INTERFACE FIGURE COLOR DEPTH GRAPHIC DISPLAY DATA WRITING SEQUENCE 16-BIT INTERFACE FIGURE COLOR DEPTH GRAPHIC DISPLAY DATA WRITING SEQUENCE 8-BIT INTERFACE FIGURE DISPLAY DATA WRITING POSITION COLOR DATA INPUT COLOR MODE FIGURE DISPLAY DATA WRITING POSITION COLOR DATA INPUT COLOR MODE FIGURE RELATION BETWEEN GRAPHIC DATA VALUE GRAY SCALE TABLE ENTRY THREE COLORS FIGURE ILLUSTRATION RELATION BETWEEN GRAPHIC DISPLAY VALUE GRAY SCALE CONTROL FIGURE EXAMPLE COLUMN ADDRESS POINTER MOVEMENT FIGURE ADDRESS POINTER MOVEMENT HORIZONTAL ADDRESS INCREMENT MODE FIGURE ADDRESS POINTER MOVEMENT VERTICAL ADDRESS INCREMENT MODE FIGURE EXAMPLE DISPLAY START LINE WITH REMAP FIGURE EXAMPLE DISPLAY OFFSET WITH REMAP FIGURE EXAMPLE GAMMA CORRECTION GRAY SCALE TABLE SETTING FIGURE SEGMENT OUTPUT CURRENT DIFFERENT CONTRAST CONTROL MASTER CURRENT SETTING FIGURE EXAMPLE DRAW LINE COMMAND FIGURE EXAMPLE DRAW RECTANGLE COMMAND FIGURE EXAMPLE DRAW CIRCLE COMMAND FIGURE EXAMPLE COPY COMMAND FIGURE EXAMPLE COPY CLEAR MOVE COMMAND FIGURE 6800-SERIES PARALLEL INTERFACE CHARACTERISTICS FIGURE 8080-SERIES PARALLEL INTERFACE CHARACTERISTICS FIGURE SERIAL INTERFACE CHARACTERISTICS FIGURE APPLICATION EXAMPLE 8-BIT 6800-PARALLEL INTERFACE MODE FIGURE SSD1339U3 ASSIGNMENT.54 FIGURE SSD1339U3 DETAIL DIMENSIONS
SSD1339
3/59
2005
Solomon Systech
LIST TABLES TABLE ORDERING INFORMATION TABLE SSD1339Z COORDINATES TABLE COMMAND TABLE TABLE GRAPHIC ACCELERATION COMMAND TABLE RESULT CHANGE BRIGHTNESS WINDOW COMMAND TABLE MAXIMUM RATINGS TABLE CHARACTERISTICS TABLE CHARACTERISTICS TABLE 6800-SERIES PARALLEL INTERFACE TIMING CHARACTERISTICS.50 TABLE 8080-SERIES PARALLEL INTERFACE TIMING CHARACTERISTICS TABLE SERIAL INTERFACE TIMING CHARACTERISTICS TABLE SSD1339U3 ASSIGNMENT
Solomon Systech
2005
4/59
SSD1339
GERENAL DESCRIPTION
SSD1339 single-chip CMOS OLED/PLED driver with controller organic/polymer light emitting diode dot-matrix graphic display system. consists segments (132RGB), commons smart icon lines. This designed Common Cathode type OLED panel. SSD1339 displays data directly from internal 132x133x18 bits Graphic Data (GDDRAM). Data/Commands sent from general through hardware selectable 6800/8000 series compatible Parallel Interface Serial Peripheral Interface. steps contrast control 262k color control
FEATURES
Support max. 132RGB matrix panel icon line Power supply: VDD=2.4-3.5V VDDIO=1.5V 3.5V VCC=7.0V 18.0V OLED driving output voltage, maximum DC-DC voltage booster controller Segment maximum source current: 200uA Common maximum sink current: 80mA Embedded 132x133x18 SRAM display buffer step master current control, step current control three color components Smart Icon mode Programmable color mode 256, 65k, 262k Programmable Frame Rate Graphic Acceleration Command (GAC) 8/9/16/18-bit 6800-series Parallel Interface, 8/9/16/18-bit 8080-series Parallel Interface Serial Peripheral Interface. Wide range operating temperature:
SSD1339
5/59
2005
Solomon Systech
ORDERING INFORMATION
Table Ordering Information
Ordering Part Number Package Form Reference Remark pitch: 41.2 pitch: 41.2
SSD1339Z
132RGB
Page
Punched SSD1339U3 128RGB Page
Solomon Systech
2005
6/59
SSD1339
BLOCK DIAGRAM
Grey Scale Decoder
Interface
GDDRAM
RES# D/C# (RD#) R/W#(WR#)
Common Drivers(even)
COM130 COM128
COM2 COM0 COMX
VDDIO
Segment Drivers
SA131 SB131 SC131
Common Drivers (odd)
Seg/Com OLED
DC-DC voltage
Driving block
Command Decoder
Oscillator
Display Timing Generator
converter
COM1 COM3
COM129 COM131 COMX
BGGND VDDB VSSB RESE VBref VCOMH VREF IREF
Figure Block Diagram
SSD1339
7/59
2005
Solomon Systech
FLOOR PLAN
represents centre alignment mark
X-pos (µm) -8176.0 8176.0 -9140.0 9140.0 alignment keys have size
Y-pos (µm) 307.0 307.0 -941.0 -941.0
Size: 20989um 2250um Thickness: 457um 25um pitch: 76.2 pitch: 41.2 pitch: 41.2 Bump Height: Nominal
Figure SSD1339Z assignment
Solomon Systech
2005
8/59
SSD1339
Table SSD1339Z Coordinates
Name VCOMH VCOMH VCOMH VSSB VSSB VSSB VSSB X-Axis -10160.275 -10084.075 -10007.875 -9931.675 -9737.3 -9661.1 -9584.9 -9508.7 -9432.5 -9356.3 -9280.1 -9203.9 -9127.7 -9051.5 -8975.3 -8899.1 -8822.9 -8746.7 -8670.5 -8594.3 -8518.1 -8441.9 -8305.8 -8229.6 -8153.4 -8077.2 -8001 -7924.8 -7848.6 -7772.4 -7696.2 -7620 -7543.8 -7467.6 -7391.4 -7315.2 -7239 -7162.8 -7086.6 -7010.4 -6934.2 -6858 -6781.8 -6705.6 -6629.4 -6553.2 -6477 -6400.8 -6324.6 -6248.4 -6172.2 -6096 -6019.8 -5943.6 -5867.4 -5791.2 -5715 -5638.8 -5562.6 -5486.4 -5410.2 -5334 -5257.8 -5181.6 -5105.4 -5029.2 -4953 -4876.8 -4800.6 -4724.4 -4648.2 -4572 -4495.8 -4419.6 -4343.4 -4267.2 -4191 -4114.8 -4038.6 -3962.4 Y-Axis -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 Name VSSB VSSB VSSB VSSB VDDB VDDB VDDB VDDB RESE VBREF BGGND GPIO0 GPIO1 VDDIO ICASC ICASB ICASA VREF VMONA VMONA IREF DOF# RES# D/C# VDDIO VDDIO VDDIO X-Axis -3886.2 -3810 -3733.8 -3657.6 -3581.4 -3505.2 -3429 -3352.8 -3276.6 -3200.4 -3124.2 -3048 -2971.8 -2895.6 -2819.4 -2743.2 -2667 -2590.8 -2514.6 -2438.4 -2362.2 -2286 -2209.8 -2133.6 -2057.4 -1981.2 -1905 -1828.8 -1752.6 -1676.4 -1600.2 -1524 -1447.8 -1371.6 -1295.4 -1219.2 -1143 -1066.8 -990.6 -914.4 -838.2 -762 -685.8 -609.6 -533.4 -457.2 -381 -304.8 -228.6 -152.4 -76.2 76.2 152.4 228.6 304.8 457.2 533.4 609.6 685.8 838.2 914.4 990.6 1066.8 1143 1219.2 1295.4 1371.6 1447.8 1524 1600.2 1676.4 1752.6 1828.8 1905 1981.2 2057.4 2133.6 Y-Axis -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 Name R/W#(WR#) E(RD#) VDDIO VDDIO VDDIO VDDIO VCOMH VCOMH VCOMH VCOMH VCOMH X-Axis 2209.8 2286 2362.2 2438.4 2514.6 2590.8 2667 2743.2 2819.4 2895.6 2971.8 3048 3124.2 3200.4 3276.6 3352.8 3429 3505.2 3581.4 3657.6 3733.8 3810 3886.2 3962.4 4038.6 4114.8 4191 4267.2 4343.4 4419.6 4495.8 4572 4648.2 4724.4 4800.6 4876.8 4953 5029.2 5105.4 5181.6 5257.8 5334 5410.2 5486.4 5562.6 5638.8 5715 5791.2 5867.4 5943.6 6019.8 6096 6172.2 6248.4 6324.6 6400.8 6477 6553.2 6629.4 6705.6 6781.8 6858 6934.2 7010.4 7086.6 7162.8 7239 7315.2 7391.4 7467.6 7543.8 7620 7696.2 7772.4 7848.6 7924.8 8001 8077.2 8153.4 8229.6 Y-Axis -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043
SSD1339
9/59
2005
Solomon Systech
Name COM65 COM64 COM63 COM62 COM61 COM60 COM59 COM58 COM57 COM56 COM55 COM54 COM53 COM52 COM51 COM50 COM49 COM48 COM47 COM46 COM45 COM44 COM43 COM42 COM41 COM40 COM39 COM38 COM37 COM36 COM35 COM34 COM33 COM32 COM31
X-Axis 8305.8 8441.9 8518.1 8594.3 8670.5 8746.7 8822.9 8899.1 8975.3 9051.5 9127.7 9203.9 9280.1 9356.3 9432.5 9508.7 9584.9 9661.1 9737.3 9931.675 10007.875 10084.075 10160.275 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10359.7 10389.7 10318.5 10258.8 10217.6 10176.4 10135.2 10094 10052.8 10011.6 9970.4 9929.2 9888 9846.8 9805.6 9764.4
Y-Axis -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1043 -1060 -967 -925.8 -884.6 -843.4 -802.2 -761 -719.8 -678.6 -637.4 -596.2 -555 -513.8 -472.6 -431.4 -390.2 -349 -307.8 -266.6 -225.4 -184.2 -143 -101.8 -60.6 -19.4 21.8 104.2 145.4 186.6 227.8 310.2 351.4 404.1 562.95 615.65 656.85 698.05 739.25 780.45 833.15 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030
Name COM30 COM29 COM28 COM27 COM26 COM25 COM24 COM23 COM22 COM21 COM20 COM19 COM18 COM17 COM16 COM15 COM14 COM13 COM12 COM11 COM10 COM9 COM8 COM7 COM6 COM5 COM4 COM3 COM2 COM1 COM0 COMX SA10 SB10 SC10 SA11 SB11 SC11 SA12 SB12 SC12 SA13 SB13 SC13 SA14 SB14 SC14
X-Axis 9723.2 9682 9640.8 9599.6 9558.4 9517.2 9476 9434.8 9393.6 9352.4 9311.2 9270 9228.8 9187.6 9146.4 9105.2 9064 9022.8 8981.6 8940.4 8899.2 8858 8816.8 8775.6 8734.4 8693.2 8652 8610.8 8569.6 8528.4 8487.2 8446 8404.8 8363.6 8240 8198.8 8157.6 8116.4 8075.2 8034 7992.8 7951.6 7910.4 7869.2 7828 7786.8 7745.6 7704.4 7663.2 7622 7580.8 7539.6 7498.4 7457.2 7416 7374.8 7333.6 7292.4 7251.2 7210 7168.8 7127.6 7086.4 7045.2 7004 6962.8 6921.6 6880.4 6839.2 6798 6756.8 6715.6 6674.4 6633.2 6592 6550.8 6509.6 6468.4 6427.2 6386
Y-Axis 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030
Name SA15 SB15 SC15 SA16 SB16 SC16 SA17 SB17 SC17 SA18 SB18 SC18 SA19 SB19 SC19 SA20 SB20 SC20 SA21 SB21 SC21 SA22 SB22 SC22 SA23 SB23 SC23 SA24 SB24 SC24 SA25 SB25 SC25 SA26 SB26 SC26 SA27 SB27 SC27 SA28 SB28 SC28 SA29 SB29 SC29 SA30 SB30 SC30 SA31 SB31 SC31 SA32 SB32 SC32 SA33 SB33 SC33 SA34 SB34 SC34 SA35 SB35 SC35 SA36 SB36 SC36 SA37 SB37 SC37 SA38 SB38 SC38 SA39 SB39 SC39 SA40 SB40 SC40 SA41 SB41
X-Axis 6344.8 6303.6 6262.4 6221.2 6180 6138.8 6097.6 6056.4 6015.2 5974 5932.8 5891.6 5850.4 5809.2 5768 5726.8 5685.6 5644.4 5603.2 5562 5520.8 5479.6 5438.4 5397.2 5356 5314.8 5273.6 5232.4 5191.2 5150 5108.8 5067.6 5026.4 4985.2 4944 4902.8 4861.6 4820.4 4779.2 4738 4696.8 4655.6 4614.4 4573.2 4532 4490.8 4449.6 4408.4 4367.2 4326 4284.8 4243.6 4202.4 4161.2 4120 4078.8 4037.6 3996.4 3955.2 3914 3872.8 3831.6 3790.4 3749.2 3708 3666.8 3625.6 3584.4 3543.2 3502 3460.8 3419.6 3378.4 3337.2 3296 3254.8 3213.6 3172.4 3131.2 3090
Y-Axis 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030
Solomon Systech
2005
10/59
SSD1339
Name SC41 SA42 SB42 SC42 SA43 SB43 SC43 SA44 SB44 SC44 SA45 SB45 SC45 SA46 SB46 SC46 SA47 SB47 SC47 SA48 SB48 SC48 SA49 SB49 SC49 SA50 SB50 SC50 SA51 SB51 SC51 SA52 SB52 SC52 SA53 SB53 SC53 SA54 SB54 SC54 SA55 SB55 SC55 SA56 SB56 SC56 SA57 SB57 SC57 SA58 SB58 SC58 SA59 SB59 SC59 SA60 SB60 SC60 SA61 SB61 SC61 SA62 SB62 SC62 SA63 SB63 SC63 SA64 SB64 SC64 SA65 SB65 SC65 SA66 SB66 SC66 SA67 SB67 SC67 SA68
X-Axis 3048.8 3007.6 2966.4 2925.2 2884 2842.8 2801.6 2760.4 2719.2 2678 2636.8 2595.6 2554.4 2513.2 2472 2430.8 2389.6 2348.4 2307.2 2266 2224.8 2183.6 2142.4 2101.2 2060 2018.8 1977.6 1936.4 1895.2 1854 1812.8 1771.6 1730.4 1689.2 1648 1606.8 1565.6 1524.4 1483.2 1442 1400.8 1359.6 1318.4 1277.2 1236 1194.8 1153.6 1112.4 1071.2 1030 988.8 947.6 906.4 865.2 782.8 741.6 700.4 659.2 576.8 535.6 494.4 453.2 370.8 329.6 288.4 247.2 164.8 123.6 82.4 41.2 -41.2 -82.4 -123.6 -164.8 -206
Y-Axis 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030
Name SB68 SC68 SA69 SB69 SC69 SA70 SB70 SC70 SA71 SB71 SC71 SA72 SB72 SC72 SA73 SB73 SC73 SA74 SB74 SC74 SA75 SB75 SC75 SA76 SB76 SC76 SA77 SB77 SC77 SA78 SB78 SC78 SA79 SB79 SC79 SA80 SB80 SC80 SA81 SB81 SC81 SA82 SB82 SC82 SA83 SB83 SC83 SA84 SB84 SC84 SA85 SB85 SC85 SA86 SB86 SC86 SA87 SB87 SC87 SA88 SB88 SC88 SA89 SB89 SC89 SA90 SB90 SC90 SA91 SB91 SC91 SA92 SB92 SC92 SA93 SB93 SC93 SA94 SB94 SC94
X-Axis -247.2 -288.4 -329.6 -370.8 -412 -453.2 -494.4 -535.6 -576.8 -618 -659.2 -824 -865.2 -906.4 -947.6 -988.8 -1030 -1071.2 -1112.4 -1153.6 -1194.8 -1236 -1277.2 -1318.4 -1359.6 -1400.8 -1442 -1483.2 -1524.4 -1565.6 -1606.8 -1648 -1689.2 -1730.4 -1771.6 -1812.8 -1854 -1895.2 -1936.4 -1977.6 -2018.8 -2060 -2101.2 -2142.4 -2183.6 -2224.8 -2266 -2307.2 -2348.4 -2389.6 -2430.8 -2472 -2513.2 -2554.4 -2595.6 -2636.8 -2678 -2719.2 -2760.4 -2801.6 -2842.8 -2884 -2925.2 -2966.4 -3007.6 -3048.8 -3090 -3131.2 -3172.4 -3213.6 -3254.8 -3296 -3337.2 -3378.4 -3419.6 -3460.8 -3502 -3543.2 -3584.4 -3625.6
Y-Axis 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030
Name SA95 SB95 SC95 SA96 SB96 SC96 SA97 SB97 SC97 SA98 SB98 SC98 SA99 SB99 SC99 SA100 SB100 SC100 SA101 SB101 SC101 SA102 SB102 SC102 SA103 SB103 SC103 SA104 SB104 SC104 SA105 SB105 SC105 SA106 SB106 SC106 SA107 SB107 SC107 SA108 SB108 SC108 SA109 SB109 SC109 SA110 SB110 SC110 SA111 SB111 SC111 SA112 SB112 SC112 SA113 SB113 SC113 SA114 SB114 SC114 SA115 SB115 SC115 SA116 SB116 SC116 SA117 SB117 SC117 SA118 SB118 SC118 SA119 SB119 SC119 SA120 SB120 SC120 SA121 SB121
X-Axis -3666.8 -3708 -3749.2 -3790.4 -3831.6 -3872.8 -3914 -3955.2 -3996.4 -4037.6 -4078.8 -4120 -4161.2 -4202.4 -4243.6 -4284.8 -4326 -4367.2 -4408.4 -4449.6 -4490.8 -4532 -4573.2 -4614.4 -4655.6 -4696.8 -4738 -4779.2 -4820.4 -4861.6 -4902.8 -4944 -4985.2 -5026.4 -5067.6 -5108.8 -5150 -5191.2 -5232.4 -5273.6 -5314.8 -5356 -5397.2 -5438.4 -5479.6 -5520.8 -5562 -5603.2 -5644.4 -5685.6 -5726.8 -5768 -5809.2 -5850.4 -5891.6 -5932.8 -5974 -6015.2 -6056.4 -6097.6 -6138.8 -6180 -6221.2 -6262.4 -6303.6 -6344.8 -6386 -6427.2 -6468.4 -6509.6 -6550.8 -6592 -6633.2 -6674.4 -6715.6 -6756.8 -6798 -6839.2 -6880.4 -6921.6
Y-Axis 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030
SSD1339
11/59
2005
Solomon Systech
Name SC121 SA122 SB122 SC122 SA123 SB123 SC123 SA124 SB124 SC124 SA125 SB125 SC125 SA126 SB126 SC126 SA127 SB127 SC127 SA128 SB128 SC128 SA129 SB129 SC129 SA130 SB130 SC130 SA131 SB131 SC131 COM66 COM67 COM68 COM69 COM70 COM71 COM72 COM73 COM74 COM75 COM76 COM77 COM78 COM79 COM80 COM81 COM82 COM83 COM84 COM85 COM86 COM87 COM88 COM89 COM90 COM91 COM92 COM93 COM94 COM95 COM96 COM97 COM98 COM99 COM100 COM101 COM102 COM103 COM104 COM105 COM106 COM107 COM108 COM109 COM110
X-Axis -6962.8 -7004 -7045.2 -7086.4 -7127.6 -7168.8 -7210 -7251.2 -7292.4 -7333.6 -7374.8 -7416 -7457.2 -7498.4 -7539.6 -7580.8 -7622 -7663.2 -7704.4 -7745.6 -7786.8 -7828 -7869.2 -7910.4 -7951.6 -7992.8 -8034 -8075.2 -8116.4 -8157.6 -8198.8 -8240 -8363.6 -8404.8 -8446 -8487.2 -8528.4 -8569.6 -8610.8 -8652 -8693.2 -8734.4 -8775.6 -8816.8 -8858 -8899.2 -8940.4 -8981.6 -9022.8 -9064 -9105.2 -9146.4 -9187.6 -9228.8 -9270 -9311.2 -9352.4 -9393.6 -9434.8 -9476 -9517.2 -9558.4 -9599.6 -9640.8 -9682 -9723.2 -9764.4 -9805.6 -9846.8 -9888 -9929.2 -9970.4 -10011.6 -10052.8 -10094 -10135.2 -10176.4 -10217.6 -10258.8 -10318.5
Y-Axis 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030 1030
Name COM111 COM112 COM113 COM114 COM115 COM116 COM117 COM118 COM119 COM120 COM121 COM122 COM123 COM124 COM125 COM126 COM127 COM128 COM129 COM130 COM131 COMX
X-Axis -10389.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7 -10359.7
Y-Axis 1030 833.15 780.45 739.25 698.05 656.85 615.65 562.95 404.1 351.4 310.2 227.8 186.6 145.4 104.2 21.8 -19.4 -60.6 -101.8 -143 -184.2 -225.4 -266.6 -307.8 -349 -390.2 -431.4 -472.6 -513.8 -555 -596.2 -637.4 -678.6 -719.8 -761 -802.2 -843.4 -884.6 -925.8 -967 -1060
Size:
20989um 2250um
Gold Bump Face
264, 298-299, 305, 802, 808-809, 265-297, 300-304, 803-807, 810-842 306-307, 800-801 308-799
X-Dimension 54um 110um 110um 50um 27um
Y-Dimension 84um 50um 27um 110um 110um
Marks
X-Axis
Y-Axis
KEY_O 9140.000 KEY_O -9140.000 KEY_T -8176.000 KEY_X 8176.000
-941.000 -941.000 307.000 307.000
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shape
shape
Circle
*All units
Figure SSD1339Z alignment mark dimensions
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Spec 76.00 +/-0.1 68.00 +/-0.1 68.30 +/-0.1 4.00 +/-0.1 1.55 +/-0.1 22.30 +/-0.05 4.20 +/-0.1 21.14 +/-0.05 2.40 +/-0.05 0.61 +/-0.05
(mil) (2992) (2677) (2689) (157) (61) (878) (165) (832) (94) (24)
Remark Depth text 0.1mm Tray material: Tray color code: Black Surface resistance Tray warpage: 0.15mm Unspecifier dim's tolerance: 0.15mm Pocket size: 21.14 2.40 0.61mm
Figure tray information
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DESCRIPTION
RES# This reset signal input. When low, initialization chip executed.
This chip select input. chip enabled communication only when pulled low. D/C# This Data/Command control pin. When pulled high, data D7-D0 treated display data. When pulled low, data D7-D0 will transferred command register. detail relationship interface signals, please refer Timing Characteristics Diagrams.
(RD#) This interface input. When interfacing 6800-series microprocessor, this will used Enable signal. Read/write operation initiated when this pulled high chip selected. When connecting 8080-microprocessor, this receives Read (RD#) signal. Data read operation initiated when this pulled chip selected.
R/W# (WR#) This interface input. When interfacing 6800-series microprocessor, this will used Read/Write (R/W#) selection input. Read mode will carried when this pulled high write mode will carried when this pulled low. When 8080 interface mode selected, this will Write (WR#) input. Data write operation initiated when this pulled chip selected.
BS0, BS1, These pins interface selection input. following table:
6800-parallel interface bit) 6800-parallel interface bit) 8080-parallel interface bit) 8080-parallel interface bit) 6800-parallel interface bit) 6800-parallel interface bit) 8080-parallel interface bit) 8080-parallel interface bit) Serial interface
Note: Unlike BS0, controlled hardware connection, controlled software command,
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D17-D0 These pins 18-bit bi-directional data connected microprocessor's data bus.
VDDIO This power supply buffer. should connected external source. signal should have reference VDDIO. When signal pins (BS012, M/S, CLS, D0-D17, control signals.) pull high, they should connected VDDIO.
Power Supply pin. must connected external source.
Ground. also acts reference logic pins. must connected external ground.
This system clock input. When internal clock enabled, this should left open. Nothing should connected this pin. When internal oscillator disabled, this receives display clock signal from external clock source. This must connected enable chip. This internal clock enable. When this pulled high, internal oscillator selected. internal clock will disabled when pulled low, external clock source must connected normal operation.
VDDB This power supply internal buffer DC-DC voltage converter. must connected when converter used. also recommended connect this when converter used avoid floating node.
VSSB This internal buffer DC-DC voltage converter. must connected when converter used. also recommended connect this when converter used avoid floating node.
This output drives gate external NMOS booster circuit. This left open when converter used.
RESE This connects source current external NMOS booster circuit. This left open when converter used.
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This feedback resistor input booster circuit. used adjust booster output voltage level (Vcc). This left open when converter used. BGGND This ground analog circuits. must connected external ground.
VBREF This internal voltage reference booster circuit. stabilization capacitor, typ. 1uF, should connected Vss. This left open when converter used.
This most positive voltage supply chip. supplied either external high voltage source internal booster
VCOMH This input voltage output high level signals. supplied externally internally. When VCOMH generated internally, capacitor should connected between this VSS. VREF This reference OLED driving voltages like VPA, VPB, VCOMH. either supplied externally connected (VREF VCC). VPA, VPB, These pins driving voltages OLED driving segment pins SA0-SA131, SB0-SB131 SC0SC131 respectively. They supplied externally internally generated circuit. When internal used, VPA, VPB, pins should left open. IREF This segment output current reference pin. ISEG each color derived from IREF ISEG (Contrast 256) IREF scale factor Contrast command Scale factor master current control register setting (C7h) i.e., with value from 1~16. resistor should connected between this maintain current around 10uA. This segment voltage reference pin. This should left open.
This common voltage reference pin. This should connected externally. COM0-COM131 These pins provide Common switch signals OLED panel. These pins high impedance state when display off.
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SA0-SA131, SB0-SB131, SC0-SC131 These pins provide OLED segment driving signals. These pins high impedance state when display off. segment pins divided into groups, Each group have different color settings color
COMX These pins provide Common switch signals soft icon line OLED panel. These pins high impedance state when display off.
TR8, VMONA, ICASA, ICASB, ICASC, GPIO0, GPIO1, DOF# These reserved pins. connection necessary should left open individually.
connection pins. They should left open individually.
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FUNCTIONAL BLOCK DISCRIPTIONS
Oscillator Circuit Display Time Generator
Internal Oscillator Fosc
Divider DCLK Display Clock
Figure Oscillator Circuit This module On-Chip power oscillator circuitry. operation clock (CLK) generated either from internal oscillator external source pin. This selection done pin. pulled high, internal oscillator chosen. Pulling disables internal oscillator external clock must connected pins proper operation. When internal oscillator selected, output frequency Fosc changed command B3h. some packages SSD1339, tied high internally internal oscillator selected these packages. display clock (DCLK) Display Timing Generator derived from CLK. division factor programmed from command B3h.
Reset Circuit
When RES# input low, chip initialized with following status: Display 132x132 Display Mode Normal segment display data column address address mapping (SEG0 mapped address COM0 mapped address 00H) Shift register data clear serial interface Display start line display address Column address counter Normal scan direction outputs Contrast control register
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Command Decoder Command Interface
This module determines whether input data interpreted data command. Data interpreted based upon input D/C# pin. D/C# high, data written Graphic Display Data (GDDRAM). low, input D7-D0 interpreted Command will decoded written corresponding command register.
Parallel 6800-series Interface
parallel interface consists bi-directional data pins (D17-D0) bi-directional data pins (D7-D0), R/W#(WR#), D/C#, (RD#) CS#. R/W#(WR#) input High indicates read operation from Graphic Display Data (GDDRAM) status register. RW#/(WR#) input indicates write operation Display Data Internal Command Registers depending status D/C# input. E(RD#) input serves data latch signal (clock) when high provided that high respectively. Refer Figure parallel timing characteristics Parallel Interface Timing Diagram 6800-series microprocessors. order match operating frequency display with that microprocessor, some pipeline processing internally performed which requires insertion dummy read before first actual display data read. This shown Figure below.
W#(WR#)
E(RD#)
Data Write column address Dummy read Data read1
Data read2
Data read3
Figure Display data read back procedure insertion dummy read
Parallel 8080-series Interface
parallel interface consists bi-directional data pins (D17-D0) bi-directional data pins (D7-D0), (RD#), R/W#(WR#), D/C# CS#. E(RD#) input serves data read latch signal (clock) when low, provided that high respectively. Display data status register read controlled D/C#. R/W#(WR#) input serves data write latch signal (clock) when high provided that high respectively. Display data command register write controlled D/C#. Refer when used: instead; when used: instead; when used: instead; when used: instead. Figure parallel timing characteristics Parallel Interface Timing Diagram 8080-series microprocessor. Similar 6800-series interface, dummy read also required before first actual display data read.
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Serial Interface
serial interface consists serial clock SCLK, serial data SDIN, D/C#, CS#. this mode, acts SCLK, acts SDIN. unused data pins, should left open. pins connected external ground. SDIN shifted into 8-bit shift register every rising edge SCLK order sampled every eighth clock data byte shift register written Display Data command register same clock. During data writing, additional command should inserted before goes high (Refer Figure Figure Display data write procedure mode
SDIN/ SCLK
COMMAND
SCLK(D0)
SDIN(D1)
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Graphic Display Data (GDDRAM)
GDDRAM mapped static holding pattern displayed. size 18bits. mechanical flexibility, re-mapping both Segment Common outputs selected software. vertical scrolling display, internal register storing display start line control portion data mapped display. Each pixel 18-bit data. Each sub-pixels color have bits. arrangement data pixel graphic display data shown below.
Column Address Normal Remap
Data Format
Address Normal Remap
OUTPUT COM0 COM1 COM2 COM130 COM131 COM132
bits data this cell
OUTPUT
SA129 SB129 SC129 SA130 SB130 SC130 SA131 SB131 SC131
Figure Graphic Display Data Structure
Data access 262k colors mode 262k colors depth mode, there different interface communication modes access graphic display data OLED driver. bits mode, communication made session data bits. transmits bits write 18-bit pixel data into OLED driver. This 18-bit mode selected setting A[3] command Data bits
Figure 262k color depth data writing sequence 18-bit interface
option 16-bit modes, communication divided into sessions data bits. transmits 16-bit words write 18-bit pixel data into OLED driver. Mode selected setting register A[7:6] bits 10b. below, pixel bits color stands don't care value.
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word word
Figure 262k color depth data writing sequence 16-bit interface Option
option 16-bit modes, communication divided into three sessions data bits. transmits three 16-bit words write 18-bit pixels data into OLED driver. Option selected setting register A[7:6] bits 11b. below, first data pixel bits, second data pixel bits. word word word
Figure 262k color depth data writing sequence 16-bit interface Option
9-bit modes, communication divided into sessions data bits. transmits data bits write 18-bit pixel data into OLED driver. This 9-bit mode selected setting A[3] command Data bits Data bits
Figure 262k color depth graphic display data writing sequence 9-bit interface
8-bit interface, communication session divided into three times. transmit three 8-bit bytes write 18-bit pixel data into OLED driver. byte byte byte
Figure 262k color depth graphic display data writing sequence 8-bit interface
Data access colors mode Writing pixel 16-bit interface involves session follows. word
Figure color depth graphic display data writing sequence 16-bit interface
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sequence sending color depth pixel 8-bit interface divided into 8-bit sessions shown below. byte byte
Figure color depth graphic display data writing sequence 8-bit interface
With reference Figure conventions, writing data into graphic display data RAM, positions filled input data each color shown below. Color Position Input Data Color Position Input Data Color Position Input Data
Figure Display data writing position color data input color mode
data RAM, each data occupies 6-bit. However, color have 5-bit length only color mode. Therefore, positions empty originally. These emptied positions filled shown above increase color 6-bit length display data RAM.
Data access colors mode 256-color mode, each pixel composed 8-bit. Only 8-bit interface available access display data RAM. communication session done time writing 8-bit data into RAM. byte
Figure Color Depth Graphic Display Data Writing Sequence 8-bit Interface
With reference Figure conventions, writing data into graphic display data RAM, positions filled input data each color shown below. Color Position Input Data
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Color Position Input Data Color Position Input Data
Figure Display data writing position color data input color mode
data RAM, each data occupies 6-bit. However, color have 3-bit length color 2-bit only color mode. Therefore, positions B2~B0, C2~C0 A3~A0 empty originally. These emptied positions filled shown above increase color 6-bit length display data RAM.
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Gray Scale Gray Scale Table
Controlling current pulse widths from segment driver current drive phase produces gray scale display. gray scale table stores corresponding pulse widths (PW0 PW63) gray scale levels (GS0~GS63). wider pulse width, brighter pixel will Therefore, brightness each pixel defined graphic display data term pulse width gray scale table. This single gray scale table supports three colors pulse widths entered software commands. graphic display data RAM, each color occupies 6-bit length. color each gray scale levels. Color data bits) Gray Scale
Figure Relation between graphic data value gray scale table entry three colors color modes, length color data less than bits. They expanded 6-bit length shown Figure Figure respectively.
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meaning values inside data with respect gray scale level best illustrated example below. Gray Scale (Pulse Width) PW62 PW63 Value/DCLKs
Gray Scale Table
Segment Voltage
Color data 000001b pulse width DCLKs
Color data 111110b PW62 pulse width DCLKs
Time
Figure Illustration relation between graphic display value gray scale control
Current Control Voltage Control
This block used derive incoming power sources into different levels internal voltage current. external power supplies. VREF reference voltage, which used derive driving voltage segments commons. IREF reference current source segment current drivers.
Segment Drivers/Common Drivers
Segment drivers deliver current sources drive OLED panel. driving current adjusted from 200uA with steps. Common drivers generate voltage scanning pulse.
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DC-DC Voltage Converter
switching voltage generator circuit, designed handheld applications. SSD1339, internal DCDC voltage converter accompanying with external application circuit (shown below figure) generate high voltage supply from voltage supply input VDD. voltage supply OLED driver block. Below application circuit example input voltage generate @20mA 30mA application.
AGND
VDDB
VBREF
RESE
AGND
VSSB
AGND
DGND
*ALL PATHS AGND SHOULD CONNECTED SHORT POSSIBLE
Passive components selection: Components Typical Value Inductor, 22µH Schottky diode MOSFET Resistor Resistor, Capacitor, Capacitor, 22µF Capacitor, Capacitor, 10nF Capacitor, Capacitor, Capacitor, 15nF
Remark e.g. 1N5822 N-FET with RDS(on) voltage. e.g. MGSF1N02LT1 SEMICONDUCTOR] 1%,1/10W 1/2W ESR,
output voltage level adjusted changing resistor values, reference formula (R1+R2)
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COMMAND TABLE
Table Command table unless specific setting stated Single byte command Multiple byte command first byte, other bytes)
A[7:0] B[7:0] A[7:0] B[7:0]
Command
Column Address
Description
A[7:0]: Start Address, reset=0d B[7:0]: Address, reset=131d Range from 131d A[7:0]: Start Address, reset=0d
Address B[7:0]: Address, reset=131d Range from 131d Write Command Read Command Enable write Data into Enable read Data from
A[7:0]
A[0]=0, Horizontal address increment (POR) A[0]=1, Vertical address increment
A[1]=0, Column address mapped SEG0 (POR) A[1]=1, Column address mapped SEG0
A[2]=0, Color sequence: (POR) A[2]=1, Color sequence swapped:
A[3]=0, Disable 9/18-bit interface (POR) Re-map Color Depth(Display Panel) A[3]=1, Enable 9/18-bit interface
A[4]=0, Scan from (POR) A[4]=1, Scan from [N-1] COM0. Where Multiplex ratio.
A[5]=0, Disable Split Even (POR) A[5]=1, Enable Split Even A[7:6] Color Depth, color color, (POR) 262k color, 8/9/18-bit,16 (1st option) interface 262k color, interface (2nd option) A[7:0] Display Start vertical scroll from 0~131 Line [reset=00d]
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A[7:0]
Command
Display Offset
Description
vertical scroll from 0-131. [reset=00b]
A4~A7
(All pixels have GS15) Display Mode Reset normal display (POR) Inverse Display (GS0 GS63, GS62,
A[7:0]
A[7:0] should 100011A[1]A[0]b A[0]= Select external supply master A[0] Select internal booster master [reset] Master Configuration A[1]= Select external VCOMH voltage supply master A[1] Select internal VCOMH regulator master [reset] A[2] Select external pre-charge voltage source A[2] Select internal pre-charge voltage source [reset]
AE~AF
Sleep mode Sleep mode (Display off) On/Off Sleep mode (Display A[4:0]: Power Saving Mode 00000b Normal 10010b Power Saving 00101b Reserved
A[7:0]
Reset (Phase A[3:0] Phase period 1~16 dclk clocks [reset=4h] /Pre-charge A[7:4] Phase period 1~16 dclk clocks [reset=7h] (Phase period A[3:0] [reset=0], divide DIVSET+1 (i.e. Front Clock Divider A[7:4] frequency, frequency increase level (DivSet)/ Oscillator increase [reset=1001b] Frequency next bytes command current drive pulse width gray scale level GS1, GS3, .GS63 below unit DCLK. Look Table A[7:0] PW1, DCLK Gray Scale Pulse B[7:0] PW3, DCLK width C[7:0] PW5, DCLK AE[7:0] PW61, DCLK AF[7:0] PW63, DCLK where must must PW1+1
A[7:0]
A[7:0] B[7:0]
.AE[7:0] AF[7:0]
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Command
Description
must PW3+1 Note: pre-charge current drive stages. GS4.GS62, they derived driver itself with: (PWn-1+PWn+1)/2 pulse width
Reset default Look Table: Built-in Linear (reset= linear) PW62 PW63
A[7:0] B[7:0] C[7:0]
A[7:0] Pre-charge Color [reset 00011100] B[7:0] Pre-charge Color [reset 00011100] C[7:0] Pre-charge Color [reset 00011100] Pre-charge voltage Color 00000000 0.51*Vref 00011111 0.84*Vref 1xxxxxxx connects VCOMH
A[6:0]
VCOMH
A[6:0] 0000000 0.51*Vref 0011111 0.84*Vref [VCOMHSET, reset]
A[7:0] B[7:0] C[7:0]
A[7:0] Contrast Value Color Contrast Current B[7:0] Contrast Value Color Color A,B,C C[7:0] Contrast Value Color
[reset=1000000b] [reset=1000000b] [reset=1000000b]
A[3:0]
A[3:0] 0000 reduce output currents colors 1/16 0001 reduce output currents colors 2/16 Master Contrast Current Control 1110 reduce output currents colors 15/16 1111 change [reset 1111b]
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A[7:0]
Command
Ratio
Description
A[7:0] ratio 16MUX 132MUX, [reset=131d], (Range from 131d) Command Operation
Table Graphic acceleration command (GAC) unless specific setting stated Single byte command Multiple byte command first byte, other bytes)
A[7:0] B[7:0] C[7:0] D[7:0] E[7:0] F[7:0]
Command
Description
A[7:0] Column Address Start B[7:0] Address Start C[7:0] Column Address
Draw Line
D[7:0] Address E[7:0] Line Color CCCCCBBB F[7:0] Line Color BBBAAAAA
A[7:0] B[7:0] C[7:0] D[7:0] E[7:0] F[7:0] G[7:0] H[7:0]
Draw Rectangle
A[7:0] Column Address Start B[7:0] Address Start C[7:0] Column Address D[7:0] Address E[7:0] Line Color CCCCCBBB F[7:0] Line Color BBBAAAAA G[7:0] Fill Color CCCCCBBB H[7:0] Fill Color BBBAAAAA
A[7:0] B[7:0] C[7:0] D[7:0] E[7:0] F[7:0] G[7:0] A[7:0] B[7:0] C[7:0] D[7:0] Copy A[7:0] Column Address Start B[7:0] Address Start C[7:0] Column Address D[7:0] Address E[7:0] Column Address Start Draw Circle A[7:0] Column Address Centre B[7:0] Address Centre C[7:0] Radius D[7:0] Line Color CCCCCBBB E[7:0] Line Color BBBAAAAA F[7:0] Fill Color CCCCCBBB G[7:0] Fill Color BBBAAAAA
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E[7:0] F[7:0]
Command
Description
F[7:0] Address Start
A[7:0] B[7:0] C[7:0] D[7:0]
Window
A[7:0] Column Address Start B[7:0] Address Start C[7:0] Column Address D[7:0] Address
A[7:0] B[7:0] C[7:0] D[7:0]
Clear Window
A[7:0] Column Address Start B[7:0] Address Start C[7:0] Column Address D[7:0] Address
A[5:0]
Disable Fill Draw Rectangle/Circle Command [reset] Enable Fill Draw Rectangle/Circle Command Fill Enable Disable copying Disable reverse copy, reset] Enable reverse during copying. Disable x-wrap, [reset] Enable wrap around x-direction during A[7:0] 1~124 horizontal offset number Column Invalid entry value larger than horizontal scroll B[7:0] start address C[7:0] number rows H-scrolled Horizontal Scroll D[7:0] Reserved E[1:0] scrolling time interval test mode normal slow slowest
A[7:0] B[7:0] C[7:0] D[7:0] E[1:0]
Note operates during display Stop Moving Start Moving
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COMMAND DESCRIPTIONS
Column Address (15h) This command specifies column start address address display data RAM. This command also sets column address pointer column start address. This pointer used define current read/write column address graphic display data RAM. horizontal address increment mode enabled command A0h, after finishing read/write column data, incremented automatically next column address. Whenever column address pointer finishes accessing column address, reset back start column address.
Address (75h) This command specifies start address address display data RAM. This command also sets address pointer start address. This pointer used define current read/write address graphic display data RAM. vertical address increment mode enabled command A0h, after finishing read/write data, incremented automatically next address. Whenever address pointer finishes accessing address, reset back start address. example, column start address column address 129, start address address 130. Horizontal address increment mode enabled command A0h. this case, graphic display data column accessible range from column column from only. addition, column address pointer address pointer After finishing read/write pixel data, column address increased automatically access next location next read/write operation. Whenever column address pointer finishes accessing column 129, reset back column address automatically increased While column location accessed, address reset back diagram below shows column address pointer movement this example. Col129 Col130 Col131
Figure Example column address pointer movement
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Write Command (5Ch) After this single byte command, data entries will written into display until another command written. Address pointer increased accordingly. This command must sent before write data into RAM.
Read Command (5Dh) After this single byte command, data read from display until another command written. Address pointer increased accordingly. This command must sent before read data from RAM.
Re-map Color Depth (A0h) This command multiple configurations each setting described follows. Address increment mode (A[0]) When driver horizontal address increment mode. After display read/written, column address pointer increased automatically column address pointer reaches column address, column address pointer reset column start address address pointer increased sequence movement column address point horizontal address increment mode shown Figure
Figure Address pointer movement horizontal address increment mode When A[0] driver vertical address increment mode. After display read/written, address pointer increased automatically address pointer reaches address, address pointer reset start address column address pointer increased sequence movement column address point vertical address increment mode shown Figure
Figure Address pointer movement vertical address increment mode Column Address Mapping (A[1]) This command made flexible layout segment signals OLED module with segment arranged from left right vice versa. Color Remap (A[2]) This command made flexible layout color sequence
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interface selection (A[3]) This command made setting 6800 8080 parallel interface either 8/16-bit 9/18-bit. Remap (A[4]) This determines scanning direction common flexible layout common signals OLED module either from down vice versa. even split pins (A[5]) This even arrangement pins. A[5] Disable split even, assignment common sequential COM131 COM129 COM32.SC131.SA0.COM0 COM1. COM30 COM31 A[5] Enable split even, assignment common even split COM131 COM129. COM3 COM1.SC131.SA0.COM0 COM2. COM60 COM62 Display color mode (A[7:6]) Select either 262k, color mode. 262k colors mode, 16-bit interface selected, there communication modes. mode pixel data transmitted 16-bit words. mode communication session consisted three 16-bit words transmit pixel data. Please refer section "Data access 262k colors mode" details. other 8/9/18-bit parallel interfaces, there difference between mode mode selections. display data format different mode described section "Graphic Display Data (GDDRAM)".
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Display Start Line (A1h) This command Display Start Line register determine starting address display displayed selecting value from 131. figure below shows example this command. there, "Row" means graphic display data row. COM0 COM1 COM2 COM3 COM125 COM126 COM127 COM128 COM129 COM130 COM131 Row0 Row1 Row2 Row3 Row125 Row126 Row127 Row128 Row129 Row130 Row131 Row4 Row5 Row6 Row7 Row129 Row130 Row131 Row0 Row1 Row2 Row3 Row0 Row1 Row2 Row3 Row125 Row126 Row127 Row128 Row129 Row4 Row5 Row6 Row7 Row129 Row130 Row131 Row0 Row1 ratio Display start line
Figure Example display start line with remap Display Offset (A2h) This command specifies mapping display start line assumed that COM0 display start line, display start line register equals COM0-131. figure below shows example this command. there, "Row" means graphic display data row. COM0 COM1 COM2 COM3 COM125 COM126 COM127 COM128 COM129 COM130 COM131 Row0 Row1 Row2 Row3 Row125 Row126 Row127 Row128 Row129 Row130 Row131 Row4 Row5 Row6 Row7 Row129 Row130 Row131 Row0 Row1 Row2 Row3 Row0 Row1 Row2 Row3 Row125 Row126 Row127 Row128 Row129 Row4 Row5 Row6 Row7 Row129 Row0 Row1 Row2 Row3 ratio Display offset
Figure Example display offset with remap
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Display Mode (A4h A7h) These single byte command they used Normal Display, Entire Display Entire Display Inverse Display. Entire Display (A5h) Forces entire display "GS63" regardless contents display data RAM. Entire Display (A4h) Forces entire display gray level "GS0" regardless contents display data RAM. Inverse Display (A7h) gray level display data swapped such that "GS0" "GS63", "GS1" "GS62", Normal Display (A6h) Reset above effect turn data corresponding gray level.
Master Configuration (ADh) This command contains multiple bits control several functionalities driver. Select DC-DC converter (A[0]) Disable selection DC-DC converter supplied externally. (POR) Enable selection DC-DC converter supply high voltage VCC. output voltage converter values external resistors. Please refer section "DC-DC Voltage Converter" details. Select VCOMH supply (A[1]) Select external VCOMH voltage from VCOMH common waveform high voltage level supply. recommended voltage VCOMH such that OLED pixel diode turned (prefer reverse bias state) when segment either driven VPA, level. Select internal VCOMH voltage generated regulator from VREF. level VCOMH programmed command BEh. Select pre-charge voltage supply (A[2]) Select pre-charge voltage sources from external pins VPA, VPB, color respectively. Select pre-charge voltage supply internally. level VPA, VPB, command color respectively.
Sleep mode On/Off (AEh/AFh) These single byte commands used turn OLED panel display off. When display selected circuits Master Configuration command will turned When display off, those circuits will turned segment common output high impedance state.
Power Saving Mode (B0h) This command sets driver either normal power mode power saving mode.
Reset (Phase Pre-charge (Phase period (B1h) This command sets length phase segment waveform driver. Phase (A[3:0]): period from unit DCLKs. larger capacitance OLED pixel require longer period discharge previous data charge completely. Phase (A[7:4]): period from unit DCLKs. longer period needed charge larger capacitance OLED pixel target voltage VPA, VPB, color respectively.
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Front Clock Divider (DivSet)/ Oscillator Frequency (B3h) This command consists functions: Display Clock Divide Ratio (A[3:0]) divide ratio generate DCLK (Display Clock) from CLK. divide ratio from with power reset value Please refer section "Oscillator Circuit Display Time Generator" details DCLK CLK. Oscillator Frequency (A[7:4]) Program oscillator frequency Fosc which source pulled high. 4-bit value results different frequency setting available shown below. default value 1101b.
Look Table Gray Scale Pulse width (B8h) This command used gray scale table display. Except gray scale entry which zero pre-charge current drive, each entry gray scale level programmed length current drive stage pulse width with unit DCLK. longer length pulse width, brighter OLED pixel when it's turned Please refer section "Graphic Display Data (GDDRAM)" more detailed explanation relation display data RAM, gray scale table pixel brightness. Following command B8h, user pulse width from PW1, PW3, PW5, PW59, PW61, PW63 sequence complies following conditions. Afterwards, driver automatically derives pulse width even entry gray scale table PW2, PW4, PW62 with formula like below. (PWn-1 PWn+1) example, DCLKs DCLKs, (3+7)/2 DCLKs setting gray scale table entry perform gamma correction OLED panel display. Normally, desired that brightness response panel linearly proportional image data value display data RAM. However, OLED panel somehow responded non-linear way. Appropriate gray scale table setting like example below compensate this effect. Brightness Pulse Width Gray scale table setting Brightness
Panel response
Result linear response Gray Scale
Gray Scale
Pulse width
Figure Example gamma correction gray scale table setting
Built-in Linear (B9h) This command reloads preset linear gray scale table PW62 123, PW63 DCLKs.
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Pre-charge voltage Color (BBh) This command used VPA, phase voltage level color respectively. command valid condition that these voltages selected generate internally command ADh. programmed pre-charge voltage reference VREF VCOMH. Voltage level increases linearly when value increases.
VCOMH (BEh) This command sets high voltage level common pins, VCOMH, when selected generate internally command ADh. level VCOMH programmed with reference VREF. Voltage level increases linearly when value increases.
Contrast Current Color (C1h) This command Contrast Current each color chip three contrast control circuits color Each contrast circuit contrast steps from FFh. segment output current ISEG increases linearly with contrast step, which results brighter color. This relation shown Figure many situations, output brightness color pixels different under same segment current condition. contrasts color such that brightness each color same OLED panel
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Master Contrast Current Control (C7h) This command control segment output current scale factor. This factor common color chip master control steps. factor ranged from [0000] [1111]. [1111]. smaller master current value, dimmer OLED panel display set. example, original segment output current color 160uA scale factor setting scale factor reduce current 80uA. Please Figure
Segment output current
Master current setting
Change contrast control moves along contrast curve with constant slope
Output current Iseg (uA)
Contrast setting
Change master current selects different contrast slope.
Figure Segment output current different contrast control master current setting
Multiplex Ratio (CAh) This command switches default 1:132 multiplex mode multiplex mode from 132. example, when multiplex ratio only common pins enabled. starting ending enabled common pins depended setting "Display Offset" register programmed command A2h.
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Graphic Acceleration command description Draw Line (83h) This command draws line given start, column coordinates color line. Line Color Column
Column Figure Example draw line command example, line above drawn following command sequence. Enter into draw line mode command Send column start address line, column1, example Send start address line, example Send column address line, column example Send address line, example Send color line, example 35d, blue color
Draw Rectangle (84h) Given starting point (Row Column ending point (Row Column specify outline fill area colors, rectangle that will drawn with color specified. Remarks: fill color option disabled, enclosed area will filled. Column Outline Color Column Figure Example draw rectangle command following example illustrates rectangle drawing command sequence. Enter "draw rectangle mode" execute command starting column coordinates, Column e.g., 03h. starting coordinates, e.g., 02h. finishing column coordinates, Column e.g., finishing coordinates, e.g., outline color e.g., (28d, blue color filled color e.g., (0d, 40d) color Filled Color
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Draw Circle (86h) providing center coordination (column address) radius length, specify outline fill area colors, circle will drawn with colors specified.
Outline Color
Radius
Filled Color
Center column address Figure Example draw circle command following example illustrates circle drawing command sequence. Enter "draw circle mode" execute command circle center column coordinates, e.g., 03h. circle center coordinates. e.g., 10h. radius circle. e.g., outline color e.g., (0d, 40d) color filled color e.g., (28d, blue color
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Copy (8Ah) Copy rectangular region defined starting point (Row Column ending point (Row Column location (Row Column coordinates smaller than ending points, image will overlap original one. following example illustrates copy procedure. Enter "copy mode" execute command starting column coordinates, Column E.g., 00h. starting coordinates, E.g., 00h. finishing column coordinates, Column E.g., finishing coordinates, E.g., column coordinates, Column E.g., coordinates, E.g., Original Image
Column
Column Copied Image Column Column
Figure Example copy command
Window (8Ch) This command will window area specify starting point (Row Column ending point (Row Column After execution this command, selected window area will become darker follow.
Table Result change brightness window command Original gray scale GS15 GS16 GS19 GS20 GS23 GS60 GS63 gray scale after window command change GS15
Additional execution this command over same window area will change data content.
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Clear Window (8Eh) This command sets window area specify starting point (Row Column ending point (Row Column clear window display. graphic display data content specified window area will zero. This command combined with Copy command make "move" result. following example illustrates copy plus clear procedure results moving window object. Enter "copy mode" execute command starting column coordinates, Column E.g., 00h. starting coordinates, E.g., 00h. finishing column coordinates, Column E.g., finishing coordinates, E.g., column coordinates, Column E.g., coordinates, E.g., Enter "clear mode" execute command starting column coordinates, Column E.g., 00h. starting coordinates, E.g., 00h. finishing column coordinates, Column E.g., finishing coordinates, E.g., Original Image
Column
Copied Image
Clear Command
Column Column Column
Figure Example copy clear Move command
Fill Enable/Disable (92h) This command functions. Enable/Disable fill (A[0]) Disable filling color into rectangle draw rectangle command. (POR) Enable filling color into rectangle draw rectangle command. Enable/Disable reverse copy (A[4]) Disable reverse copy (POR) During copy command, image colors swapped such that "GS0" "GS63", "GS1" "GS62",
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Horizontal Scroll (96h) This command consists consecutive bytes horizontal scroll parameters. determined scrolling start page, page scrolling speed. Before issuing this command, horizontal scroll must deactivated (9Eh). Otherwise, content corrupted.
Stop Moving (9Eh) Stop motion horizontal scrolling.
Start Moving (9Fh) Start motion horizontal scrolling. This command should only issued after Horizontal scroll setup parameters defined. following actions prohibited after horizontal scroll activated access (Data write read) Changing horizontal scroll setup parameters SSD1339 horizontal scroll designed columns scrolling
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MAXIMUM RATINGS
Table Maximum ratings (Voltage Reference VSS)
Symbol VREF VCOMH Tstg Parameter Supply Voltage Supply Voltage/Output voltage SEG/COM output voltage Input voltage Operating Temperature Storage Temperature Range Value -0.3 Vss-0.3 Vdd+0.3 +150 Unit
*Maximum Ratings those values beyond which damage device occur. Functional operation should restricted limits Electrical Characteristics tables Description.
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CHARACTERISTICS
Table characteristics (Unless otherwise specified, Voltage Referenced VSS, 3.5V, 25°C)
Symbol
VDDIO ISLEEP
Parameter
Operating Voltage Logic Supply Voltage Power Supply pins High Logic Output Level Logic Output Level High Logic Input Level Logic Input Level Sleep mode Current Supply Current Supply Current Segment Output Current Setting VDD=2.7V, VCC=11V, IREF=10uA, pattern, Display Segment under test connected with resistive load Vcc.
Test Condition
0.9*VDDIO 0.8*VDDIO
VDDIO 0.1*VDDI
Unit
Iout =100uA, 3.3MHz Iout =100uA, 3.3MHz Iout =100uA, 3.3MHz Iout =100uA, 3.3MHz VDD=2.7V, Display OFF, panel attached VDD=3.0V, VCC=18V, Display Contrast =FF, panel attached VDD=3.0V, VCC=18V, Display Contrast =FF, panel attached Contrast Contrast Contrast Contrast (ISEG IMID)/IMID IMID (IMAX IMIN)/2 ISEG[0:395] Segment current contrast
VDDIO 0.2*VDDI
ISEG
Segment output current uniformity
Adj.
Adjacent output current uniformity (contrast Booster output voltage (Vcc)
(I[n]-I[n+1]) (I[n]+I[n+1]) Vin=3V, L=22uH; R1=450Kohm; R2=50Kohm; 30mA(soaking)
±2.0
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CHARACTERISTICS
Table characteristics (Unless otherwise specified, Voltage Referenced VSS, 3.5V, 25°C.)
Symbol
FOSC FFRM
Parameter
Oscillation Frequency Display Timing Generator Frame Frequency Mode
Test Condition
2.7V 132RGB Graphic Display Mode, Display Internal Oscillator Enabled
FOSC 1/(D*K*132)
Unit
divide ratio (POR number display clocks (POR=136, i.e. phase1 dclk+phase2 dclk+ phase3 dclk=4+7+125) Refer command table detail description
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Table 6800-Series parallel interface timing characteristics (VDD 3.5V, 25°C)
Symbol
tcycle tDSW tDHW tDHR tACC
Parameter
Clock Cycle Time Address Setup Time Address Hold Time Write Data Setup Time Write Data Hold Time Read Data Hold Time Output Disable Time Access Time Chip Select Pulse Width (read) Chip Select Pulse Width (write) Chip Select High Pulse Width (read) Chip Select High Pulse Width (write) Rise Time Fall Time
Unit
D/C# R/W#
tcycle D0~D7(WRITE) tACC D0~D7(READ) Valid Data
tDSW Valid Data tDHR tDHW
when used: instead; when used: instead; when used: instead. Figure 6800-series parallel interface characteristics
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Table 8080-Series parallel interface timing characteristics (VDD 3.5V, 25°C)
Symbol
tcycle tDSW tDHW tDHR tACC
Parameter
Clock Cycle Time Address Setup Time Address Hold Time Write Data Setup Time Write Data Hold Time Read Data Hold Time Output Disable Time Access Time Chip Select Pulse Width (read) Chip Select Pulse Width (write) Chip Select High Pulse Width (read) Chip Select High Pulse Width (write) Rise Time Fall Time
Unit
tcycle
tDSW D0-D17 (Write data driver) D0-D17 (Read data from driver) Valid Data
tDHW
tACC Valid Data
tDHR
when used: instead; when used: instead; when used: instead; when used: instead. Figure 8080-series parallel interface characteristics
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Table Serial interface timing characteristics (VDD 3.5V, 25°C)
Symbol
tcycle tCSS tCSH tDSW tDHW tCLKL tCLKH Clock Cycle Time Address Setup Time Address Hold Time Chip Select Setup Time Chip Select Hold Time Write Data Setup Time Write Data Hold Time Clock Time Clock High Time Rise Time Fall Time
Parameter
Unit
D/C# tCSS tCLK SCLK(D0) tDSW SDIN(D1) Valid Data tDHW tcycle tCSH tCLKH
SCLK(D0)
SDIN(D1)
Figure Serial interface characteristics
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APPLICATION EXAMPLE
configuration 8-bit 6800-parallel interface mode, externally shown following diagram: (VDD VDDIO 3.0V, external 12V, IREF 10uA)
Color OLED Panel 132RGB
COM130 COM0
SSD1339Z
VCOMH D7~D0 RES# IREF VDDIO VP_C VP_B VP_A VBREF RESE VDDB
COM1 COM131
SA131 SB131 SC131
D7~D0
RES#
[GND]
connected interface: D0~D7, R/W#, D/C#, RES#, internally connected VDD: M/S#, internally connected VSS: VSSB, BGGND internally connected VCC: VREF externally connected VDD: BS0,1 externally connected VSS: floated: VP_C, VP_B, VP_A, VBREF, RESE, VDDB, C1~C3: 4.7uF Voltage IREF (Voltage IREF VSS) IREF 910K
Figure Application example 8-bit 6800-parallel interface mode
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PACKAGE INFORMATION
SSD1339U3 Assignment
Figure SSD1339U3 assignment
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Table SSD1339U3 assignment
Name COMH VDDIO R/W# D/C# RES# IREF VBREF RESE VDDIO Name COM129 COM128 COM127 COM126 COM125 COM124 COM123 COM122 COM121 COM120 COM119 COM118 COM117 COM116 COM115 COM114 COM113 COM112 COM111 COM110 COM109 COM108 COM107 COM106 COM105 COM104 COM103 COM102 COM101 COM100 COM99 COM98 COM97 COM96 COM95 COM94 COM93 COM92 COM91 COM90 COM89 COM88 COM87 COM86 COM85 COM84 COM83 COM82 COM81 COM80 COM79 COM78 COM77 COM76 COM75 COM74 COM73 COM72 COM71 COM70 COM69 COM68 COM67 COM66 Name SA127 SC126 SB126 SA126 SC125 SB125 SA125 SC124 SB124 SA124 SC123 SB123 SA123 SC122 SB122 SA122 SC121 SB121 SA121 SC120 SB120 SA120 SC119 SB119 SA119 SC118 SB118 SA118 SC117 SB117 SA117 SC116 SB116 SA116 SC115 SB115 SA115 SC114 SB114 SA114 SC113 SB113 SA113 SC112 SB112 SA112 SC111 SB111 SA111 SC110 SB110 SA110 SC109 SB109 SA109 SC108 SB108 SA108 SC107 SB107 SA107 SC106 SB106 SA106 SC105 SB105 SA105 SC104 SB104 SA104 SC103 SB103 SA103 SC102 SB102 SA102 SC101 SB101 Name SA101 SC100 SB100 SA100 SC99 SB99 SA99 SC98 SB98 SA98 SC97 SB97 SA97 SC96 SB96 SA96 SC95 SB95 SA95 SC94 SB94 SA94 SC93 SB93 SA93 SC92 SB92 SA92 SC91 SB91 SA91 SC90 SB90 SA90 SC89 SB89 SA89 SC88 SB88 SA88 SC87 SB87 SA87 SC86 SB86 SA86 SC85 SB85 SA85 SC84 SB84 SA84 SC83 SB83 SA83 SC82 SB82 SA82 SC81 SB81 SA81 SC80 SB80 SA80 SC79 SB79 SA79 SC78 SB78 SA78 SC77 SB77 SA77 SC76 SB76 SA76 SC75 SB75 SA75 SC74 SB74 Name SA74 SC73 SB73 SA73 SC72 SB72 SA72 SC71 SB71 SA71 SC70 SB70 SA70 SC69 SB69 SA69 SC68 SB68 SA68 SC67 SB67 SA67 SC66 SB66 SA66 SC65 SB65 SA65 SC64 SB64 SA64 SC63 SB63 SA63 SC62 SB62 SA62 SC61 SB61 SA61 SC60 SB60 SA60 SC59 SB59 SA59 SC58 SB58 SA58 SC57 SB57 SA57 SC56 SB56 SA56 SC55 SB55 SA55 SC54 SB54 SA54 SC53 SB53 SA53 SC52 SB52 SA52 SC51 SB51 SA51 SC50 SB50 SA50 SC49 SB49 SA49 SC48 SB48 SA48 SC47 Name SB47 SA47 SC46 SB46 SA46 SC45 SB45 SA45 SC44 SB44 SA44 SC43 SB43 SA43 SC42 SB42 SA42 SC41 SB41 SA41 SC40 SB40 SA40 SC39 SB39 SA39 SC38 SB38 SA38 SC37 SB37 SA37 SC36 SB36 SA36 SC35 SB35 SA35 SC34 SB34 SA34 SC33 SB33 SA33 SC32 SB32 SA32 SC31 SB31 SA31 SC30 SB30 SA30 SC29 SB29 SA29 SC28 SB28 SA28 SC27 SB27 SA27 SC26 SB26 SA26 SC25 SB25 SA25 SC24 SB24 SA24 SC23 SB23 SA23 SC22 SB22 SA22 SC21 SB21 SA21 SC20 Name SB20 SA20 SC19 SB19 SA19 SC18 SB18 SA18 SC17 SB17 SA17 SC16 SB16 SA16 SC15 SB15 SA15 SC14 SB14 SA14 SC13 SB13 SA13 SC12 SB12 SA12 SC11 SB11 SA11 SC10 SB10 SA10 Name COM0 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8 COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16 COM17 COM18 COM19 COM20 COM21 COM22 COM23 COM24 COM25 COM26 COM27 COM28 COM29 COM30 COM31 COM32 COM33 COM34 COM35 COM36 COM37 COM38 COM39 COM40 COM41 COM42 COM43 COM44 COM45 COM46 COM47 COM48 COM49 COM50 COM51 COM52 COM53 COM54 COM55 COM56 COM57 COM58 COM59 COM60 COM61 COM62 COM63
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SSD1339U3 details dimensions
Figure SSD1339U3 detail dimensions
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Contact Side
JACS-10142
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Solomon Systech reserves right make changes without further notice products herein. Solomon Systech makes warranty, representation guarantee regarding suitability products particular purpose, does Solomon Systech assume liability arising application product circuit, specifically disclaims liability, including without limitation consequential incidental damages. "Typical" parameters vary different applications. operating parameters, including "Typicals" must validated each customer application customer's technical experts. Solomon Systech does convey license under patent rights rights others. Solomon Systech products designed, intended, authorized components systems intended surgical implant into body, other applications intended support sustain life, other application which failure Solomon Systech product could create situation where personal injury death occur. Should Buyer purchase Solomon Systech products such unintended unauthorized application, Buyer shall indemnify hold Solomon Systech offices, employees, subsidiaries, affiliates, distributors harmless against claims, costs, damages, expenses, reasonable attorney fees arising directly indirectly, claim personal injury death associated with such unintended unauthorized use, even such claim alleges that Solomon Systech negligent regarding design manufacture part.
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