PCM1726 Stereo Audio DIGITAL-TO-ANALOG CONVERTER Bits, 96kHz Samp
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PCM1726
Stereo Audio DIGITAL-TO-ANALOG CONVERTER Bits, 96kHz Sampling
FEATURES
COMPLETE STEREO DAC: Includes Digital Filter Output DYNAMIC RANGE: 96dB MULTIPLE SAMPLING FREQUENCIES: 16kHz 96kHz Oversampling Sampling Frequencies SYSTEM CLOCK: 256fS 384fS NORMAL DATA INPUT FORMATS SOFT MUTE
DESCRIPTION
PCM1726 complete cost stereo audio digital-to-analog converter (DAC), operating 256fS 384fS system clock. contains 3rdorder modulator, digital interpolation filter, analog output amplifier. PCM1726 accepts 16-bit input data either normal formats. digital filter performs interpolation function includes soft mute. PCM1726 accept standard digital audio sampling frequencies well one-half double sampling frequencies. PCM1726 ideal applications which combine compressed audio video data such DVD, DVDROM, set-top boxes MPEG sound cards.
BCKIN LRCIN Serial Input Oversampling Digital Filter with Function Controller
Multi-level Delta-Sigma Modulator
Low-pass Filter
VOUTL
Multi-level Delta-Sigma Modulator Low-pass Filter VOUTR
MUTE FORMAT LRPL Mode Control
ZERO BPZ-Cont. Open Drain
RSTB 256fS/384fS Power Supply
SCKI
AGND DGND
International Airport Industrial Park Mailing Address: 11400, Tucson, 85734 Street Address: 6730 Tucson Blvd., Tucson, 85706 Tel: (520) 746-1111 Twx: 910-952-1111 Internet: http://www.burr-brown.com/ FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
1996 Burr-Brown Corporation
PDS-1345B
Printed U.S.A. March, 1997
SPECIFICATIONS
specifications +25°C, +VCC +VDD +5V, 44.1kHz, 16-bit input data, SYSCLK 384fS, unless otherwise noted. PCM1726 PARAMETER RESOLUTION DATA FORMAT Audio Data Format Data Length Sampling Frequency (fS) Internal System Clock Frequency DIGITAL INPUT/OUTPUT LOGIC LEVEL DYNAMIC PERFORMANCE(1) THD+N (0dB) THD+N -60dB Dynamic Range Signal-to-Noise Ratio(2) Channel Separation ACCURACY Gain Error Gain Mismatch, Channel-to-Channel Bipolar Zero Error ANALOG OUTPUT Output Voltage Center Voltage Load Impedance DIGITAL FILTER PERFORMANCE Passband Stopband Passband Ripple Stopband Attenuation Delay Time INTERNAL ANALOG FILTER -3dB Bandwidth Passband Response POWER SUPPLY REQUIREMENTS Voltage Range Supply Current: TEMPERATURE RANGE Operation Storage VOUT VCC/2 Full Scale (0dB) Load 0.445 0.555 ±0.17 11.125/fS -0.16 +100 44.1kHz 96kHz 44.1kHz 96kHz 44.1kHz 96kHz 44.1kHz 96kHz 44.1kHz CONDITIONS Standard /I2S 256fS /384fS ±1.0 ±1.0 0.62 VCC/2 Vp-p UNITS Bits
±5.0 ±5.0
20kHz VDD, 44.1kHz 96kHz
NOTES: Dynamic performance specs tested with 20kHz pass filter THD+N specs tested with 30kHz LPF, 400Hz HPF, Average-Mode. tested with Infinite Zero Detection off.
information provided herein believed reliable; however, BURR-BROWN assumes responsibility inaccuracies omissions. BURR-BROWN assumes responsibility this information, such information shall entirely user's risk. Prices specifications subject change without notice. patent rights licenses circuits described herein implied granted third party. BURR-BROWN does authorize warrant BURR-BROWN product life support devices and/or systems.
PCM1726
CONFIGURATION
VIEW SSOP
ASSIGNMENTS
NAME SCKI FORMAT LRPL MUTE RSTB ZERO TYPE FUNCTION Connection. System Clock Input: 256fS 384fS. Reserved Factory Use. connect. Input Data Format Control. Left/Right Polarity Control. Soft Mute Control. Reset Input. When this low, digital filters modulators held reset. Zero Data Flag. This when data continuously zero more than 65,535 cycles BCKIN. Right Channel Analog Output. Analog Ground. Analog Power Supply (+5V). Left Channel Analog Output. Common Analog Output Amplifiers. Clock Clocking Audio Data. Serial Audio Data Input. Left/Right Word Clock. Frequency equal Must Tied Ground. Connect. Digital Power Supply (+5V). Recommended connection analog power supply. Digital Ground. Recommended connection digital ground plane.
SCKI FORMAT LRPL MUTE RSTB ZERO VOUTR
PCM1726
DGND TEST LRCIN BCKIN VOUTL
4(1) 5(1) 6(1) 7(1)
14(1) 15(1) 16(1)
VOUTR AGND VOUTL BCKIN LRCIN TEST DGND
AGND
PACKAGE INFORMATION
PRODUCT PCM1726E PACKAGE 20-Pin SSOP PACKAGE DRAWING NUMBER(1) 334-1
NOTE: These pins include internal pull-up resistors.
NOTE: detailed drawing dimension table, please data sheet, Appendix Burr-Brown Data Book.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage +6.5V +VCC +VDD Difference ±0.1V Input Logic Voltage -0.3V (VDD 0.3V) Power Dissipation 300mW Operating Temperature Range -25°C +85°C Storage Temperature -55°C +125°C Lead Temperature (soldering, +260°C Thermal Resistance, +70°C/W
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit damaged ESD. Burr-Brown recommends that integrated circuits handled with appropriate precautions. Failure observe proper handling installation procedures cause damage. damage range from subtle performance degradation complete device failure. Precision integrated circuits more susceptible damage because very small parametric changes could cause device meet published specifications.
PCM1726
TYPICAL PERFORMANCE CURVES
DYNAMIC PERFORMANCE
+25°C, +5V, 44.1kHz, 16-bit input data, unless otherwise noted. Measurement bandwidth 20kHz.
THD+N VCC, 96kHz
THD+N TEMPERATURE 96kHz
THD+N -60dB (dB)
THD+N (dB)
THD+N (dB)
44.1kHz
44.1kHz
VCC,
Temperature (°C)
DYNAMIC RANGE VCC,
THD+N DYNAMIC RANGE
(dB)
Dynamic Range
Dynamic Range
VCC,
44.1 88.2 Sampling Frequency, (kHz)
DIGITAL FILTER
+25°C, +5V, 44.1kHz, fSYS 384fS, 16-bit input data, unless otherwise noted.
OVERALL FREQUENCY CHARACTERISTIC
PASSBAND RIPPLE CHARACTERISTIC
-0.2
-0.4
-0.6
-0.8
-100 0.4536fS 1.3605fS 2.2675fS 3.1745fS 4.0815fS Frequency (Hz)
0.1134fS 0.2268fS Frequency (Hz) 0.3402fS 0.4535fS
PCM1726
Dynamic Range (dB)
THD+N (dB)
THD+N
1/fs L_ch LRCIN (pin BCKIN (pin AUDIO DATA WORD 16-BIT (pin R_ch
FIGURE "Normal" Data Input Timing.
1/fs LRCIN (pin BCKIN (pin AUDIO DATA WORD 16-BIT (pin L_ch R_ch
FIGURE "I2S" Data Input Timing.
LRCKIN tBCH BCKIN tBCY tBCL
1.4V
1.4V
1.4V
BCKIN Pulse Cycle Time BCKIN Pulse Width High BCKIN Pulse Width
tBCY tBCH tBCL
100ns (min) 50ns (min) 50ns (min) 30ns (min) 30ns (min) 30ns (min) 30ns (min)
BCKIN Rising Edge LRCIN Edge LRCIN Edge BCKIN Rising Edge Set-up Time Hold Time
FIGURE Audio Data Input Timing.
PCM1726
Analog DGND Audio Data Processor 256fS/384fS PCM1726 ZERO BCKIN LRCIN SCKI VOUTR VOUTL 10µF Post Analog Mute Analog Post Analog Mute
Analog
FORMAT LRPL MUTE RSTB AGND
MUTE RESET
Analog
FIGURE Typical Connection Diagram Data Format. TYPICAL CONNECTION DIAGRAM Figure illustrates typical connection diagram PCM1726 used stand-alone application. SYSTEM CLOCK system clock PCM1726 must either 256fS 384fS, where audio sampling frequency (LRCIN), typically 32kHz, 44.1kHz 48kHz. system clock used operate digital filter noise shaper. system clock input (SCKI) PCM1726 system clock detection circuit which automatically detects frequency, either 256fS 384fS. system clock should synchronized with LRCIN (pin 16), PCM1726 compensate phase differences. phase difference between LRCIN system clock greater than clocks (BCKIN), synchronization performed automatically. analog outputs forced bipolar zero state (VCC/2) during synchronization function. Table shows typical system clock frequency inputs PCM1726.
SYSTEM CLOCK FREQUENCY (MHz) 256fS 8.192 11.2896 12.288 384fS 12.288 16.9340 18.432
INPUT DATA FORMAT PCM1726 accept input data either normal (MSB-first, right-justified) formats. When (FORMAT) LOW, normal data format selected; HIGH selects format.
FORMAT Normal Format (MSB-first, right-justified) Format (Philips serial data protocol)
TABLE Input Format Selection. SOFT MUTE outputs PCM1726 muted taking (MUTE) state. This internal pull-up resistor left open non-muted operation DAC.
MUTE Soft Mute Soft Mute
TABLE III. Soft Mute Enable.
SAMPLING RATE (LRCIN) 32kHz 44.1kHz 48kHz
WORD POLARITY polarity input data word (LRCIN) controlled (LRPL). interprets HIGH portion LRCIN left-channel data, portion LRCIN right-channel data. Taking HIGH reverses polarity.
LRPL LRCIN VALUE Left-Channel HIGH; Right-Channel Left-Channel LOW; Right-Channel HIGH
TABLE System Clock Frequencies Sampling Rate.
TABLE Left/Right Polarity Selection.
PCM1726
RESET PCM1726 internal power-on reset circuit, well external forced reset (RSTB, internal power-on reset initializes (resets) when supply voltage 4.0V (typ). External forced reset occurs when RSTB outputs VCC/2. power-on reset initialization period equal 1024 system clock periods after 4.0V RSTB HIGH. During initialization period, outputs invalid, analog outputs forced VCC/2. Figures illustrate power-on reset reset-pin reset timing.
order number filter stage, chosen sampling rate. following equation expresses delay time PCM1726: 11.125 1/fS 44.1kHz, 11.125/44.1kHz 251.4µs Applications using data from disc tape source, such audio, CD-Interactive, Video DAT, Minidisc, etc., generally affected delay time. some professional applications such broadcast audio studios, important total delay time less than 2ms. OUTPUT FILTERING testing purposes dynamic tests done PCM1726 using 20kHz pass filter. This filter limits measured bandwidth THD+N, etc. 20kHz. Failure such filter will result higher THD+N lower Dynamic Range readings than found specifications. pass filter removes band noise. Although audible, affect dynamic specification numbers.
APPLICATION CONSIDERATIONS
DELAY TIME There finite delay time delta-sigma converters. converters, this commonly referred latency. delta-sigma converter, delay time determined
4.4V 4.0V 3.6V Reset Reset Removal Internal Reset 1024 system XTI) clocks Clock
FIGURE Internal Power-On Reset Timing.
RSTB tRST(1)
Reset Reset Removal
Internal Reset 1024 system (XTI) clocks Clock NOTE: tRST 20ns
FIGURE External Forced Reset Timing.
PCM1726
INTERNAL ANALOG FILTER FREQUENCY RESPONSE (20Hz~24kHz, Expanded Scale)
INTERNAL ANALOG FILTER FREQUENCY RESPONSE (10Hz~10MHz) 100k Frequency (Hz)
-0.5
-1.0 Frequency (Hz)
FIGURE Pass Filter Frequency Response.
FIGURE Pass Filter Wideband Frequency Response.
GAIN FREQUENCY Gain
VSIN
680pF
100pF
Phase
-180
-270
Frequency (Hz) 100k
-360
FIGURE 3rd-Order LPF. performance internal pass filter from 24kHz shown Figure higher frequency rolloff filter shown Figure user's application PCM1726 driving wideband amplifier, recommended external pass filter. simple 3rdorder filter shown Figure some applications, passive filter 2nd-order filter adequate. application circuit avoid latch-up condition shown Figure
Digital Power Supply
Analog Power Supply
POWER SUPPLY CONNECTIONS
PCM1726 power supply connections: digital (VDD) analog (VCC). Each connection also separate ground. power supplies turn different times, there possibility latch-up condition. avoid this condition, recommended have common connection between digital analog power supplies. separate supplies used without common connection, delta between supplies during ramp-up time must less than 0.6V.
DGND
AGND
FIGURE Latch-up Prevention Circuit. BYPASSING POWER SUPPLIES power supplies should bypassed close possible unit. also recommended include 0.1µF ceramic capacitor parallel with 10µF tantalum bypass capacitor.
PCM1726
Phase
OPA134
Gain (dB)
1500pF
18-Bit
5-level Quantizer 48fS (384fS) 64fS (256fS)
FIGURE 5-Level Modulator Block Diagram.
THEORY OPERATION
ORDER MODULATOR
Gain (-dB)
delta-sigma section PCM1726 based 5-level amplitude quantizer 3rd-order noise shaper. This section converts oversampled input data 5-level deltasigma format. block diagram 5-level delta-sigma modulator shown Figure This 5-level delta-sigma modulator advantage stability clock jitter over typical one-bit (2-level) delta-sigma modulator. combined oversampling rate delta-sigma modulator internal interpolation filter 48fS 384fS system clock, 64fS 256fS system clock. theoretical quantization noise performance 5-level delta-sigma modulator shown Figure
-100 -120 -140 -160 Frequency (kHz)
FIGURE Quantization Noise Spectrum.
PCM1726
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