32Mbyte(8Mx32) 72-pin Mode Ref. SIMM Design Part HMD8M32M16, HMD8M32M1

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32Mbyte(8Mx32) 72-pin Mode Ref. SIMM Design Part HMD8M32M16, HMD8M32M1

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HMD8M32M16
32Mbyte(8Mx32) 72-pin Mode Ref. SIMM Design Part HMD8M32M16, HMD8M32M16G GENERAL DESCRIPTION
HMD8M32M16 dynamic high density memory module. module consists sixteen CMOS 4bit DRAMs 24-pin packages mounted 72-pin, double-sided, FR-4-printed circuit board. 0.22uF decoupling capacitor mounted printed circuit board each DRAM components. module single In-line Memory Module with edge connections intended mounting 72-pin edge connector sockets. module components powered from single power supply inputs outputs TTL-compatible.
FEATURES
Part Identification HMD8M32M16-2048 Cycles/32ms Ref, Solder HMD8M32M16G-2048 Cycles/32ms Ref, Gold Access times 60ns High-density 32MByte design Single ±0.5V power supply JEDEC standard pinout FP(Fast Page) mode operation compatible inputs outputs FR4-PCB design
SYMBOL
ASSIGNMENT
SYMBOL SYMBOL SYMBOL
DQ16 DQ17 DQ18 DQ19
DQ20 DQ21 DQ22 DQ23 NC(A11) /RAS1 /RAS0
/CAS0 /CAS2 /CAS3 /CAS1 /RAS0 /RAS1 DQ24 DQ25 DQ10 DQ26
DQ11 DQ27 DQ12 DQ28 DQ29 DQ13 DQ30 DQ14 DQ31 DQ15
OPTIONS
Timing 50ns access 60ns access Packages 72-pin SIMM
MARKING
PERFORMANCE RANGE
SPEED tRAC 50ns 60ns tCAC 13ns 15ns 90ns 110ns 35ns 40ns
SIMM VIEW
Note: used HMD8M32M16
NAMES
Name A0-A10 A0-A11 DQ0-DQ31 Function Address Input(2K Ref) Address Input(4K Ref) Data In/Out Read/Write Input Name /RAS0, /RAS1 /CAS0 /CAS3 Function Address Strobe Column Address Strobe Presence Detect Name Function Ground Connection Power(+5V)
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
FUNCTIONAL BLOCK DIAGRAM
/CAS0
HMD8M32M16
/RAS0
/CAS /RAS A0-A10(A11).
/CAS /RAS
/RAS1
A0-A10(A11)
/CAS /RAS A0-A10(A11).
/CAS1
/CAS /RAS
A0-A10(A11)
/CAS /RAS A0-A10(A11).
/CAS /RAS
A0-A10(A11)
/CAS /RAS A0-A10(A11).
/CAS2
/CAS /RAS
A0-A10(A11)
/CAS /RAS A0-A10(A11).
/CAS /RAS
A0-A10(A11)
/CAS /RAS A0-A10(A11).
/CAS3
/CAS /RAS
A0-A10(A11)
/CAS /RAS A0-A10(A11).
/CAS /RAS
A0-A10(A11)
/CAS /RAS A0-A10(A11).
A0-A10 (A11)
/CAS /RAS A0-A10(A11)
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage Relative Voltage Supply Relative Power Dissipation Storage Temperature SYMBOL ,OUT TSTG
HMD8M32M16
RATING 7.0V 7.0V -55oC 150oC
Short Circuit Output Current 50mA Permanent device damage occur Absolute Maximum Ratings" exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Voltage reference VSS, TA=0 PARAMETER Supply Voltage Ground Input High Voltage Input Voltage SYMBOL -1.0 TYP. Vcc+1 UNIT
OPERATING CHARACTERISTICS
SYMBOL ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 Il(L) IO(L) ICC2 Standby Current /RAS=/CAS=VIH ICC3 /RAS Only Refresh Current /CAS=V /RAS, Address cycling @tRC=min
URL:www.hbe.co.kr REV.1.0 (August.2002) HANBit Electronics Co.,Ltd.
SPEED
1760 1600 1760 1600 1440 1280 1760 1600
UNITS
ICC1 Operating Current (/RAS /CAS Address cycling @tRC=min.)
ICC4 Fast Page Mode Current (/RAS=VIL, /CAS, Address cycling @tPC=min ICC5 Standby Current (/RAS=/CAS=Vcc-0.2V ICC6 /CAS-Before-/RAS Refresh Current (/RAS /CAS cycling RC=min Input Leakage Current (Any input 6.5V, other pins under test Output Leakage Current (Data disabled, VOUT 5.5V Output High Voltage Level (IOH= -5mA Output Voltage Level (IOL 4.2mA
HMD8M32M16
NOTE: ICC1, ICC3, ICC4 ICC6 dependent output loading cycle rates. Specified values obtained with output open. specified average current. ICC1 ICC3, address changed maximum once while /RAS=VIL. ICC4, address changed maximum once within page mode cycle.
CAPACITANCE
TA=25 SYMBOL CIN1 CIN3 CIN4 CDQ1 UNITS
DESCRIPTION Input Capacitance (A0-A10) Input Capacitance (/W) Input Capacitance (/RAS0) Input Capacitance (/CAS0-/CAS3) Input/Output Capacitance (DQ0-31)
CHARACTERISTICS
70oC 5V±10%, notes 1,2.) UNIT
PARAMETER Random read write cycle time Access time from /RAS Access time from /CAS Access time from column address /CAS output Low-Z Output buffer turn-off delay Transition time (rise fall) /RAS precharge time /RAS pulse width /RAS hold time /CAS hold time /CAS pulse width /RAS /CAS delay time /RAS column address delay time /CAS /RAS precharge time
URL:www.hbe.co.kr REV.1.0 (August.2002)
SYMBOL tRAC tCAC tCLZ tOFF tRAS tRSH tCSH tCAS tRCD tRAD tCRP
HANBit Electronics Co.,Ltd.
address set-up time address hold time Column address set-up time Column address hold time Column address hold referenced /RAS Column Address /RAS lead time Read command set-up time Read command hold referenced /CAS Read command hold referenced /RAS Write command hold time Write command hold referenced /RAS Write command pulse width Write command /RAS lead time Write command /CAS lead time Data-in set-up time Data-in hold time Data-in hold referenced /RAS Refresh period Write command set-up time /CAS setup time (C-B-R refresh) /CAS hold time (C-B-R refresh) /RAS precharge /CAS hold time Access time from /CAS precharge Fast page mode cycle time /CAS precharge time (Fast page) /RAS pulse width (Fast page /RAS precharge time (C-B-R refresh) /RAS hold time (C-B-R refresh) /CAS precharge(C-B-R counter test) NOTES tASR tRAH tASC tCAH tRAL tRCS tRCH tRRH tWCH tWCR tRWL tCWL tDHR tREF tWCS tCSR tCHR tRPC tCPA tRASP tWRP tWRH tCPT 100K
HMD8M32M16
100K
1.An initial pause 200µs required after power-up followed /RAS-only /CAS-before-/RAS refresh cycles
before proper device operation achieved.
2.VIH (min) (max) reference levels measuring timing input signals. Transition times measured between
VIH(min) VIL(max) assumed inputs.
3.Measured with load equivalent 1TTL loads 100pF 4.Operation within tRCD(max) limit insures that tRAC(max) met. tRCD(max) specified reference point only. tRCD
greater than specified tRCD(max) limit, then access time controlled exclusively CAC.
5.Assumes that tRCD tRCD(max)
tAR, tWCR, tDHR referenced tRAD(max) 7.This parameter defines time which output achieves open circuit condition referenced
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
VOL. tWCS, tRWD, tCWD tAWD restrictive operating parameter.
HMD8M32M16
They included data sheet electrical characteristic only. tWCS(min) cycle early write cycle data will remain high impedance duration cycle. Either tRCH tRRH must satisfied read cycle. These parameters referenced /CAS leading edge early write cycles leading edge readwrite cycles. Operation within tRAD(max) limit insures that tRAC(max) met. tRAD(max) specified reference point only. tRAD greater than specified tRAD(max) limit. then access time controlled tAA.
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
TIMING DIAGRAMS
TIMING WAVEFORM READ CYCLE
HMD8M32M16
/RAS
VIHVILtCRP tRCD tRAD tASR tRAH tASC
tRAS tCSH tRSH tCAS tCAH
COLUMN ADDRESS
tCRP
/CAS
VIHVIL-
tRAL
VIHVILROW ADDRESS
tRCS VIHVILVIHVILtRAC
OPEN
tRRH tOEA tCAC tCLZ
tRCH
tOFF tOEZ
DQ0-DQ3(7) VOHVOL-
DATA-OUT
TIMING WAVEFORM WRITE CYCLE (EARLY WRITE) NOTE Dout Open
tRAS tCRP tRCD tRAD tASR tRAH tASC tCAH
COLUMN ADDRESS
/RAS
VIHVIL-
tCSH
tRSH tCAS tRAL
tCRP
/CAS
VIHVIL-
VIHVILROW ADDRESS
tCWL tRWL tWCS tWCH
VIHVILVIHVILtDS
DATA-IN
DQ0-DQ3(7) VOHVOL-
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
PACKAGING INFORMATION
HMD8M32M16
108.0 3.38 1.57 101.19 3.18 0.51
21.50 10.16 6.35
2.03 1.02 6.35 95.25 6.35 1.27
3.34
0.25
2.54
Gold 1.04±0.10 1.27 Solder:0.914±0.10mm
1.29 ±0.08mm
ORDERING INFORMATION
Part Number
Density
Org.
Package
SPEED
HMD8M32M16G-5 HMD8M32M16G-6
32MByte 32MByte
32bit 32bit
Pin-SIMM Pin-SIMM
5.0V 5.0V
50ns 60ns
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.

32Mbyte(8Mx32) 72-pin Mode Ref. SIMM Design Part HMD8M32M16, HMD8M32M1

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