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32Mbyte(8Mx32) Mode Ref. 100Pin SMM, Design Part HMD8M32F4E HMD8M


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HMD8M32F4E
32Mbyte(8Mx32) Mode Ref. 100Pin SMM, Design Part HMD8M32F4E
HMD8M32F4E 32bit dynamic high density memory module. module consists four CMOS DRAMs 50-pin TSOP packages mounted 100-pin, double-sided, FR-4-printed circuit board. 0.1uF 0.22uF decoupling capacitor mounted printed circuit board each DRAM components. module single In-line memory module with edge connections intended mounting 100-pin edge connector sockets. module components powered from single power supply inputs outputs TTL-compatible.
FEATURES
Access times 60ns High-density 32MByte design Single 0.5V power supply JEDEC Standard pinout mode operation compatible inputs outputs FR4-PCB design OPTIONS Timing 50ns access 60ns access Packages 100-pin PERFORMANCE RANGE Speed tRAC 50ns 60ns tCAC 13ns 15ns 90ns 110ns tHPC 26ns 30ns MARKING
Symbol /RAS0 /RAS1 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10
ASSIGNMENT
Symbol /CAS0 /CAS1 Symbol /RAS2 /RAS3 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 DQ23
Symbol /CAS2 /CAS3 DQ22 DQ21 DQ20 DQ19 DQ18 DQ17 DQ16
100PIN VIEW
HANBit Electronics Co.,Ltd.
FUNCTIONAL BLOCK DIAGRAM
HMD8M32F4E
/RAS0 /RAS
/CAS0 /LCAS /CAS1
DQ0-15 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
/RAS /RAS1 /LCAS
/CAS0
/UCAS
/UCAS DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 /CAS1
A0-A11
A0-A11
/RAS /RAS3
/CAS2
/LCAS
DQ16-31 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
/RAS /RAS2 /LCAS /CAS2 /UCAS
/CAS3
/UCAS
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
/CAS3
A0-A11
A0-A11
A0-A11
0.1uF Capacitor each DRAM 0.22uF DRAMs
HANBit Electronics Co.,Ltd.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage Relative Voltage Supply Relative Power Dissipation Storage Temperature Short Circuit Output Current SYMBOL ,OUT TSTG
HMD8M32F4E
RATING 7.0V 7.0V -55oC 150oC 50mA
Permanent device damage occur Absolute Maximum Ratings" exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Voltage reference VSS, TA=0 PARAMETER Supply Voltage Ground Input High Voltage Input Voltage SYMBOL -1.0 TYP. Vcc+1 UNIT
OPERATING CHARACTERISTICS
SYMBOL ICC1 ICC2 ICC3 SPEED Don't care ICC4 ICC5 ICC6 Don't care Il(L) IO(L) ICC1 Operating Current (/RAS /CAS Address cycling RC=min.) ICC2 Standby Current /RAS=/CAS=VIH ICC3 /RAS Only Refresh Current /CAS=V /RAS, Address cycling @tRC=min ICC4 Fast Page Mode Current (/RAS=VIL, /CAS, Address cycling @tPC=min UNITS
HANBit Electronics Co.,Ltd.
ICC5 Standby Current (/RAS=/CAS=Vcc-0.2V ICC6 /CAS-Before-/RAS Refresh Current (/RAS /CAS cycling RC=min Input Leakage Current (Any input 6.5V, other pins under test Output Leakage Current (Data disabled, VOUT 5.5V Output High Voltage Level (IOH= -5mA Output Voltage Level (IOL 4.2mA
HMD8M32F4E
NOTE: ICC1, ICC3, ICC4 ICC6 dependent output loading cycle rates. Specified values obtained with output open. specified average current. ICC1 ICC3, address changed maximum once while /RAS=VIL. ICC4, address changed maximum once within page mode cycle.
CAPACITANCE
TA=25 SYMBOL CIN1 CIN3 CIN4 CDQ1
DESCRIPTION Input Capacitance (A0-A11) Input Capacitance (/WE) Input Capacitance (/RAS0-/RAS3) Input Capacitance (/CAS0-/CAS3) Input/Output Capacitance (DQ0-31)
UNITS
CHARACTERISTICS
70oC 5V±10%, notes 1,2.) UNIT
STANDARD OPERATION Random read write cycle time Access time from /RAS Access time from /CAS Access time from column address /CAS output Low-Z Output buffer turn-off delay Transition time (rise fall) /RAS precharge time /RAS pulse width /RAS hold time /CAS hold time /CAS pulse width /RAS /CAS delay time /RAS column address delay time /CAS /RAS precharge time address set-up time address hold time Column address set-up time
SYMBOL tRAC tCAC tCLZ tOFF tRAS tRSH tCSH tCAS tRCD tRAD tCRP tASR tRAH tASC
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Column address hold time Column Address /RAS lead time Read command set-up time Read command hold referenced /CAS Read command hold referenced /RAS Write command hold time Write command hold referenced /RAS Write command pulse width Write command /RAS lead time Write command /CAS lead time Data-in set-up time Data-in hold time Refresh period Write command set-up time /CAS setup time (C-B-R refresh) /CAS hold time (C-B-R refresh) /RAS precharge /CAS hold time Access time from /CAS precharge /CAS precharge time (Fast page) /RAS pulse width (Fast page /RAS precharge time (C-B-R refresh) tCAH tRAL tRCS tRCH tRRH tWCH tWCR tRWL tCWL tREF tWCS tCSR tCHR tRPC tCPA tRASP tWRP 200K
HMD8M32F4E
200K
/RAS hold time (C-B-R refresh) tWRH NOTES initial pause 200µs required after power-up followed /RAS-only /CAS-before-/RAS refresh cycles before proper device operation achieved. (min) (max) reference levels measuring timing input signals. Transition times measured between VIH(min) VIL(max) assumed inputs. Measured with load equivalent 1TTL loads 100pF Operation within tRCD(max) limit insures that tRAC(max) met. tRCD(max) specified reference point only. tRCD greater than specified tRCD(max) limit, then access time controlled exclusively CAC. Assumes that tRCD tRCD(max) tAR, tWCR, tDHR referenced tRAD(max) This parameter defines time which output achieves open circuit condition referenced VOL. tWCS, tRWD, tCWD tAWD restrictive operating parameter. They included data sheet electrical characteristic only. tWCS(min) cycle early write cycle data will remain high impedance duration cycle. Either tRCH tRRH must satisfied read cycle. These parameters referenced /CAS leading edge early write cycles leading edge readwrite cycles. Operation within tRAD(max) limit insures that tRAC(max) met. tRAD(max) specified reference point only. tRAD greater than specified tRAD(max) limit. then access time controlled
HANBit Electronics Co.,Ltd.
PACKAGING INFORMATION
HMD8M32F4E
0.08
ORDERING INFORMATION
Part Number Density Org. Package Component Number MODE SPEED
HMD8M32F4E- HMD8M32F4E-
32MByte 32MByte
Pin-SMM Pin-SMM
5.0V 5.0V
50ns 60ns
HANBit Electronics Co.,Ltd.

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