32Mbyte(4Mx64) Mode Ref. 3.3V, DIMM Part HMD4M64D16EV HMD4M64D16E

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32Mbyte(4Mx64) Mode Ref. 3.3V, DIMM Part HMD4M64D16EV HMD4M64D16E

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HMD4M64D16EV
32Mbyte(4Mx64) Mode Ref. 3.3V, DIMM Part HMD4M64D16EV
HMD4M64D16EV 4Mx64bits Dynamic high density memory module. HMD4M64D16EV consists sixteen CMOS 4Mx4bits DRAMs SOJ/TSOP 400mil packages mounted 168-pin glass-epoxy substrate. 0.22uF decoupling capacitor mounted printed circuit board each DRAM. HMD4M64D16EV Dual Inline Memory Module intended mounting into edge connector sockets
FEATURES
Part Identification HMD4M64D16EV 4KCycles/64ms Ref, Gold Plate Lead High-density 32MByte design JEDEC standard proposal without buffer CAS-before-RAS Refresh capability RAS-only Hidden refresh capability Single +3.3± 0.3V power supply mode operation. LVTTL compatible inputs outputs FR4-PCB design Access times 60ns Timing 50ns access 60ns access Packages 168-pin DIMM Marking Marking
PERFORMANCE RANGE
SPEED
tRAC 50ns 60ns
tCAC 18ns 20ns
84ns 104ns
tHPC 20ns 25ns
NAMES
Name A0-A11 Function Address ref) A0-A12 Address ref) /W0,/W2 /OE0,/OE2 Read/Write Enable Output Enable Address EEPROM Input /CAS0 /CAS7 Input Name /RAS0, /RAS2 Strobe Column Strobe Serial Clock Don't Check DQ0-DQ63 Power (+3.3V) Serial Address /Data Data In/Out Address Connection Function Address Name Ground Function
SA0-SA2,SCL,CB0-CB7,SDA will used Parity Mode. This model used.
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBiT Electronics Co.,Ltd.
HMD4M64D16EV
ASSIGNMENT
Symbol DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 /WE0 /CAS0
Symbol /CAS1 /RAS0 /OE0 /OE2 /RAS2 /CAS2 /CAS3 /WE2 DQ16 DQ17
Symbol DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31
Symbol DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 /CAS4
Symbol /CAS5 /RAS1 /RAS3 /CAS6 /CAS7 DQ48 DQ49
Symbol DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBiT Electronics Co.,Ltd.
FUNCTIONAL BLOCK DIAGRAM
0-63
/CAS0 /RAS0 /OE0 /CAS /RAS DQ0-3 /CAS4 /RAS2 /OE2 /CAS /RAS
HMD4M64D16EV
DQ32-35
-A11
-A11
/CAS /RAS
DQ4-7
-A11
/CAS /RAS
DQ36-39
-A11
/CAS1
/CAS /RAS
DQ8-11
/CAS5
-A11
/CAS /RAS
DQ40-43
-A11
/CAS /RAS
DQ12-15
-A11 /CAS6
/CAS /RAS
DQ44-47
-A11
/CAS2
/CAS /RAS
DQ16-19
-A11
/CAS /RAS
DQ48-51
-A11
/CAS /RAS /CAS3
DQ20-23
/CAS /RAS
DQ52-55
-A11
-A11
/CAS /RAS
DQ24-27
/CAS
/CAS /RAS
DQ56-59
-A11
-A11
/CAS /RAS
DQ28-31
-A11
/CAS /RAS
DQ60-63
-A11
/WE0 A(0:11)
/WE2
0.1uF 0.22uF Capacitor DRAMs
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ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage Relative Voltage Supply Relative Power Dissipation Storage Temperature SYMBOL ,OUT TSTG
HMD4M64D16EV
RATING -0.5V 4.6V -0.5V 4.6V -55oC 150oC
Short Circuit Output Current 50mA Permanent device damage occur Absolute Maximum Ratings" exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Voltage reference VSS, TA=0 PARAMETER Supply Voltage Ground Input High Voltage Input Voltage SYMBOL -0.3 TYP. Vcc+0.3 UNIT
OPERATING CHARACTERISTICS
(Recommended operating conditions unless otherwise noted) HMD16M64D16EV(4K REF) SYMBOL SPEED ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 Icc7 Iccs 1600 4000 3200 Don't care 1280 1870 1600 1440 Don't care 1600 1870 1870 UNITS
ICC1 Operating Current (/RAS /CAS Address cycling RC=min.) ICC2 Standby Current /RAS=/CAS=VIH ICC3 /RAS Only Refresh Current /CAS=V /RAS, Address cycling @tRC=min
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ICC4 Mode Current (/RAS=VIL, /CAS, Address cycling @tPC=min ICC5 Standby Current (/RAS=/CAS=Vcc-0.2V ICC6 /CAS-Before-/RAS Refresh Current (/RAS /CAS cycling RC=min Input Leakage Current (Any input 4.5V, other pins under test Output Leakage Current (Data disabled, VOUT 3.3V Output High Voltage Level (IOH= -2mA Output Voltage Level (IOL
HMD4M64D16EV
NOTE: ICC1, ICC3, ICC4 ICC6 dependent output loading cycle rates. Specified values obtained with output open. specified average current. ICC1 ICC3, address changed maximum once while /RAS=VIL. ICC4, address changed maximum once within page mode cycle.
CAPACITANCE
TA=25 3.3V, DESCRIPTION SYMBOL CIN1 CIN3 CIN4 CDQ1
UNITS
Input Capacitance (A0-A11) Input Capacitance (/W0,/W1,/OE0,/OE2) Input Capacitance (/RAS0,/RAS2) Input Capacitance (/CAS0-/CAS7) Input/Output Capacitance (DQ0-63)
CHARACTERISTICS
70oC 3V±10%, notes 1,2.) UNIT
STANDARD OPERATION Random read write cycle time Read-modify-write cycle time Access time from /RAS Access time from /CAS Access time from column address /CAS output Low-Z output Low-Z Output buffer turn-off delay from /CAS Transition time (rise fall) /RAS precharge time /RAS pulse width /RAS hold time /CAS hold time /CAS pulse width /RAS /CAS delay time /RAS column address delay time /CAS /RAS precharge time
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SYMBOL tRWC tRAC tCAC tCLZ tOLZ tOFF tRAS tRSH tCSH tCAS tRCD tRAD tCRP
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address set-up time address hold time Column address set-up time Column address hold time Column address hold referenced /RAS Column Address /RAS lead time Read command set-up time Read command hold referenced /CAS Read command hold referenced /RAS Write command hold time Write command pulse width Write command /RAS lead time Write command /CAS lead time Data-in set-up time Data-in hold time Refresh period Write command set-up time /CAS delay time /RAS delay time Column address delay time /CAS precharge delay time /CAS setup time (/CAS-before /RAS refresh) /CAS hold time(/CAS-before-/RAS refresh) /RAS /CAS precharge time Access time from /CAS precharge Hyper page mode cycle time Hyper page mode read-modify write cycle time /CAS precharge time(Hyper page cycle) /RAS pulse width (Hyper page cycle) /RAS hold time from /CAS precharge access time date delay Output buffer tune delay time from command hold time Output data hold time tRASP tRHCP tOEA tOED tOEZ tOEH tDOH 200K tCHR tRPC tCPA tHPC tHPRWC tASR tRAH tASC tCAH tRRH tRAL tRCS tRCH tRRH tWCH tRWL tCWL tREF tWCS tCWD tRWD tAWD tCPWD tCSR
HMD4M64D16EV
200K
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBiT Electronics Co.,Ltd.
Output buffer turn delay from /RAS Output buffer turn delay from data delay /CAS hold time /CAS hold time precharge time pulse width (Hyper page cycle) tREZ tWEZ tWED tOCH tCHO tOEP tWPE
HMD4M64D16EV
NOTES
1.An initial pause 200µs required after power-up followed /RAS-only /CAS-before-/RAS refresh cycles
before proper device operation achieved.
2.Input voltage levels (min) (max) reference levels measuring timing input signals. Transition times
measured between VIH(min) VIL(max) assumed inputs.
3.Measured with load equivalent 1TTL loads 100pF 4.Operation within tRCD(max) limit insures that tRAC(max) met. tRCD(max) specified reference point only. tRCD
greater than specified tRCD(max) limit, then access time controlled exclusively CAC.
5.Assumes that tRCD tRCD(max)
6.This parameter defines time which output achieves open circuit condition referenced VOL. tWCS, tRWD, tCWD tAWD restrictive operating parameter. They included data sheet electrical characteristic only. tWCS tWCS(min) cycle early write cycle data will remain high impedance duration cycle data output will contain data read from selected address. neither above conditions satisfied, condition data indeternimated. Either tRCH tRRH must satisfied read cycle. Operation within tRAD(max) limit insures that tRAC(max) met. tRAD(max) specified reference point only. tRAD greater than specified tRAD(max) limit. then access time controlled tAA. /RAS goes high before /CAS high going, open circuit condition output achieved /CAS high going. /Cas goes high before /RAS high going, open circuit condition output achieved /RAS high going. 11.tASC
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBiT Electronics Co.,Ltd.
HMD4M64D16EV
PACKAGING INFORMATION
(FRONT VIEW)
3.69mm
0.25
2.54
1.27mm
Gold 1.00mm
1.27±0.1
ORDERING INFORMATION
Part Number Density Org. Package Component Number 16EA 16EA MODE SPEED
HMD4M64D16EV-5 HMD4M64D16EV-6
32MByte 32MByte
Pin-DIMM Pin-DIMM
3.3V 3.3V
50ns 60ns
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBiT Electronics Co.,Ltd.

32Mbyte(4Mx64) Mode Ref. 3.3V, DIMM Part HMD4M64D16EV HMD4M64D16E

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