16Mbyte(4Mx32) DRAM SIMM MODE, Refresh, 3.3V Part HMD4M32M2VE, HMD4M32
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HMD4M32M2VE
16Mbyte(4Mx32) DRAM SIMM MODE, Refresh, 3.3V Part HMD4M32M2VE, HMD4M32M2VEG
HMD4M32M2VE dynamic high-density memory module. module consists CMOS DRAMs 50-pin TSOP packages mounted 72-pin. 0.22uF decoupling capacitor mounted printed circuit board each DRAM components. module single In-line memory module with edge connections intended mounting 72-pin edge connector sockets. module components powered from single 3.3V power supply. inputs outputs LVTTL-compatible.
FEATURES
Part Identification HMD4M32M2VE-Lead finish Solder HMD4M32M2VEG- Lead finish Gold Access times 60ns High-density 16MByte design Cycles/64ms Ref, Gold Single +3.3V± 0.3V power supply wJEDEC standard pinout Mode operation LVTTL compatible inputs outputs FR4-PCB design
SYMBOL
ASSIGNMENT
SYMBOL SYMBOL SYMBOL
DQ16 DQ17 DQ18 DQ19
DQ20 DQ21 DQ22 DQ23
/CAS0 /CAS2 /CAS3 /CAS1 /RAS0 DQ24 DQ25 DQ10 DQ26
DQ11 DQ27 DQ12 DQ28 DQ29 DQ13 DQ30 DQ14 DQ31 DQ15
OPTIONS
Timing 50ns access 60ns access Packages 72-pin SIMM
MARKING
PERFORMANCE RANGE
Speed tRAC 50ns 60ns tCAC 13ns 15ns 84ns 104ns
NAMES
Name A0-A11 DQ0-DQ31 Function Address Input(4K Ref) Data In/Out Read/Write Input Name /RAS0 /CAS0 /CAS3 Function Address Strobe Column Address Strobe Presence Detect Name Function Ground Connection Power(+3.3V)
URL:www.hbe.co.kr REV.1.0 (August.2002)
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FUNCTIONAL BLOCK DIAGRAM
/RAS
/RAS0
HMD4M32M2VE
DQ0-DQ7
/CAS0
/LCAS
/CAS1
/UCAS
DQ10 DQ11 DQ12 DQ13 DQ14 A0-A11 DQ15
DQ8-DQ15
/RAS
/CAS2
/LCAS
DQ16-DQ23
/CAS3
/UCAS
DQ10 DQ11 DQ12 DQ13 DQ14 DQ15
DQ24-DQ31
A0-A11
A0-A11
0.1uF Capacitor each DRAM 0.22uF Toall DRAMs
URL:www.hbe.co.kr REV.1.0 (August.2002)
ANBit Electronics Co.,Ltd.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage Relative Voltage Supply Relative Power Dissipation Storage Temperature SYMBOL ,OUT TSTG
HMD4M32M2VE
RATING -0.5V 6.5V -0.5V 4.6V -55oC 150oC
Short Circuit Output Current 50mA Permanent device damage occur Absolute Maximum Ratings" exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Voltage reference VSS, TA=0 PARAMETER Supply Voltage Ground Input High Voltage Input Voltage SYMBOL -0.3 TYP. +5.5 UNIT
OPERATING CHARACTERISTICS
SYMBOL ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 Il(L) IO(L) ICC1 Operating Current (/RAS /CAS Address cycling RC=min.) ICC2 Standby Current /RAS=/CAS=VIH
URL:www.hbe.co.kr REV.1.0 (August.2002)
SPEED
UNITS
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ICC3 /RAS Only Refresh Current (/CAS=V /RAS, Address cycling @tRC=min ICC4 Fast Page Mode Current (/RAS=VIL, /CAS, Address cycling @tPC=min ICC5 Standby Current (/RAS=/CAS=Vcc-0.2V ICC6 /CAS-Before-/RAS Refresh Current (/RAS /CAS cycling RC=min
HMD4M32M2VE
NOTE: ICC1, ICC3, ICC4 ICC6 dependent output loading cycle rates. Specified values obtained with output open. specified average current. ICC1 ICC3, address changed maximum once while /RAS=VIL. ICC4, address changed maximum once within page mode cycle.
CAPACITANCE
TA=25 3.3V,
DESCRIPTION Input Capacitance (A0-A11) Input Capacitance (/W) Input Capacitance (/RAS0, /RAS1) Input Capacitance (/CAS0-/CAS3) Input/Output Capacitance (DQ0-31)
SYMBOL CIN1 CIN3 CIN4 CDQ1
UNITS
CHARACTERISTICS
70oC 3.3V±10%, notes 1,2.) UNIT
STANDARD OPERATION
SYMBOL
Random read write cycle time Access time from /RAS Access time from /CAS Access time from column address /CAS output Low-Z Transition time (rise fall) /RAS precharge time /RAS pulse width /RAS hold time /CAS hold time /CAS pulse width /RAS /CAS delay time /RAS column address delay time /CAS /RAS precharge time address set-up time address hold time Column address set-up time
URL:www.hbe.co.kr REV.1.0 (August.2002)
tRAC tCAC tCLZ tRAS tRSH tCSH tCAS tRCD tRAD tCRP tASR tRAH tASC
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Column address hold time Column Address /RAS lead time Read command set-up time Read command hold referenced /CAS Read command hold referenced /RAS Write command hold time Write command pulse width Write command /RAS lead time Write command /CAS lead time Data-in set-up time Data-in hold time Refresh period Write command set-up time /CAS setup time (C-B-R refresh) /CAS hold time (C-B-R refresh) /RAS precharge /CAS hold time Access time from /CAS precharge Fast page mode cycle time /CAS precharge time (Fast page) /RAS pulse width (Fast page /RAS precharge time (C-B-R refresh) /RAS hold time (C-B-R refresh) tCAH tRAL tRCS tRCH tRRH tWCH tRWL tCWL tREF tWCS tCSR tCHR tRPC tCPA tRASP tWRP tWRH
HMD4M32M2VE
100K 100K
NOTES 1.An initial pause 200µs required after power-up followed /RAS-only /CAS-before-/RAS refresh cycles before proper device operation achieved. 2.VIH (min) (max) reference levels measuring timing input signals. Transition times measured between VIH(min) VIL(max) assumed inputs. 3.Measured with load equivalent 1TTL loads 100pF 4.Operation within tRCD(max) limit insures that tRAC(max) met. tRCD(max) specified reference point only. tRCD greater than specified tRCD(max) limit, then access time controlled exclusively CAC. 5.Assumes that tRCD tRCD(max) tAR, tWCR, tDHR referenced tRAD(max) 7.This parameter defines time which output achieves open circuit condition referenced VOL. tWCS, tRWD, tCWD tAWD restrictive operating parameter. They included data sheet electrical characteristic only. tWCS tWCS(min) cycle early write cycle data will remain high impedance duration cycle. Either tRCH tRRH must satisfied read cycle. These parameters referenced /CAS leading edge early write cycles leading edge readwrite cycles. Operation within tRAD(max) limit insures that tRAC(max) met. tRAD(max) specified reference point only. tRAD greater than specified tRAD(max) limit. then access time controlled tAA.
URL:www.hbe.co.kr REV.1.0 (August.2002)
ANBit Electronics Co.,Ltd.
TIMING DIAGRAM
HMD4M32M2VE
Please refer attached timing diagram chart
PACKAGING INFORMATION
SIMM Design
107.95 101.19 3.38 R1.57 3.18 ±0.51
19.00 10.16 6.35 2.00 6.35 6.35 95.25 R1.57±1.0
5.08
0.25
2.54
1.27
Gold 1.04±10
1.27±0.08
ORDERING INFORMATION
Part Number Density Org. Package Refresh Cycle 4,096 Cycles 64ms Ref. 4,096 Cycles 64ms Ref. SPEED
HMD4M32M2VEG-5 HMD4M32M2VEG-6
16MByte 16MByte
32bit 32bit
Pin-SIMM Pin-SIMM
3.3V 3.3V
50ns 60ns
URL:www.hbe.co.kr REV.1.0 (August.2002)
ANBit Electronics Co.,Ltd.
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