64Mbyte(4Mx144) 200-pin Mode Ref. DIMM Design Part HMD4M144D9WG GENERA

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64Mbyte(4Mx144) 200-pin Mode Ref. DIMM Design Part HMD4M144D9WG GENERA

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HMD4M144D9WG
64Mbyte(4Mx144) 200-pin Mode Ref. DIMM Design Part HMD4M144D9WG GENERAL DESCRIPTION
HMD4M144D9WG 4Mbit 144bit dynamic high-density memory module. module consists eight CMOS 4Mx16bit DRAMs 50-pin TSOP packages CMOS 16bit DRAM 50pin TSOP package mounted 200-pin, double-sided, FR-4-printed circuit board. 0.1uF 4.7uF decoupling capacitor mounted printed circuit board each DRAM components. module dual In-line memory module with edge connections intended mounting 200-pin edge connector sockets. module components powered from single power supply inputs outputs TTL-compatible.
FEATURES
Access times High -density 64MByte design Part identification HMD4M144D9WG Cycles/64ms Ref, Gold) Single 0.5V power supply JEDEC Standard pinout mode operation compatible inputs output
OPTIONS Timing 50ns access 60ns access Packages 200-pin DIMM
MARKING
PERFORMANCE RANGE
Speed tRAC 50ns 60ns tCAC 13ns 15ns 90ns 110ns 35ns 40ns
NAMES
Name BA0-BA11 DQ0-DQ143 Function Address Input Data In/Out Read/Write Enable Name BRAS BCAS1,BCAS2 Function Address Strobe Column Address Strobe Power(+5V) Name Function Ground Connection
URL:www.hbe.co.kr REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.
HMD4M144D9WG
ASSIGNMENT
Symbol DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ10 DQ46 DQ11 DQ47 DQ12 DQ48 DQ13 DQ49 Symbol DQ14 DQ50 DQ15 DQ51 DQ16 DQ52 DQ17 DQ53 DQ18 DQ54 DQ19 DQ55 DQ20 DQ56 DQ21 DQ57 DQ22 DQ58 DQ23 DQ59 DQ24 DQ60 DQ25 DQ61 DQ26 DQ62 DQ27 DQ63 DQ28 DQ64 Symbol DQ29 DQ65 DQ30 DQ66 DQ31 DQ67 DQ32 DQ68 DQ33 DQ69 DQ34 DQ70 DQ35 DQ71 /BCAS1 /BCAS2 /BRAS Symbol BA10 BA11 /BWE DQ72 DQ108 DQ73 DQ109 DQ74 DQ110 DQ75 DQ111 DQ76 DQ112 DQ77 DQ113 DQ78 DQ114 DQ79 DQ115 Symbol DQ80 DQ116 DQ81 DQ117 DQ82 DQ118 DQ83 DQ119 DQ84 DQ120 DQ85 DQ121 DQ86 DQ122 DQ87 DQ123 DQ88 DQ124 DQ89 DQ125 DQ90 DQ126 DQ91 DQ127 DQ92 DQ128 DQ93 DQ129 Symbol DQ94 DQ130 DQ95 DQ131 DQ96 DQ132 DQ97 DQ133 DQ98 DQ134 DQ99 DQ135 DQ100 DQ136 DQ101 DQ137 DQ102 DQ138 DQ103 DQ139 DQ104 DQ140 DQ105 DQ141 DQ106 DQ142 DQ107 DQ143
200PIN DIMM VIEW
URL:www.hbe.co.kr REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.
FUNCTIONAL BLOCK DIAGRAM
DQ0-15 A0-A11
HMD4M144D9WG
/CAS2 /RAS
/CAS /RAS
DQ0-DQ15
/CAS /RAS
DQ16-32 A0-A11 DQ16-DQ31
/CAS /RAS
DQ32-47 A0-A11 DQ32-DQ47
/CAS /RAS
DQ48-63 A0-A11 DQ48-DQ63
/CAS1 /CAS2 /RAS
DQ63-79 A0-A11 DQ64-DQ79
/CAS1
/CAS /RAS
DQ80-95 A0-A11 DQ80-DQ95
/CAS /RAS
DQ96-111 A0-A11 DQ96-DQ111
/CAS /RAS
DQ112-127 A0-A11 DQ112-DQ127
/CAS /RAS A0-A11
DQ128-143 A0-A11
DQ128-DQ143
0.1uF 4.7uF Capacitor each DRAM
URL:www.hbe.co.kr REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.
HMD4M144D9WG
/RAS /CAS1 /CAS2
74FCT162244
/BRAS /BCAS1 /BCAS2 /BWE
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage Relative Voltage Supply Relative Power Dissipation Storage Temperature SYMBOL ,OUT TSTG RATING 7.0V 7.0V -55oC 150oC
Short Circuit Output Current 50mA Permanent device damage occur Absolute Maximum Ratings" exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Voltage reference VSS, TA=0 PARAMETER Supply Voltage Ground Input High Voltage Input Voltage SYMBOL -1.0 TYP. Vcc+1 UNIT
OPERATING CHARACTERISTICS
SYMBOL ICC1 SPEED ICC2 ICC3 Don't care ICC4 ICC5 ICC6 Don't care
URL:www.hbe.co.kr REV.1.0.(August.2002)
UNITS
HANBit Electronics Co.,Ltd.
Il(L) IO(L)
HMD4M144D9WG
ICC1 Operating Current (/RAS /CAS Address cycling RC=min.) ICC2 Standby Current (/RAS=/CAS=VIH ICC3 /RAS Only Refresh Current /CAS=V /RAS, Address cycling @tRC=min ICC4 Fast Page Mode Current (/RAS=VIL, /CAS, Address cycling @tPC=min ICC5 Standby Current (/RAS=/CAS=Vcc-0.2V ICC6 /CAS-Before-/RAS Refresh Current (/RAS /CAS cycling RC=min Input Leakage Current (Any input 6.5V, other pins under test Output Leakage Current (Data disabled, VOUT 5.5V Output High Voltage Level (IOH= -5mA Output Voltage Level (IOL 4.2mA NOTE: ICC1, ICC3, ICC4 ICC6 dependent output loading cycle rates. Specified values obtained with output open. specified average current. ICC1 ICC3, address changed maximum once while /RAS=VIL. ICC4, address changed maximum once within page mode cycle.
CAPACITANCE
TA=25 SYMBOL CIN1 CIN3 CIN4 CDQ1
DESCRIPTION Input Capacitance (A0-A11) Input Capacitance (/WE) Input Capacitance (/RAS0) Input Capacitance (/CAS1-/CAS2) Input/Output Capacitance (DQ0-31)
UNITS
CHARACTERISTICS
70oC 5V±10%, notes 1,2.) UNIT SYMBOL
STANDARD OPERATION
Random read write cycle time Access time from /RAS Access time from /CAS Access time from column address /CAS output Low-Z Output buffer turn-off delay Transition time (rise fall)
tRAC tCAC tCLZ tOFF
URL:www.hbe.co.kr REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.
/RAS precharge time /RAS pulse width /RAS hold time /CAS hold time /CAS pulse width /RAS /CAS delay time /RAS column address delay time /CAS /RAS precharge time address set-up time address hold time Column address set-up time Column address hold time Column address hold referenced /RAS Column Address /RAS lead time Read command set-up time Read command hold referenced /CAS Read command hold referenced /RAS Write command hold time Write command hold referenced /RAS Write command pulse width Write command /RAS lead time Write command /CAS lead time Data-in set-up time Data-in hold time Data-in hold referenced /RAS Refresh period Write command set-up time /CAS setup time (C-B-R refresh) tRAS tRSH tCSH tCAS tRCD tRAD tCRP tASR tRAH tASC tCAH tRAL tRCS tRCH tRRH tWCH tWCR tRWL tCWL tDHR tREF tWCS tCSR
HMD4M144D9WG
URL:www.hbe.co.kr REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.
/CAS hold time (C-B-R refresh) /RAS precharge /CAS hold time Access time from /CAS precharge Fast page mode cycle time /CAS precharge time (Fast page) /RAS pulse width (Fast page /RAS precharge time (C-B-R refresh) /RAS hold time (C-B-R refresh) /CAS precharge(C-B-R counter test) NOTES tCHR tRPC tCPA tRASP tWRP tWRH tCPT
HMD4M144D9WG
100K 100K
1.An initial pause 200µs required after power-up followed /RAS-only /CAS-before-/RAS refresh cycles
before proper device operation achieved.
2.VIH (min) (max) reference levels measuring timing input signals. Transition times measured between
VIH(min) VIL(max) assumed inputs.
3.Measured with load equivalent 2TTL loads 100pF 4.Operation within tRCD(max) limit insures that tRAC(max) met. tRCD(max) specified reference point only. tRCD
greater than specified tRCD(max) limit, then access time controlled exclusively CAC.
5.Assumes that tRCD tRCD(max)
tAR, tWCR, tDHR referenced tRAD(max) 7.This parameter defines time which output achieves open circuit condition referenced VOL. tWCS, tRWD, tCWD tAWD restrictive operating parameter. They included data sheet electrical characteristic only. tWCS(min) cycle early write cycle data will remain high impedance duration cycle. Either tRCH tRRH must satisfied read cycle. These parameters referenced leading edge early write cycles leading edge readwrite cycles. Operation within tRAD(max) limit insures that tRAC(max) met. tRAD(max) specified reference point only. tRAD greater than specified tRAD(max) limit. then access time controlled tAA.
URL:www.hbe.co.kr REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.
PACKAGING INFORMATION
HMD4M144D9WG
143.60 136.70 3.45 R1.57 R3.18±051
18.52mm 6.45 2.05 6.39mm 6.35 130.81 R1.57±10
10.25
7.68mm
0.25
2.54
Gold 1.04±0.10 1.27 Solder:0.914±0.10mm 1.29±0.08
ORDERING INFORMATION
Part Number Density Org. Package Component Number MODE SPEED
HMD4M144D9WG-5 HMD4M144D9WG-6
64MByte 64MByte
Pin-DMM Pin-DIMM
50ns 60ns
URL:www.hbe.co.kr REV.1.0.(August.2002)
HANBit Electronics Co.,Ltd.

64Mbyte(4Mx144) 200-pin Mode Ref. DIMM Design Part HMD4M144D9WG GENERA

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