128Mbyte (32Mx32) 72-pin Fast Page Mode Ref. SIMM Design Part HMD32M32

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128Mbyte (32Mx32) 72-pin Fast Page Mode Ref. SIMM Design Part HMD32M32

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HMD32M32M16G
128Mbyte (32Mx32) 72-pin Fast Page Mode Ref. SIMM Design Part HMD32M32M16G
HMD32M32M16G 32bit dynamic high-density memory module. module consists sixteen CMOS 4bit DRAMs 32-pin TSOPII packages mounted 72-pin, double-sided, FR-4-printed circuit board. 0.1uF decoupling capacitor mounted printed circuit board each DRAM components. module Single In-line Memory Module with edge connections intended mounting 72-pin edge connector sockets. module components powered from single power supply inputs outputs TTL-compatible.
FEATURES
wPart Identification HMD32M32M16G- Cycles/64ms Ref. Gold Access times 60ns High-density 128MByte design Single ±0.5V power supply JEDEC standard pinout Fast Page mode operation compatible inputs outputs FR4-PCB design
ASSIGNMENT
SYMBOL SYMBOL DQ22 DQ23 /RAS3 /RAS2 /CAS0 /CAS2 /CAS3 /CAS1 /RAS0 /RAS1 SYMBOL DQ24 DQ25 DQ10 DQ26 DQ11 DQ27 DQ12 DQ28 DQ29 DQ13 DQ30 DQ14 DQ31 DQ15
DQ16 DQ17 DQ18 DQ19 DQ20 DQ21
OPTIONS
Timing 50ns access 60ns access Packages 72-pin SIMM
MARKING
90ns 110ns
PERFORMANCE RANGE
SPEED tRAC 50ns 60ns tCAC 13ns 15ns
PRESENCE DETECT PINS
50ns 60ns
SIMM VIEW
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
FUNCTIONAL BLOCK DIAGRAM
/CAS0 /RAS0 /CAS /RAS DQ4-DQ7 DQ0-DQ3
HMD32M32M16G
/CAS /RAS A0-A11
/CAS0 /RAS1
-A11
/CAS /RAS
-A11
/CAS /RAS -A11
/CAS1
/CAS /RAS
-A11
DQ8-DQ11
/CAS /RAS -A11
/CAS1
DQ12-DQ15 /CAS /RAS
-A11
DQ16-DQ19
/CAS /RAS -A11
/CAS2 /RAS2
/CAS /RAS
-A11
DQ20-DQ23
/CAS /RAS -A11
/CAS2 /RAS3
/CAS /RAS
-A11
DQ24-DQ27
/CAS /RAS -A11
/CAS3
/CAS /RAS
-A11
DQ28-DQ31
/CAS /RAS -A11
/CAS3
/CAS /RAS A0-A11
-A11
/CAS /RAS -A11
0.1uF Capacitor each DRAM
DRAMs
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage Relative Voltage Supply Relative Power Dissipation Storage Temperature SYMBOL ,OUT TSTG
HMD32M32M16G
RATING 7.0V 7.0V -55oC 150oC
Short Circuit Output Current 50mA Permanent device damage occur Absolute Maximum Ratings" exceeded. Functional operation should restricted conditions detailed operational sections this data sheet. Exposure absolute maximum rating conditions extended periods affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Voltage reference VSS, TA=0 PARAMETER Supply Voltage Ground Input High Voltage Input Voltage SYMBOL -1.0 TYP. Vcc+1 UNIT
OPERATING CHARACTERISTICS
SYMBOL ICC1 ICC2 ICC3 ICC4 ICC5 ICC6 Il(L) IO(L) ICC1 Operating Current (/RAS /CAS Address cycling @tRC=min.) ICC2 Standby Current /RAS=/CAS=VIH ICC3 /RAS Only Refresh Current /CAS=V /RAS, Address cycling @tRC=min
URL:www.hbe.co.kr REV.1.0 (August.2002) -3HANBit Electronics Co.,Ltd.
SPEED
1920 1760 1920 1760 1120 1920 1760
UNITS
Don't care
Don't care
ICC4 Fast Page Mode Current (/RAS=VIL, /CAS, Address cycling @tPC=min ICC5 Standby Current (/RAS=/CAS=Vcc-0.2V ICC6 /CAS-Before-/RAS Refresh Current (/RAS /CAS cycling RC=min Input Leakage Current (Any input 6.5V, other pins under test Output Leakage Current (Data disabled, VOUT 5.5V Output High Voltage Level (IOH= -5mA Output Voltage Level (IOL 4.2mA
HMD32M32M16G
NOTE: ICC1, ICC3, ICC4 ICC6 dependent output loading cycle rates. Specified values obtained with output open. specified average current. ICC1 ICC3, address changed maximum once while /RAS=VIL. ICC4, address changed maximum once within page mode cycle.
CAPACITANCE
TA=25 SYMBOL CIN1 CIN3 CIN4 CDQ1
DESCRIPTION Input Capacitance (A0-A11) Input Capacitance (/W) Input Capacitance (/RAS0) Input Capacitance (/CAS0-/CAS3) Input/Output Capacitance (DQ0-31)
UNITS
CHARACTERISTICS
PARAMETER Random read write cycle time Access time from /RAS Access time from /CAS Access time from column address /CAS output Low-Z Output buffer turn-off delay Transition time (rise fall) /RAS precharge time /RAS pulse width /RAS hold time /CAS hold time /CAS pulse width /RAS /CAS delay time
70oC 5V±10%, notes 1,2.) SYMBOL tRAC tCAC tCLZ tOFF tRAS tRSH tCSH tCAS tRCD tRAD tCRP tASR
UNIT
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/RAS column address delay time /CAS /RAS precharge time address set-up time
URL:www.hbe.co.kr REV.1.0 (August.2002)
address hold time Column address set-up time Column Address /RAS lead time Read command set-up time Read command hold referenced /CAS Read command hold referenced /RAS Write command hold time Write command hold referenced /RAS Write command pulse width Write command /RAS lead time Write command /CAS lead time Data-in set-up time Data-in hold time Refresh period Write command set-up time /CAS setup time (C-B-R refresh) /CAS hold time (C-B-R refresh) /RAS precharge /CAS hold time NOTES tRAH tASC tRAL tRCS tRCH tRRH tWCH tWCR tRWL tCWL tREF tWCS tCSR tCHR tRPC
HMD32M32M16G
1.An initial pause 200µs required after power-up followed /RAS-only /CAS-before-/RAS refresh cycles
before proper device operation achieved.
2.VIH (min) (max) reference levels measuring timing input signals. Transition times measured between
VIH(min) VIL(max) assumed inputs.
3.Measured with load equivalent 2TTL loads 100pF 4.Operation within tRCD(max) limit insures that tRAC(max) met. tRCD(max) specified reference point only. tRCD
greater than specified tRCD(max) limit, then access time controlled exclusively CAC.
5.Assumes that tRCD tRCD(max)
tAR, tWCR, tDHR referenced tRAD(max) 7.This parameter defines time which output achieves open circuit condition referenced VOL. tWCS, tRWD, tCWD tAWD restrictive operating parameter. They included data sheet electrical characteristic only. tWCS(min) cycle early write cycle data will remain high impedance duration cycle. Either tRCH tRRH must satisfied read cycle. These parameters referenced /CAS leading edge early write cycles leading edge readwrite cycles. Operation within tRAD(max) limit insures that tRAC(max) met. tRAD(max) specified reference point only. tRAD greater than specified tRAD(max) limit. then access time controlled tAA.
CHARACTERISTICS
URL:www.hbe.co.kr REV.1.0 (August.2002)
70oC 5V±10%)
-5HANBit Electronics Co.,Ltd.
PARAMETER Hyper page mode cycle time /CAS precharge time (Hyper page cycle) /RAS pulse width (Hyper page cycle) /RAS hold time from /CAS precharge precharge time (C-B-R refresh) hold time (C-B-R refresh) Output data hold time Output buffer turn delay from /RAS Output buffer turn delay from data delay puls width NOTES SYMBOL tHPC tRASP tRHCP tWRP tWRH tDOH tREZ tWEZ tWED tWPE 200K
HMD32M32M16G
UNIT 200K
NOTE
6,12
initial pause 200us required after power-up followed /RAS-only /CAS-before-/RAS refresh cycles before proper device operation achieved. Input voltage levels Vih/Vil. VIH(min) VIL(max) reference levels measuring timing input signals. Transition times measured between VIH(min) VIL(max) assumed inputs. Measured with load equivalent loads 100pF. Operation within tRCD(max) limit insures that tRAC(max) met. tRCD(max) specified reference point only. tRCD greater than specified tRCD(max) limit, then access time controlled exclusively tCAC. Assumes that tRCD tRCD(max). This parameter defines time which output achieves open circuit referenced VOL. tWCS non-restrictive operating parameter. included data sheet electrical characteristics only. tWCS tWCS(min), cycle early write cycle data will remain high impedance duration cycle. Either tRCH tRRH must satisfied read cycle. These parameters referenced /CAS leading edge early write cycles. Operation within tRAD(max) limit insures that tRAC(max) met. tRAD(max) specified reference point only. tRAD greater than specified tRAD(max) limit access time controlled tAA. tASC 6ns, Assume T=2.0ns. /RAS goes high before /CAS high going, open circuit condition output achieved /CAS high going. /CAS goes high before /RAS high going open circuit condition output achieved /RAS going.
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.
PACKAGING INFORMATION
HMD32M32M16G
2.54 0.25
Gold: 1.04±0.10 1.27 Solder: 0.914±0.10
1.27±0.08mm
(Solder Gold Plating)
ORDERING INFORMATION
Part Number Density Org. Package Component Number 16EA 16EA MODE SPEED
HMD32M32M16G-5 HMD32M32M16G-6
128Byte 128Byte
Pin-SIMM Pin-SIMM
50ns 60ns
URL:www.hbe.co.kr REV.1.0 (August.2002)
HANBit Electronics Co.,Ltd.

128Mbyte (32Mx32) 72-pin Fast Page Mode Ref. SIMM Design Part HMD32M32

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