CONTROLLER HVL3224QE CONTROLLER May/30//2003 HYVIX

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CONTROLLER HVL3224QE CONTROLLER May/30//2003 HYVIX

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HVL3224QE
CONTROLLER
HVL3224QE CONTROLLER
May/30//2003
HYVIX
HVL3224QE
CONTROLLER
GENERAL DESCRIPTION
HYVIX-MAIN-R003, color-graphics TQFP controller board displays 320-by-240 graphics colors. 16-bit high-speed interface external highspeed SRAM write function enable efficient data transfers high-speed rewriting data graphics RAM. feature this product less afterimage than product possible mode programming (pixel mode, block mode). HVL3224QE suitable midsized product, such PDA, digital camera, DVD/VCD player.
FEATURES
HVL3224QE following features: color bitmap STN-LCD display controller (5:6:5) format Less afterimage than product display area (Horizontal lines Vertical lines) panel interface(frame, line, data bits, clock(latch pulse), dispoff, bias) External frame memory interface (SRAM) Moving picture general color panel size support within size Color inverting Display On/Off Flexible display resolution Display data writing start line column address Pixel write block write Bias selection Logic supply (3.3V) C-MOS silicon process current consumption Package (100 TQFP) frames interface
HYVIX
HVL3224QE
CONTROLLER
ASSIGNMENT TQFP
SA12
LVDD
LVDD
SD12
SD10
SD11
SD13
SD14
SD15
SA10
SA11
LVDD XCLK LVDD PLLTEST BYPASS DATA15 DATA14 CLOCK RESET TSTEN CHGO HVDD HVDD LVDD LVDD ADD3 ADD2 DATA13 ADD1 ADD0
SA13 SA14 SA15 SA16 SA17
HIVIX
HVL65K100XA
DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 LVDD DATA8 DATA9 DATA10 DATA11 DATA12 LVDD
HYVIX
HVL3224QE
CONTROLLER
DEMENSION
HYVIX
HVL3224QE
CONTROLLER
DESCRIPTION
Signals TEST HVDD HVDD CHGO BYPASS TSTEN CLOCK RESET LVDD ADD3 ADD2 ADD1 ADD0 LVDD DATA15 DATA14 DATA13 LVDD DATA12 DATA11 DATA10 DATA9 DATA8 LVDD DATA7 DATA6 DATA5 DATA4 INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT INPUT 3.3V 3.3V 3.3V 3.3V External Data port Power Supply logic circuits(3.3V) External Data port Common Ground Power Supply logic circuits(3.3V) External Data port Power Supply logic circuits(3.3V) External Interface Address Input port INPUT INPUT Connected 3.3V 3.3V Functions Test Test Common Ground Power Supply logic circuits(3.3V) Common Ground Power Supply logic circuits(3.3V) Test Common Ground Test Chip Debugging Chip Debugging Main Clock Chip Reset External Interface Chip select, Active Power Supply logic circuits(3.3V) Chip Write Signal
HYVIX
HVL3224QE
CONTROLLER
DATA3 DATA2 DATA1 DATA0 SA17 SA16 SA15 SA14 SA13 LVDD SA12 SA11 SA10 LVDD SD15 SD14 SD13 SD12 SD11 SD10
INPUT INPUT INPUT INPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT
EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM 3.3V EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM 3.3V EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM SRAM Data port
Power Supply logic circuits(3.3V)
External Data port
Common Ground SRAM Chip Enable, Active SRAM Output Enable, Active SRAM Write Enable, Active
SRAM Address Output port
Common Ground
Power Supply logic circuits(3.3V)
SRAM Address Output port
Common Ground
SRAM Address Output port
HYVIX
HVL3224QE
CONTROLLER
LVDD XCLK LVDD
OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT
EXT. SRAM 3.3V EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM EXT. SRAM 3.3V
SRAM Data port Common Ground
Power Supply logic circuits(3.3V)
SRAM Data port
Common Ground Bias Signal Synchronous Signal driving scanning line Data Signal Latch Clock Data Signal Shift Clock
Power Supply logic circuits(3.3V)
Display Data Output port
Common Ground
HYVIX
HVL3224QE
CONTROLLER
CROSS REFERENCE NUMERICAL ORDER NUMBER
NAME NAME NAME NAME PLLTEST MVDD AVDD CHGO LPVSS BYPASS TSTEN CLOCK RESET ADD3 ADD2 ADD1 ADD0 VCCIO DATA15 DATA14 DATA13 VCCINT DATA12 DATA11 DATA10 DATA9 DATA8 VCCIO DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 SA17 SA16 SA15 SA14 SA13 VCCINT SA12 SA11 SA10 VCCIO SD15 SD14 SD13 SD12 SD11 SD10 VCCINT XCLK VCCIO
HYVIX
HVL3224QE
CONTROLLER
FUNCTIONAL DESCRIPTION
HVL3224QE receives image pixel data from interface (like camera Microprocessor) saves SRAM. After that HVL3224QE brings pixel data order makes through unique data conversion algorithm changes proper color data through table, then transmitted color with address.
Read Operation
Read Waveform
Address tRLZ tACE Data tCLZ Data Valid tCHZ tRHZ
Read Cycle Parameter Read cycle time Address access time Chip select (CS) access time Output enable (RD) access time Output hold from address change output High output high output High output high Symbol tACE tCLZ tCHZ tRLZ tRHZ Unit
HYVIX
HVL3224QE
CONTROLLER
Write Operation
Write Waveform
Address
Data Data Data undefined High Data Valid
Write Cycle Parameter Write cycle time Chip enable (CS) write Address setup write Address setup time Write pulse width (RD=high) Write recovery time Address hold from write Data valid write Data hold time Write enable output High-Z Output active from write Symbol tWP1 Unit
HYVIX
HVL3224QE
CONTROLLER
Interface Example
HIROSE HIF3F-40PA 3.3V 3.3V XCLK
Insert resistance each signal line connect Driver thick short signal line each signal thick wide line
Step-Up Circuit (LCD Power)
INVERTER
Back Light
Interface Timing Chart
XCLK
944~951 952~959 8~15
DATA
944~951 952~959
8~15
(Reduction)
(Reduction)
HYVIX
HVL3224QE
CONTROLLER
CONTROL REGISTER DESCRIPTION
Addr 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09
0x0A 0x0B 0x0C 0x0D 0x0E 0x0F
Table Decoder Registers
generator function enable Software Reset color turned over color won't changed Doff Screen M7~M0 Configuration XL8~XL0 Point color horizontal resolution YL8~YL0 Point color vertical resolution X0~8 Column Data address main frame memory Y0~8 Data address main frame memory (default) R4~R0, G5~G0, B4~B0 display data (5:6:5)bit
HYVIX
HVL3224QE
CONTROLLER
ABSOLUTE MAXIMUM RATINGS
Item Power Supply Voltage Input Voltage Output Voltage Output Current/Pin Storage Temperature Symbol IOUT TSTG Limits -0.3 -0.3 -0.3
Unit
Possibles from -0.3V 7.0V channel open drain bi-directional buffers, input buffer systems Fail Safe cells.
RECOMMENDED OPERATING CONDITIONS
Item Power Supply Voltage Input Voltage Ambient Temperature Normal Input Rising Time Normal Input Falling Time Schmitt Input Rising Time Schmitt Input Falling Time
Symbol
Min. 3.00
Typ. 3.30
Max. 3.60
Unit
85*3
Possible 5.25 5.50V channel open drain bi-directional buffers, input buffer systems Fail Safe cells. ambient temperature range recommended 80°C ambient temperature range recommented 125°C
HYVIX
HVL3224QE
CONTROLLER
ELECTRICAL CHARACTERISTICS
(VDD 3.3V 0.3V, 85°C)
Item Quiescent Current*1 Input Leakage Current State Leakage Current High Level Output Voltage Symbol IDDS IOH=-0.1mA(Type -1mA(Type -2mA(Type -6mA(Type -12mA(Type VDD=Min. IOL=0.1mA(Type 1mA(Type 2mA(Type 6mA(Type 12mA(Type VDD=Min. LVTTL Level, VDD=Max. LVTTL Level, VDD=Min. LVTTL Schmitt LVTTL Schmitt LVTTL Schmitt Level, VDD=Max. Level, VDD=Min. Response VOH=0.90V, VDD=Min. VOL=2.52V, VDD=Max. Response VOH=1.80V, VDD=Min. VOL=0.65V, VDD=Max. Type Pull Resistor
Conditions Quiescent Conditions
Min. -0.4
Typ. Max. Unit
Level Output Voltage High Level Input Voltage Level Input Voltage Positive Trigger Voltage Negative Trigger Voltage Hysteresis Voltage High Level Input Voltage*3 Level Input Voltage
VIH1 VIL1 VT1+ VT1VH1 VIH3 VIL3 IOH3
-115
High Level Output Current*3
Level Output Current*3
IOL3
Type Type
Pull Down Resistor*2
Type Hold Response, VIN=2.0V VDD=Min. Hold Response, VIN=0.8V VDD=Min. Hold Response, VIN=0.8V VDD=Max. Hold Response, VIN=2.0V VDD=Max. =1MHz, VDD=0V =1MHz, VDD=0V =1MHz, VDD=0V
(100) (200) (100) (200)
High Level Maintenance Current Level Maintenance Current High Level Reversal Current Level Reversal Current Input Terminal Capacitance Output Terminal Capacitance Input/Output Terminal Capacitance
IBHH IBHL IBHHO IBHLO
-350
quiescent current typical value (Tj=85°C) each master. details, please Tables 1-10. values parenthesized means case Ta=0 70°C. Values doubled VDD=3.3V±-0.3V, VSS=0V, Ta=-40°C 85°C. Complies with Rev. standard.
HYVIX
HVL3224QE
CONTROLLER
TYPICAL APPLICATION PART LIST
Reference C10, C11, C13, D1,D2 100uF GREEN (LED) HEADER 20X2 JUMPER HEADER 25X2 CON2 BEAD FERRITE HVL3224QE K6R4016V1C-T10 EZ1117-3.3V 50MHz HYVIX SAMSUNG SEMTECK Part
SCHEMATIC
HYVIX
3.3V XCLK 3.3V 3.3V PLLTEST CHGO BYPASS TSTEN CLOCK RESET ADD3 ADD2 ADD1 ADD0 CLOCK RESET ADD3 ADD2 ADD1 ADD0
I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8
SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10 HEADER 20X2 SA17 SA16 SA15 SA14 SA13 SA12 SA11 SA10
I/O9 I/O10 I/O11 I/O12 I/O13 I/O14 I/O15 I/O16
SD10 SD11 SD12 SD13 SD14 SD15
3.3V
3.3V
K6R4016V1C-T10
3.3V
DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 DATA7 DATA6 DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 HVDD HVDD 3.3V
CON2
3.3V
CLOCK
SD15 SD14 SD13 SD12 SD11 SD10
SD15 SD14 SD13 SD12 SD11 SD10
DATA0 DATA2 DATA4 DATA6 DATA8 DATA10 DATA12 DATA14 ADD0 ADD2
DATA1 DATA3 DATA5 DATA7 DATA9 DATA11 DATA13 DATA15 ADD1 ADD3
50MHz
RST1
3.3V
100uF 100uF
LVDD LVDD LVDD LVDD LVDD LVDD LVDD LVDD XCLK
XCLK
VOUT
3.3V
BEAD FERRITE 3.3V
EZ1117-3.3V
HEADER 25X2
HVL3224QE
RST2 3.3V
GREEN GREEN #610, TIC, KITI, 6FL, Suwon Univ., 2-2, Wawoo-ri, Bongdam-eub, Hwasung city, Kyungki-do, Korea Title Controller (HVL3224QE) Size Date: Document Number Monday, June 2003 Sheet
RST1 RESET RST2
JUMPER
3.3V
HYVIX Co.,
capacitors closely connected with each 3.3V power

CONTROLLER HVL3224QE CONTROLLER May/30//2003 HYVIX

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