radio Rev. August 2005 Product data sheet TEA5764UK single c
|
|
|
Top Searches for this datasheet
TEA5764UK
radio
Rev. August 2005 Product data sheet
TEA5764UK single chip electronically tuned stereo radio with Radio Data System (RDS) Radio Broadcast Data System (RBDS) demodulator RDS/RBDS decoder portable application with fully integrated selectivity demodulation. radio completely adjustment free only requires minimum small cost external components. radio tune European, Japanese bands. power consumption operate supply voltage.
Features
Chip scale package High sensitivity integrated noise input amplifier mixer conversion US/Europe (87.5 MHz) Japanese band MHz) Preset tuning receive Japanese audio Auto search tuning, raster automatic gain control circuit tuner oscillator operating with cost fixed chip inductors Fully integrated selectivity Fully integrated demodulator; external discriminator Crystal oscillator 32768 external reference frequency 32768 synthesizer tuning system counter; 7-bit output I2C-bus Level detector; 4-bit level information output I2C-bus Soft mute: signal dependent mute function Mono/stereo blend: gradual change from mono stereo, depending signal Adjustment-free stereo decoder Autonomous search tuning function Standby mode output software programmable port Fully integrated RDS/RBDS demodulator accordance with EN50067 RDS/RBDS decoder with memory data blocks provides block synchronization error correction; block data status information available I2C-bus Audio pause detector
Philips Semiconductors
TEA5764UK
radio
Interrupt flag
Applications
stereo radio
Quick reference data
Table Electrical parameters general listed parameters valid when crystal used that meets requirements stated Table input values defined potential difference, except when explicitly stated. Symbol Supplies VCCA ICCA analog supply voltage analog supply current VCCA operating mode Standby mode VCCD ICCD digital supply voltage digital supply current VCCD operating mode Standby mode Reference voltage VVREFDIG IVREFDIG General fi(FM) Tamb Vsens(EMF) input frequency ambient temperature sensitivity value voltage MHz; 22.5 kHz; fmod kHz; (S+N)/N TCdeem A-weighting filter; Baud kHz; kHz; ftune MHz; RFagc MHz; MHz; ftune MHz; RFagc ftune high-side; +200 low-side; -200 VVAFL left audio output voltage VAFL 22.5 kHz; fmod kHz; pre-emphasis; TCdeem
Parameter
Conditions
1.65
13.7
22.5 VCCD
Unit
digital reference voltage I2C-bus interface digital reference supply current operating mode; VVREFDIG 1.65 VCCD
overall system parameters
IP3in
in-band 3rd-order intercept point out-of-band 3rd-order intercept point selectivity
dBµV
IP3out
dBµV
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Table Electrical parameters general listed parameters valid when crystal used that meets requirements stated Table input values defined potential difference, except when explicitly stated. Symbol VVAFR Parameter right audio output voltage VAFR Conditions 22.5 kHz; fmod kHz; pre-emphasis; TCdeem 22.5 kHz; fmod kHz; de-emphasis kHz; A-weighting filter 67.5 kHz; fmod kHz; fpilot 6.75 kHz; de-emphasis kHz; A-weighting filter increasing input level kHz; fmod kHz; Baud kHz; A-weighting filter; mono; pilot deviation 22.5 kHz; kHz; SYM1 SYM0 average over 2000 blocks; block quality rate fRDS Unit
(S+N)/N(m) maximum signal-to-noise ratio, mono
(S+N)/N(s)
maximum signal-to-noise ratio, stereo
channel separation
total harmonic distortion
Vsens
sensitivity value
Low-side high-side selectivity measured changing mixer injection from high-side low-side.
Ordering information
Table Ordering information Package Name TEA5764UK WLB34 Description wafer-level ball grid array; balls; 0.36 Version TEA5764UK Type number
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxx xxxxx
Product data sheet Rev. August 2005
Koninklijke Philips Electronics N.V. 2005. rights reserved. TEA5764UK_2
Block diagram
Philips Semiconductors
GNDA FREQIN XTAL
GNDD
MPXIN
MPXOUT VAFL
VAFR TMUTE
INTCON1
CRYSTAL OSCILLATOR
VCCA
GAIN STABILIZER
TEA5764UK
FILTER SOFT MUTE
FILTER
LIMITER
DEMODULATOR
RDS/RBDS DECODER
INTX
antenna
LEVEL MIXER CENTER FREQUENCY ADJUST
COUNT DECODER Iref PAUSE DETECTOR
INTERFACE REGISTER GNDD INTCON2
RFIN1 RFIN2 GNDRF CAGC
CD2/INTCON3 mono pilot prog. ref. TUNING SYSTEM I2C-BUS INTERFACE
VCCD
GNDD GNDD
LOOPSW
PORT PILLP SWPORT BUSENABLE VREFDIG
CPOUT
001aab458
TEA5764UK
radio
Block diagram
Philips Semiconductors
TEA5764UK
radio
Pinning information
Pinning
ball index area
001aac987
TEA5764UK
Transparent view
Ball configuration TEA5764UK
description
Table Symbol LOOPSW CPOUT PILLP SWPORT BUSENABLE VREFDIG n.c. GNDD GNDD VCCD CD2/INTCON3 n.c. INTCON2 GNDD INTX n.c. INTCON1
TEA5764UK_2
description Ball Description synthesizer loop filter switch output charge pump output synthesizer local oscillator coil connection local oscillator coil connection supply decoupling capacitor pilot loop filter software programmable port output I2C-bus enable input digital reference voltage I2C-bus signals I2C-bus clock line input I2C-bus data line input output connected digital ground digital ground digital supply voltage internally connected connected internally connected; leave open digital ground interrupt flag output connected internally connected; leave open
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
description .continued Ball Description soft mute time-constant capacitor right audio output left audio output demodulator output decoder decoder input digital ground; this internal pull-down resistor ground connected analog ground connected 32.768 reference frequency input crystal oscillator input analog supply voltage VCCA decoupling capacitor input input ground time-constant capacitor connected
Table Symbol TMUTE VAFR VAFL MPXOUT MPXIN GNDD n.c. GNDA n.c. FREQIN XTAL VCCA RFIN1 RFIN2 GNDRF CAGC n.c.
Functional description
noise amplifier
input impedance together with input circuit defines band filter. gain controlled circuit.
mixer
quadrature mixer converts MHz)
varactor tuned provides Local Oscillator (LO) signal quadrature mixer. frequency range MHz.
Crystal oscillator
crystal oscillator operate with 32.768 clock crystal. oscillator overridden FREFIN pin. When FREFIN used oscillator clocked externally 32.768 signal. Selection between reference clock reference crystal done I2C-bus. When crystal connected FREFIN must left open-circuit, when FREFIN used crystal connected. possible connect crystal apply frequency FREFIN same application.
TEA5764UK_2 Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
crystal oscillator generates reference frequency following:
Reference frequency divider synthesizer Timing counter Timing pause detector Free running frequency adjustment stereo decoder Centre frequency adjustment filters Clock frequency RDS/RBDS decoder
tuning system
synthesizer tuning system suitable operate with 32.768 reference frequency generated crystal oscillator reference clock 32.768 into TEA5764UK. tune radio required frequency requires word calculated then programmed register. word bits long; Table Table Calculation this 14-bit word done follows. Formula high-side injection: Formula low-side injection: where: NDEC decimal value word wanted tuning frequency (Hz) intermediate frequency fREFS reference frequency 32.768 Example receiving channel 100.1 MHz: 100.1 12246.704 32768
result found using Equation Equation must always rounded lowest integer value. rounded down lowest integer value NDEC 12246, word becomes 2FD6h. This value written register FRQSETLSB FRQSETMSB I2C-bus will then either start autonomous search this frequency preset channel this frequency. When application built according block diagram shown Figure with preferred components, will settle frequency within most accurate tuning accomplished when search followed preset same frequency.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
triggered writing bytes FRQSETMSB, FRQSETLSB, TNCTRL1, TNCTRL2, TESTBITS, TESTMODE. Accurate validation locking frequency take When lock detected, set.
Band limits
TEA5764UK switched either Japanese band US/Europe band. Setting BLIM logic band range 87.5 MHz; setting BLIM logic selects Japanese band range MHz.
wideband AGC) prevents overloading limits amount intermodulation products created strong adjacent channels. default turned I2C-bus. TEA5764UK also in-band prevent overloading wanted channel. in-band always turned
Local long distance receive
gain reduced prevent distortion when transmitter very near. gain normal receive long distance (DX) stations.
filter
fully integrated filter built-in.
8.10 demodulator
quadrature demodulator integrated resonator perform phase shift signal.
8.11 counter
received signal mixed produce kHz. result mixing counted. good count result indicates that radio tuned valid channel instead image channel with much interference. counter outputs 7-bit count result I2C-bus. counter continuously active read time I2C-bus. also activates flag when count result outside count valid result window; Section 9.1.4.4. Before tuning cycle initiated count period 15.6 IFCTC. When count period initiating tuning algorithm with preset (bit will always give update shown Section 8.22.1. case count time 15.6 tuning flowchart illustrated Figure used. Once tuned, count period always 15.6
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
8.12 Voltage level generator analog-to-digital converter
voltage level indicates field strength received antenna. voltage level analog-to-digital converted 4-bit word output I2C-bus. level continuously active read time I2C-bus. also activates flag when voltage level falls below predefined selectable threshold. LHSW allows either large small hysteresis steps chosen; Table Section 9.1.4.5. When level minimum value, search algorithm will only stop channels having level higher than, equal level After completing search algorithm being tuned station, hysteresis effective limit will This means that continuous level check will never LEVFLAG.
8.13 Mute
8.13.1 Soft mute
low-pass filtered voltage level drives soft mute attenuator input levels: audio output faded hence also noise (see graphs referenced Figure Figure 17). soft mute function also switched I2C-bus, using SMUTE.
8.13.2 Hard mute
audio outputs VAFL VAFR hard-muted byte TNCTRL2, which means that they into 3-state. This also done setting bits Left Hard Mute (LHM) Right Hard Mute (RHM) byte TESTBITS, which allows either both channels muted forces TEA5764UK mono mode. When TEA5764UK Standby mode audio outputs hard-muted.
8.13.3 Audio frequency mute
audio signal muted setting TNCTRL1 register logic soft mute attenuator audio signal blocked pins VAFL VAFR will their biasing point with signal. audio automatically muted during update shown flowchart Figure When audio must muted during Search mode, done setting logic before search action resetting logic afterwards. Setting logic stops data.
8.14 decoder
stereo decoder adjustment free. switched mono I2C-bus.
8.15 Signal dependent mono/stereo blend (stereo noise cancellation)
input level decreases, decoder blends from stereo mono limit output noise. continuous mono-to-stereo blend also programmed I2C-bus level dependent switched mono-to-stereo transition. Stereo noise cancellation switched I2C-bus SNC.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
8.16 Software programmable port
software programmable port (CMOS output) addressed I2C-bus: SWPM software port functions output FRRFLAG. SWPM software port outputs registers. Test mode software port outputs signals according Table Test mode selected, setting byte TESTMODE logic software port cannot disabled PUPD bits; Section 8.17.
8.17 Standby mode
radio into Standby mode Power-Up Power-Down (PUPD) bits. part turned separately both part turned off. TEA5764UK still accessible I2C-bus takes only power from supply, Standby mode, audio outputs hard-muted.
8.18 Power-on reset
After startup VCCA VCCD power-on reset circuit will generate reset pulse registers will their default values. power-on reset effectively generated VCCD. After power-on reset TEA5764UK Standby mode PUPD bits logic After power-on reset registers reset their default value, except byte12R byte19R flags DAVFLG, LSYNCFLG PDFLAG. reset these, part must turned setting PUPD. After setting PUPD logic will take start-up TEA5764UK these registers their default value. power supplies switched order. When supply voltage VCCA VCCD I/Os, audio outputs reference clock input high-ohmic.
8.19 RDS/RBDS
8.19.1 RDS/RBDS demodulator
fully integrated RDS/RBDS demodulator which uses reference frequency (32.678 synthesizer tuning system. demodulator recovers regenerates continuously transmitted RBDS data stream multiplex signal (MPXRDS) provides signals clock (RDCL), data (RDDA) further processing integrated decoder.
8.19.2 data clock direct
demodulator retrieves data clock signals, this data directly onto pins VAFL VAFR setting RDSCDA logic
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
8.19.2.1
RDS/RBDS decoder decoder provides block synchronization, error correction flywheel function reliable extraction RBDS block data. Different modes operation selected different application requirements. Availability data signalled DAVFLG output INTX which generates interrupt. blocks data status information available I2C-bus single transmission. behavior DAVFLG described Section
8.20 Audio pause detector
audio pause detector monitors audio modulation pauses responds levels. modulation threshold adjusted steps control bits PL[1:0]. minimum time detecting pause adjusted control bits PT[1:0] shown Table When pause occurs, flag PDFLAG logic hardware interrupt generated; Section 9.1.4.6.
8.21 Auto search Preset mode
Search mode TEA5764UK search channels automatically (see Figure
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
start
during preset mute always active search mode default muted unless AHLSI
reset flags frequency
wait settle
level true
false
LEVFLAG
true
false
AHLSI true false
false
search mode true false
search true increment current_pll
decrement current_pll
band limit true BLFLAG FRRFLAG mute BLFLAG FRRFLAG mute BLFLAG FRRFLAG mute
false
001aab461
Flowchart auto search preset
Before starting search preset, INTMSK register must reset only FRRMSK must set. This allows microprocessor interrupted only when search preset algorithm ready.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
8.21.1 Search mode
Search mode initiated setting byte FRQSETMSB logic search direction SUD; (search down), (search up). tuner starts searching frequency bytes FRQSETLSB FRQSETMSB. Search Stop Level (SSL) bits define field strength level which desired channel detected. tuner will stop channel with field strength equal higher than this reference level then checks frequency; when both valid, search stops (Note that this depends AHLSI described Figure level check IF-count fails, search continues. channels found, TEA5764UK stops searching when reached band limit, setting BLFLAG HIGH. search always stops when FRRFLAG occurrence hardware interrupt, this procedure shown Figure search algorithm stop frequency that offset from maximum kHz. maximum offset limited applying preset. optimum tuning, recommended that preset applied after search when found frequency offset that above kHz. After this interrupt TEA5764UK will update tuner registers period state TEA5764UK checked reading bytes INTFLAG, FRQCHKMSB, FRQCHKLSB, TNCTRL1 TNCTRL2. Table shows possible states these registers after auto search.
Table Tuner truth table INTX gone only IFMSK, FRRMSK BLMSK were then this cannot occur channel found during search preset; FRRMSK valid state valid channel found band limit been reached during search; BLMSK FRRMSK valid state preset search occurred wanted channel valid RSSI level fails count when AHLSI logic HLSI must toggled value must programmed; FRRMSK valid state band limit reached during search; valid channel found; BLMSK FRRMSK
IFFLAG BLFLAG FRRFLAG Comment
This table valid until 30.6 after tuning cycle completed. shows outcome flag register when read done after INTX goes condition that mask other than FRRMSK set.
8.21.2 Preset mode
preset occurs setting logic writing frequency byte FRQSETMSB. tuner jumps selected frequency sets FRRFLAG when ready. After this interrupt TEA5764UK will update tuner registers period state TEA5764UK checked reading registers: INTFLAG, FRQCHKLSB, FRQCHKMSB, TNCTRL1 TNCTRL2. Table shows possible states after preset.
TEA5764UK_2 Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
8.21.3 Auto high-side low-side injection stop switch
When channel searched preset done, reception sometimes improve when injection done other side wanted channel.
image low-side
wanted channel
image high-side
switch from high-side low-side
001aab460
Switch from high-side injection low-side injection using HLSI
TEA5764UK HLSI which toggles injection local oscillator from high-side (bit HLSI low-side (bit HLSI When HLSI toggled, setting must sent TEA5764UK. When AHLSI logic search preset algorithm will stop after channel valid RSSI level check fails count. microprocessor respond toggling HLSI switch sending value tuner.
8.21.4 Muting during search preset
During preset tuner always muted this implemented algorithm. search muted default unless AHLSI When AHLSI tuner stopped during preset search because wrong count, tuner stays muted; this allows microprocessor switch from high setting quietly wait result. tuner always muted independent search preset. search muted setting logic before search initiated resetting logic when tuner ready (only FRRMSK when initiating search preset). these mute actions done blocking audio signal inside soft mute attenuator, audio output will keep level stay low-ohmic i.e. hard mute will cause plop).
8.22 update/alternative frequency jump
channel which transmits data have alternative channels which have same information. These alternative channel frequencies data, microprocessor read alternative frequencies store them memory. tuner perform update. This very similar preset, with count time. tuner will jump alternative frequency check level count using count time. When RSSI level check above specified level count result within limits, then tuner will stay alternative frequency stay muted, microprocessor decide what alternative frequency valid will jump back frequency came from.
TEA5764UK_2 Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
algorithm will finish with FRRFLAG being interrupt generated. After this interrupt TEA5764UK will measure count period after completing jump, measurement count will start hence count result IFFLAG will updated 30.6 after completing algorithm. level measurement will start immediately after tuning algorithm, LEVFLAG will updated after algorithm. state TEA5764UK checked reading registers INTFLAG, FRQCHKLSB, FRQCHKMSB, IFCHK LEVCHK. Table shows possible states after auto search, Figure flowchart showing updated.
8.22.1 Muting during update
update jump) always muted. There possibilities leaving algorithm:
tuner jumps alternative frequency which valid (according
specified limit fixed counter limits) jumps back, then will automatically unmute.
tuner jumps valid alternative frequency stays there. does
unmute. microprocessor unmute keeps tuner muted check presence data. valid unmute apply preset current frequency count time 15.6 used preset, which gives more accurate count result than result obtained jump, where used).
Table
update truth table INTX only IFMSK, FRRMSK BLMSK were then this cannot occur alternative frequency jump successful; radio tuned alternative frequency stays muted valid state valid state valid state jump occurred wanted channel fails count; will back value valid state INTX only IFMSK, FRRMSK BLMSK were then this cannot occur
IFFLAG BLFLAG FRRFLAG Comment
This table valid until 30.6 after update completed. shows outcome flag register when read done after INTX gone condition that only mask FRRMSK set.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
start count time
activate mute store 'old' setting clear LEVFLAG clear IFFLAG frequency
wait settle
level true wait counter
false
LEVFLAG
true
false
reset 'old' setting
wait settle
FRRFLAG BLFLAG keep mute (PLL frequency)
FRRFLAG BLFLAG mute (PLL frequency)
001aab462
Flowchart update
Interrupt handling
Interrupt register
first bytes I2C-bus register contain interrupt masks interrupt flags. flag when logic
Table Symbol Table Symbol
TEA5764UK_2
INTFLAG byte0R DAVFLG TESTBIT LSYNCFLG IFFLAG LEVFLAG PDFLAG FRRFLAG BLFLAG
INTMSK byte0W byte1R DAVMSK LSYNCMSK IFMSK LEVMSK PDMSK FRRMSK BLMSK
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
interrupt flag register contains flags according behavior outlined Section 9.1.4. When these flags they also cause INTX active (hardware interrupt line) depending status corresponding mask Table logic mask register enables hardware interrupt that flag. Hence, conceivable that, with mask bits cleared, software could operate continuous polling mode that reads interrupt flag register bits that maybe set. Interrupt mask bits always cleared after reading first bytes interrupt register. This control multiple hardware interrupts (see Figure LSYNCMSK different function cleared after reading interrupt register bytes, also Section 9.1.4.3.
9.1.1 Interrupt clearing
interrupt flag mask bits always cleared after:
They have been read I2C-bus power-on reset
9.1.2 Timing
timing sequence general operation interrupts shown Figure shows read access interrupt bytes INTFLAG INTMSK subsequent (though necessarily immediate) write mask register. also indicates timing points interrupt event occurs while register being accessed (after point must held until after mask register cleared read operation (point Point after been decoded point where acknowledge been received from master after first bytes have been sent. time INTX line (tLOW) maximum value specified Section However shorter read INTMSK INTFLAG bytes occurs within tLOW.
9.1.3 Reset
reset performed time simple read interrupt bytes, byte0R byte0W, which automatically clears interrupt flags masks.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx
Product data sheet Rev. August 2005
Koninklijke Philips Electronics N.V. 2005. rights reserved. TEA5764UK_2
Philips Semiconductors
read access
INTFLAG
INTMSK
write access
INTMSK
FRQSETMSB
FRQSETLSB
data
device address
data
data
data
device address
data
data
data
interrupt event
interrupt flag
interrupt mask
INTX
001aab464
Interrupt events that occur outside region their respective flag bits normal immediately thus trigger hardware interrupt mask bits set. blocking interrupts marked region A-B1 depending actual read cycle. when only INTFLAG read stop condition received (only INTFLAG read only this will cleared). when both registers read hence cleared this terminated either acknowledge stop bit. Interrupt events that occur between their respective flags after mask bits cleared. Which means that this diagram interrupt event occurred period A-B, after flag goes logic interrupt mask bits cleared after interrupt flag mask bytes read. Software writes mask byte enables required mask bits. flags currently will then trigger hardware interrupt. INTX HIGH (inactive) after interrupt mask bytes read.
TEA5764UK
radio
I2C-bus interrupt sequence, read write operation
Philips Semiconductors
TEA5764UK
radio
9.1.4 Interrupt flags behavior
9.1.4.1 Multiple interrupt events interrupt mask register then setting interrupt flag that causes hardware interrupt (pin INTX goes LOW). event occurs again, before flag cleared, then this does trigger further hardware interrupts until that specific flag cleared. However, different events occur sequence generate sequence hardware interrupts. second interrupt generated only after INTMSK byte read, followed write first interrupt blocks input INTX one-shot generator. subsequent interrupts occur within INTX period then these cause INTX period extend beyond specified maximum period (see Section 9.2). 9.1.4.2 Data available flag DAVFLG when block data received according diagrams shown Section where different modes described. Once synchronized, this continues subsequent received blocks (dependent mode) following situations:
During sync search, mode: valid blocks correct sequence
received with (synchronized).
During synchronization search DAVB mode valid A(C')-block been
detected. This mode used fast search tuning (detection comparison code contained block.
pre-processor synchronized mode DAVA DAVB block
been processed. This mode standard data processing mode decoder synchronized.
pre-processor synchronized DAVC mode, blocks have been
processed.
decoder synchronized mode, with LSYNCMSK loss
synchronization detected (flywheel loss synchronization, resulting restart synchronization search). DAVFLG reset read RDSLBLSB (byte15R) RDSPBLSB (byte17R). interrupt asserted each time block data decoded when DAVMSK set; details Section 9.1.4.3 synchronization flag SYNC, Table shows status decoder. logic then decoder synchronized, logic not. action TEA5764UK depends status LSYNCMSK Table this then loss synchronization causes LSYNCFL logic when synchronization lost, hardware interrupt asserted. part TEA5764UK idle waits microprocessor initiate synchronization search setting NWSY described Table
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
LSYNCMSK synchronization lost, ASIC automatically starts synchronization search. will generate hardware interrupt. microprocessor wait until decoder synchronized again, this will indicated DAVFLG SYNC status (this requires DAVMSK being set). LSYNCFL reset read INTMSK byte1R. LSYNCMSK reset read byte INTMSK, must reset microprocessor. Resetting automatically would change status ASIC cause automatic synchronization search described above. synchronization defined explained brief Section 9.1.4.4 frequency flag During automatic frequency search, preset update, part TEA5764UK performs check received frequency measure level interference channel received. incorrect frequency received, indicates presence either strong interferers tuning image which sets IFFLAG INTFLAG register. Also preset channel with signal will result wrong count value hence setting IFFLAG. When search, preset update finished, FRRFLAG will indicate this will generate interrupt. microprocessor read outcome registers which will contain count value IFFLAG status channel tuned case update, count value alternative frequency will registers also when jumps back, because will then start count. after tuning algorithm completed counter will start count. 30.6 after failed update count result will equal again that channel from where jump initiated. after FRRFLAG been counter will start continuously tuned frequency conditions correct frequency then this sets IFFLAG interrupt register. When IFMSK this will also cause interrupt. IFFLAG cleared read byte1R, starting tuning algorithm. 9.1.4.5 RSSI threshold flag voltage level reflects field strength received antenna. voltage level analog digital converted 4-bit value output I2C-bus, this 4-bit level value compared threshold level bits Table bits Table level (which converts analog value digital) triggered convert either ways: During tuning step, search, preset update, triggered these algorithms compares level with threshold bits SSL[1:0]. LEVFLAG RSSI level drops below threshold level bits SSL[1:0] (see Table 19). hardware interrupt only generated corresponding mask set.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
After search, preset update, threshold comparison switched hysteresis level. hysteresis level combination bits SSL[1:0] LHSW; Table result hysteresis shown Table Then level starts automatically compares level every with hysteresis level. LEVFLAG RSSI level drops below threshold level bits SSL[1:0] combination with LHSW (see Table 26); hardware interrupt only generated corresponding mask set. LHSW allows either small large hysteresis selected which results levels left RSSI hysteresis threshold column LHSW right RSSI hysteresis threshold column; Table When search preset done with level then when algorithm finished, threshold level Hence LEVFLAG will never set. LEVFLAG cleared read INTMSK byte1R, starting tuning algorithm. 9.1.4.6 Pause detection flag pause detector monitors amplitude audio signal starts counting drops below reference level. When counter reaches specified count time, pause detected PDFLAG will generate interrupt PDMSK logic PDFLAG operates independently PDMSK only active when decoder switched when PUPD logic when decoder idle synchronization lost. Figure When peak audio level (L+R) drops below threshold level counts duration pause. pause lasts longer than value bits, PDFLAG which turn generates hardware interrupt (bit PDMSK logic threshold level bits shown Table PDFLAG cleared read byte1R condition that read action occurs more than after receiving pause interrupt INTX line. circuit should ignore short transients where audio level momentarily rises above threshold t2). pause detected comparing amplitude audio signal with reference level selected bits. resultant signal PSCO produced this comparison sampled frequency 2341 resulting signal PSCOn. pause detected under conditions given Equation Equation 0toN PSCOn 0toN PSCOn 2341 pause audio
where number samples taken over time pause time selected bits When pause detected, integrator will reset. integrator value cannot less than zero; therefore Equation value second becomes larger than first SUM, output integrator remains zero. Suppose that tpause taudio pause detector will count according Equation shown Equation pause audio
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Equation pause detector measured `pause', pause' pause. Therefore average pause detector measured pause time hence pause will detected. PSCOn signal goes directly software port. PDFLAG integrator goes bus. interrupt line triggered PDFLAG.
reference level "PL" [mV] audio signal reference level "PL" pause PSCO pause
audio
integrator output
2341
tpause PSCOn taudio tpause
audio present
audio present PDFLAG
001aac795
tnp(min) reference level defined kHz, internally transformed e.g. 22.5 actual PSCO signal behaves shown diagram, bottom diagram assumed that samples taken peaks audio signal resulting PSCOn.
Operation timing pause detection according levels Table
9.1.4.7
Frequency ready flag frequency ready flag logic when automatic tuning finished search, preset update. This described Table Table FRRFLAG cleared read byte1R.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
9.1.4.8
Band limit flag band limit BLFLAG logic when automatic tuning detected tuning band when cannot lock certain frequency. This described Table Table This cleared reading byte1R.
Interrupt output
interrupt line driver transistor with nominal sink current pulled HIGH resistor connected VREFDIG. interrupt line connected other similar device with interrupt output pull-up resistor providing wired function. This allows drivers pull line sinking current. When flag masked generates interrupt; Figure
VCCA
flag
INTX read INTMSK write INTMSK
001aab470
read clears INTX
Read INTMSK clears flag, INTMSK INTX. Write INTMSK enables INTX. When flag set, next interrupts blocked until read write INTMSK. Flag immediately after reset, because event still there.
Interrupt line behavior
data processing
demodulator decoder perform following operations:
Demodulation RDS/RDBS data stream from signal Symbol decoding Block group synchronization Error detection correction Store last previous data block received with associated error status DAVFLG when data received SYNC status according current synchronization state LSYNCFL flag when synchronization lost
decoder different modes, each meant look specific information.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
10.1 DAV-A processing mode
DAV-A processing mode standard processing mode used. this mode, when data block been decoded, transferred I2C-bus registers. generates interrupts INTX line after every block data that been processed also sets DAVFLG; Figure DAVFLG reset read I2C-bus registers. data block decoded arrives, INTX goes again, DAVFLG will last block will shifted previous block last decoded block will last block. This means that data still available registers. When I2C-bus registers read DAVFLG will reset. data block decoded arrives, INTX goes last block will shifted previous block last decoded block will last block. This means that data still available registers must read. This indicated setting DOVF. I2C-bus registers still read, data will lost, except when this read done within after INTX line gone before arrival block. this read done least before arrival block, then read data decoder buffer then instantaneously shifted register. data read DOVF will reset.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
21.9 read read read
DAVFLG falling edge DAVFLG DAVN cleared read register INTX tINT_RD INT_RD 9.98 read intmsk read intflg INTX READ
9.98
register register
decoder being decoded registers: decoder buffer data overflow
001aab471
DOVF when blocks received registers there read cycle, placed register block register. DOVF indicate blocks available. Data transferred register read period/clear DOVF, missed. order lose read must performed before enters decoder buffer, thus read finishes within after DOVF logic DOVF cleared when register read. use, DOVF read before registers. prevent DOVF being again, extra read must performed before been decoded.
DAV-A timing diagram, DAV-A/B: normal
Figure assumes that block synchronization been achieved that other interrupt flags being set.
10.2 DAV-B processing mode fast search mode
This mode used, example, when receiver been re-tuned station, fast search code, always contained block, required. diagram shown Figure assumes that decoder unsynchronized initially performing synchronization search. During synchronization search decoder does DAVFLG until valid block detected. valid block detected immediately, then decoder synchronized SYNC logic fact, good blocks valid order detected, decoder will synchronize give interrupt.
TEA5764UK_2 Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
some reason valid block received then next valid block decoded DAVFLG set. registers record block history. When decoder synchronized, each decoded block will DAVFLG (assuming reset read action) generate interrupt.
21.9
good
good
good
good block detected DAVFLG
INTX read intmsk sync status synchronized synchronized read register
access read
register register
only valid blocks with errors counted good blocks error correction applied according bits
001aab472
When number blocks detected order: `bad' `bad' `good' synchronization achieved another good block followed either blocks another good block then received. order blocks, synchronization achieved counters reset. number allowed clocks using bits
DAV-A timing diagram, with blocks detected during sync search
10.3 DAV-C reduced processing mode
DAV-C processing mode very similar DAV-A mode with main exception that data flag only after blocks received. Hence update rate reduced half.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
21.9
being decoded
DAVFLG cleared read register forced zero till read DAVFLG
INTX INTX
INTX cleared read INTMSK register copied register register
INT_RD read access (case read
copied register shortly before decoded
001aab473
Normal DAV-C timing diagram
21.9
instant copy from decoder buffer just before decoded read action register register instant copy from decoder buffer
DAVFLG cleared read performed DAVFLG (case DAVFLG reset when block would have been copied
DAVFLG when block decoder buffer
INTX INTX read access (case read INTX will lost data overflow blocks have arrived BL/BP (C1, block (A2) entered decoder buffer. Hence, DOVF again. prevent this, extra read must performed after reading
001aab474
read dashed line shows what would happen read occurred (a). DOVF until next read register, however would lost
DAV-C timing diagram, late read register
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
10.4 Synchronization
10.4.1 Conditions synchronization
When decoder turned must synchronized extract valid data from signal. decoder automatically initiates search synchronization. conditions meet synchronization status this synchronization checked following bits:
(Bad Blocks Lose): these bits I2C-bus have value
between
(Good Blocks Lose): these bits I2C-bus have value
between
(Bad Blocks Gain): these bits I2C-bus have value
between
(Good Block Count): these bits read I2C-bus have value
between
(Bad Block Count): these bits read I2C-bus have value
between When decoder synchronized will initiate synchronization search. This involves calculation syndrome each block received bits bit-by-bit basis. When correct syndrome (and hence block received decoder clocks next bits into internal registers performs second syndrome check. Synchronization found when certain number blocks have been decoded good blocks have been found, this number blocks defined bits. first block needed synchronization been found expected second block (after bits) invalid block, then decoder module internal bad_blocks_counter incremented next expected block calculated; exception: RBDS mode selected first block then next expected block always block until synchronization found maximum bad_blocks_counter value reached. decoder module internal bad_blocks_counter reaches value BBG[4:0], then synchronization search (bit-by-bit) started immediately find first block. synchronization monitored flywheel counters, BBC. These 6-bit counters that preset bits values between Each time block decoded recognized block Block Counter value, BBC, incremented When value equal value, synchronization lost. SYNC will become LSYNCFL indicate loss synchronization. TEA5764UK will automatically initiate synchronization search. Each time good block decoded, value incremented. When value equal value, both counters, GBC, count starts. counter only incremented when decoder synchronized.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
10.4.2 Data overflow
During synchronization, after data read from registers, available blocks shifted registers described Section 10.1 Section 10.3. registers read time, decoder cannot shift available block registers hence data overflow will occur, this indicated DOVF which DOVF reset read registers NWSY which results start synchronization search. Each time when data block decoded, DAVN goes logic indicate presence data block. DAVN also triggers interrupt output INTX. principle microprocessor must start reading must have read data (byte12R byte19R) before arrival data block. application possible that there large delay between arrival block reading this block. This have various causes such microprocessor that start-up from Sleep mode when polling used instead interrupt based read actions. Figure shows behavior DAVFLG DAVN when polling, where reading occur time. Note: DAVN sets INTX oneshot generator when DAVMSK Unlike INTX, DAVN cleared read mask register.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx
10.5 flag behavior during read action
Product data sheet Rev. August 2005
TEA5764UK_2
Philips Semiconductors
data
DAVN
DAVFLG
reset DAVFLG Read byte:
001aab475
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Blocking DAVFLG: reading byte15R byte17R (DAV-A, B/C) DAVFLG forced zero. Only after reading byte19R DAVFLG released again. synchronous reading performed using ASIC generated interrupts, this problem does occur. prevent undefined situations, byte12R byte19R should always read action immediately after each other. Signal DAVN INTX. Normally reading byte19R would reset DAVN, reset after maximal time DAVN. Read byte15R DAV-A DAV-B mode clears DAVFLG. DAV-C mode consecutive data blocks read hence DAVFLG reset after reading byte17R instead byte15R (dotted line). Read byte19R clears DAVN. Write byte0W (interrupt register).
TEA5764UK
radio
flag behavior
Philips Semiconductors
TEA5764UK
radio
10.6 Error detection reporting
TDA5764UK must report information number errors corrected last previously decoded blocks. This reported bits shown Table During synchronization search error correction disabled detection first block enabled processing second block according mode bits described Table
10.7 test modes
Test mode clock data recovered directly from pins VAFL VAFR when RDSCDA
10.8 Reading data from registers
read data microprocessor must read byte12R byte19R. bytes must read reset status bytes 13R, i.e. effectively status bits updated decoder after reading last byte19R. DOVF cleared after reading last byte19R status SYNC does depend reading register, SYNC indicates decoder synchronized not. When starting read action from byte12R, decoder blocks updates from bytes until byte19R been read. byte12R byte19R must read read action.
I2C-bus interface
I2C-bus interface based "The I2C-bus specification", version January 2000, expanded following definitions.
11.1 Write read mode
Table START I2C-bus write mode Byte chip address 0010 Table START Byte xxxx xxxx Byte Byte xxxx xxxx STOP byte0W byte6W
I2C-bus write mode Byte chip address 0010 Byte Byte Byte STOP byte7W xxxx xxxx byte10W xxxx xxxx
When writing bytes, byte0W byte10W written with write action.
Table START I2C-bus read mode Byte chip address 0010 Byte Byte Byte STOP byte0R xxxx xxxx byte15R xxxx xxxx
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Table START
I2C-bus read mode Byte chip address 0010 Byte Byte Byte STOP byte12R Table Label Byte Byte etc. xxxx xxxx I2C-bus transfer description Definition START condition I2C-bus chip address bits) write action read action acknowledge from slave TEA5764UK (SDA LOW) data byte bits) STOP condition acknowledge from master microcontroller (SDA LOW) acknowledge from master microcontroller (SDA HIGH) acknowledge (SDA HIGH) byte27R xxxx xxxx
When TEA5764UK addressed radio address, part (byte12R byte27R) read read action. read does have stop byte11R. Therefore, effectively only using part address, ignores some bytes which reduces I2C-bus access.
11.2 Data transfer
Structure I2C-bus:
Slave transceiver Subaddresses used Maximum LOW-level input voltage: VVREFDIG Minimum HIGH-level input voltage: VVREFDIG
Remark: I2C-bus operates maximum clock rate kHz. allowed connect TEA5764UK I2C-bus operating higher clock rate. Data transfer
each byte considered transferred first
byte
indicates write read action data becomes valid byte-wise appropriate falling edge clock STOP condition after byte shorten transmission times. When writing
transceiver using STOP condition before completion whole transfer: remaining bytes will contain information transfer byte completed bits will used, tuning cycle will started
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
speed traffic possible read data then only write back byte INTMSK appropriate mask(s) again. I2C-bus activity:
With bits PUPD TEA5764UK switched current Standby mode.
I2C-bus then still active
When I2C-bus interface deactivated, making BUSENABLE
without programmed Standby mode, TEA5764UK keeps normal operation, isolated from I2C-bus lines
possible operate TEA5764UK with BUSENABLE hard wired
VREFDIG, have interface always active.
HD;STA SU;BUSEN ENABLE
001aac796
SU;STO SU;DAT HD;DAT HIGH SU;STA HO;BUSEN
fall time both signals: where total capacitance line rise time both signals: where total capacitance line tHD;STA hold time (repeated) START condition. After this period, first clock pulse generated: tHIGH HIGH period clock: tSU;STA setup time repeated START condition: tHD;DAT data hold time: tHD;DAT Remark: lower limit added because ASIC internal hold time signal. tSU;DAT data setup time: tSU;DAT ASIC used standard mode I2C-bus system, tSU;DAT tSU;STO setup time STOP condition: tBUF free time between STOP START condition: capacitive load line: tSU;BUSEN enable setup time: tSU;BUSEN tHO;BUSEN enable hold time: tHO:BUSEN
timing diagram
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
11.3 Register
Table Byte Read Write INTFLAG INTMSK FRQSETMSB FRQSETLSB TNCTRL1 TNCTRL2 FRQCHKLSB IFCHK LEVCHK TESTBITS TESTMODE RDSSTAT1 RDSSTAT2 RDSLBMSB RDSLBLSB RDSPBMSB RDSPBLSB RDSBBC RDSGBC RDSCTRL1 RDSCTRL2 PAUSEDET RDSBBL MANID1 MANID2 CHIPID1 CHPID2 Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Table Register overview Byte name Access Reset value Reference
FRQCHKMSB
11.4 Byte description
Table INTFLAG byte0R description Symbol DAVFLG TESTBIT LSYNCFL IFFLAG Access Reset Functional description data available internal synchronization lost count correct
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
INTFLAG byte0R description .continued Symbol LEVFLAG Access Reset Functional description continuous checking RSSI level RSSI level dropped below (VSSL[1:0] Vhys) during tuning period (preset search) RSSI level dropped below VSSL[1:0]
Table
PDFLAG FRRFLAG BLFLAG
pause detected tuner state machine ready during search band limit been reached time
Table Table
INTMSK byte1R byte0W description Symbol DAVMSK LSYMSK IFMSK LEVMSK PDMSK FRMSK BLMSK Access Reset Functional description masks DAVFLG reserved masks LSYNCFL masks IFFLAG masks LEVFLAG masks PDFLAG masks FRRFLAG masks BLFLAG
FRQSETMSB byte2R byte1W description Symbol FR13 FR12 FR11 FR10 FR09 FR08 Access Reset Functional description search search down Search mode Preset mode frequency bits; Section
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
FRQSETLSB byte3R byte2W description Symbol FR07 FR06 FR05 FR04 FR03 FR02 FR01 FR00 Access Reset Functional description frequency bits; Section
Table Table
TNCTRL1 byte4R byte3W description Symbol PUPD[1:0] Access Reset Functional description power-up power-down used
BLIM
Japan band Europe band 87.5
SWPM IFCTC SMUTE
software port output FRRFLAG count time 15.02 count time 2.02 left right audio muted audio muted soft mute soft mute stereo noise cancellation stereo noise cancellation
Table
TNCTRL2 byte5R byte4W description Symbol SSL[1:0] Access Reset Functional description left right audio hard-muted hard mute search stop level ADC3 ADC5 ADC7 ADC10
HLSI
high-side injection low-side injection
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
TNCTRL2 byte5R byte4W description .continued Symbol AHLSI Access Reset Functional description forced mono stereo SWPORT HIGH SWPORT de-emphasis time constant de-emphasis time constant Section 8.21.3 functionality this
Table
Table Table Table
FRQCHKMSB byte6R description Symbol PLL13 PLL12 PLL11 PLL10 PLL09 PLL08 Access Reset Functional description reserved output frequency output frequency output frequency output frequency output frequency output frequency
FRQCHKLSB byte7R description Symbol PLL07 PLL06 PLL05 PLL04 PLL03 PLL02 PLL01 PLL00 Access Reset Functional description output frequency output frequency output frequency output frequency output frequency output frequency output frequency output frequency
IFCHK byteR8 description Symbol Access Reset Functional description count count count count count count count reserved
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
LEVCHK byte9R description Symbol LEV3 LEV2 LEV1 LEV0 STEREO Access Reset Functional description level count level count level count level count locked locked pilot detected pilot detected reserved
Table
This does switch radio mono stereo, this depends input level shown sections `Mono stereo blend' `mono stereo switched' Table
Table
TESTBITS byte10R byte5W description Symbol RDSCDA Access Reset Functional description left audio output hard muted left audio output hard muted right audio output hard muted right audio output hard muted VAFL clock VAFR data normal operation level hysteresis large level hysteresis small reference frequency selected FREQIN crystal reference XTAL local gain local off, normal gain RFAGC RFAGC when this logic interrupt generated INTX
LHSW TRIGFR
RFAGC INTCTRL
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
TESTMODE byte11R byte6W description Symbol Access Reset Functional description reserved oscillator output programmable divider output enabled normal operation test bits: Table describes selection signals output SWPORT when SWPM when TB[3:0] which effectively function.
Table
Table
RSSI level hysteresis RSSI hysteresis threshold LHSW LHSW Test bits (SWPM SWPORT output signal byte4W, depending bits SWPM oscillator output 32.768 kHz; when lock detect stereo STEREO programmable divider; when PSCOn; Section 9.1.4.6 clock 3-state output comparator reserved reserved reserved reserved
RSSI search stop level Table
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
RDSSTAT1 byte12R description Symbol BLID[2:0] Access Reset Functional description reserved block last block invalid block (RBDS) invalid block
Table
ELB[1:0]
reserved number errors last processed block errors maximum bits maximum bits uncorrectable
Table
RDSTAT2 byte13R description Symbol BPID[2:0] Access Reset Functional description block previous block invalid block (RBDS) invalid block
EPB[1:0]
number errors previous processed block errors maximum bits maximum bits uncorrectable
SYNC RSTD DOVF
bitstream synchronized synchronized power-on reset detected power-on reset detected data overflow occurred during read operation normal operation
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
RDSRLBMSB byte14R description Symbol BL15 BL14 BL13 BL12 BL11 BL10 Access Reset Functional description last data byte last data byte last data byte last data byte last data byte last data byte last data byte last data byte
Table Table Table Table
TEA5764UK_2
RDSLBLSB byte15R description Symbol Access Reset Functional description last data byte last data byte last data byte last data byte last data byte last data byte last data byte last data byte
RDSPBMSB byte16R description Symbol BP15 BP14 BP13 BP12 BP11 BP10 Access Reset Functional description previous data byte previous data byte previous data byte previous data byte previous data byte previous data byte previous data byte previous data byte
RDSPBLSB byte17R description Symbol Access Reset Functional description previous data byte previous data byte previous data byte previous data byte previous data byte previous data byte previous data byte previous data byte
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
RDSBBC byte18R description Symbol BBC5 BBC4 BBC3 BBC2 BBC1 BBC0 GBC5 GBC4 Access Reset Functional description block count block count block count block count block count block count good block count good block count
Table Table Table
RDSGBC byte19R description Symbol GBC3 GBC2 GBC1 GBC0 Access Reset Functional description good block count good block count good block count good block count reserved
RDSCTRL1 byte20R byte7W description Symbol NWSY SYM[1:0] Access Reset Functional description start synchronization normal processing error correction correction maximum bits maximum bits correction
RBDS DAC[1:0]
RBDS processing mode processing mode data output mode DAVA DAVB DAVC used
reserved
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
RDSCTRL2 byte21R byte8W description Symbol BBG4 BBG3 BBG2 BBG1 BBG0 Access Reset Functional description reserved blocks gain blocks gain blocks gain blocks gain blocks gain
Table Table
PAUSEDET byte22R byte9W description Symbol PT[1:0] Access Reset Functional description pause time
PL[1:0]
pause level
Table
GBL5 GBL4 GBL3 GBL2
number good blocks lose number good blocks lose number good blocks lose number good blocks lose
RDSBBL byte23R byte10W description Symbol GBL1 GBL0 BBL5 BBL4 BBL3 BBL2 BBL1 BBL0 Access Reset Functional description number good blocks lose number good blocks lose number blocks lose number blocks lose number blocks lose number blocks lose number blocks lose number blocks lose
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
MANID1 byte24R description Symbol Access Reset Functional description version code version code version code version code manufacturer code manufacturer code manufacturer code manufacturer code VERSION3 VERSION2 VERSION1 VERSION0 MANID10 MANID9 MANID8 MANID7
Table Table
MANID2 byte25R description Symbol MANID6 MANID5 MANID4 MANID3 MANID2 MANID1 MANID0 IDAV Access Reset Functional description manufacturer code manufacturer code manufacturer code manufacturer code manufacturer code manufacturer code manufacturer code manufacturer available manufacturer available
Table
CHIPID1 byte26R description Symbol CHIP ID15 CHIP ID14 CHIP ID13 CHIP ID12 CHIP ID11 CHIP ID10 CHIP CHIP Access Reset Functional description chip identification code chip identification code chip identification code chip identification code chip identification code chip identification code chip identification code chip identification code
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
CHIPID2 byte27R description Symbol CHIP CHIP CHIP CHIP CHIP CHIP CHIP CHIP Access Reset Functional description chip identification code chip identification code chip identification code chip identification code chip identification code chip identification code chip identification code chip identification code
Table
Limiting values
Table Limiting values accordance with Absolute Maximum Rating System (IEC 60134). Symbol VLO1 VLO2 VCCD VCCA VI/O(n) Tstg Tamb Vesd Parameter tuned circuit output tuned circuit output digital supply voltage analog supply voltage voltage inputs outputs storage temperature ambient temperature electrostatic discharge voltage pins except PILLP, RFIN1, RFIN2 PILLP only pins RFIN1 RFIN2
Machine model 0.75 pF). Human body model pF).
Conditions
-0.3 -0.3 -0.3 -0.3
+5.5 +5.5 +150 +200 +2000 +2000 +2000
Unit
with respect ground
-0.3 -200 -2000 -1000 -1500
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Static characteristics
Table Characteristics minimum maximum values include spread VCCA VCCD Tamb unless otherwise specified. Symbol VCCA VCCD VVREFDIG Parameter analog supply voltage digital supply voltage digital reference voltage I2C-bus interface VREFDIG analog supply current VCCA operating mode Standby mode ICCD digital supply current VCCD operating mode Standby mode IVREFDIG digital reference supply current operating mode; VVREFDIG 1.65 VCCD 22.5 13.7 Conditions 1.65 VCCD Unit Supply voltages
Supply currents ICCA
operating points VLOOPSW VCPOUT VLO1 VLO2 VPILLP VTMUTE VVAFL VVAFR VMPXOUT VMPXIN VFREQIN VXTAL VRFIN1 VRFIN2 VCAGC voltage LOOPSW voltage CPOUT voltage voltage voltage PILLP voltage TMUTE voltage VAFL voltage VAFR voltage MPXOUT voltage MPXIN voltage FREQIN voltage XTAL voltage RFIN1 voltage RFIN2 voltage CAGC measured with respect MHz; modulation MHz; modulation MHz; modulation MHz; modulation TRIGFR TRIGFR TRIGFR TRIGFR VCD3 VCD3 VCD3 1.09 1.37 0.05 1.17 1.57 VCD3 VCD3 VCD3 VCD3 1.65
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Dynamic characteristics
Table Characteristics Figure values given RMS; minimum maximum values include spread VCCA VCCD Tamb unless otherwise specified. input values defined potential difference, except when explicitly stated. Symbol fosc frsn frsn Parameter oscillator frequency input resistance input capacitance resonance frequency resonance frequency deviation duty cycle HIGH-level input voltage LOW-level input voltage carrier-to-noise ratio Tamb Tamb square wave square wave square wave Conditions -150 1.15 -151 32.768 +150 0.55 Unit dBc/ Voltage controlled oscillator Reference frequency input; FREQIN
Crystal oscillator 32.768 kHz; XTAL frsn frsn Cshunt resonance frequency resonance frequency deviation shunt capacitance motional capacitance series resistance Tamb 32.768
Synthesizer Programmable divider D/Dprog programmable divider ratio FRQSETMSB[15:8] XX11 1111; FRQSETLSB[7:0] 1111 1110 FRQSETMSB[15:8] XX00 1000; FRQSETLSB[7:0] 0000 0000 Dstep(prog) IM(sink) IM(source) counter Vsens ncount fres
TEA5764UK_2
8191
2048
programmable divider step size peak sink current peak source current length sensitivity voltage count result search stop period frequency resolution IFCTC IFCTC
15625 1953 4096
1000 1000
Charge pump; CPOUT; VLOOPSW (VLO2 0.2) fVCO fref divider ratio
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Table Characteristics .continued Figure values given RMS; minimum maximum values include spread VCCA VCCD Tamb unless otherwise specified. input values defined potential difference, except when explicitly stated. Symbol VO(max) VO(min) Isink(max) IL(max) Parameter input resistance HIGH-level input voltage LOW-level input voltage maximum output voltage minimum output voltage maximum sink current maximum leakage current VSWPORT input switching level input switching level down Iload Iload Conditions VVREFDIG Unit Logic pins; pins BUSENABLE, 0.7VVREFDIG -0.3 VVREFDIG -1.0
0.3VVREFDIG VVREFDIG 2000 1100 +1.0
Software programmable port; SWPORT
Isource(max) maximum source current
Interrupt flag; INTX; VVREFDIG 1.65 1.95 Iload(max) second device connected INTX VO(max) VO(min) maximum output voltage minimum output voltage pull-down current pull-up resistance time one-shot pulse time VVREFDIG 0.130 14.4 0.215 9.98 VVREFDIG 1200 22.5
Table signal channel characteristics Figure values given RMS; min. max. values include spread VCCA VCCD Tamb unless otherwise specified. input values defined potential difference, except when explicitly stated. Symbol Vsens(EMF) Parameter input resistance input capacitance sensitivity value voltage Conditions connected GNDRF connected GNDRF MHz; 22.5 kHz; fmod kHz; (S+N)/N TCdeem= A-weighting filter; Baud kHz; kHz; ftune MHz; RFagc MHz; MHz; ftune MHz; RFagc MHz; Vth(mute) Vsens(EMF) mV/dBµV Unit input; pins RFIN1 RFIN2
IP3in IP3out In-band Vi(AGC)(min)
in-band 3rd-order intercept point out-of-band 3rd-order intercept point minimum input voltage
dBµV dBµV
dBµV
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Table signal channel characteristics .continued Figure values given RMS; min. max. values include spread VCCA VCCD Tamb unless otherwise specified. input values defined potential difference, except when explicitly stated. Symbol Wideband Vi(RF) input voltage MHz; fRF2 MHz; VRF2 dBµV; Vth(mute) Vsens(EMF) mV/dBµV; radio tuned dBµV Parameter Conditions Unit
filter fcenter center frequency bandwidth selectivity ftune high-side; +200 low-side; -200 high-side; +100 low-side; -100 image rejection ftune MHz; dBµV VIF(slope) VADC(start) Gstep RTMUTE slope voltage level start voltage step resolution gain TMUTE output resistance output voltage 22.5 kHz; fmod kHz; Baud Vlevel VRF;
level detector mute voltage voltage 1.55 1.61 mV/20dB
demodulator
Isink (S+N)/N
output resistance sink current maximum signal-to-noise ratio MHz; 22.5 kHz; fmod kHz; TCdeem= A-weighting filter; Baud total harmonic distortion kHz; fmod kHz; A-weighting filter; Baud kHz; Figure kHz; fmod kHz; A-weighting filter; Baud kHz; Figure 22.5 kHz; fmod kHz; 0.3; Baud
THDOD
total harmonic distortion overdrive
AMsup
suppression
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Table signal channel characteristics .continued Figure values given RMS; min. max. values include spread VCCA VCCD Tamb unless otherwise specified. input values defined potential difference, except when explicitly stated. Symbol Vstart(mute) mute decoder VVAFL left audio output voltage 22.5 kHz; VAFL fmod kHz; pre-emphasis; TCdeem right audio output voltage VAFR output resistance VAFL 22.5 kHz; fmod kHz; pre-emphasis; TCdeem RDSCDA RVAFR output resistance VAFR RDSCDA Isink(VAFL) Isink(VAFR) sink current VAFL sink current VAFR input overdrive range relative fMPX kHz; VMPX Parameter mute start voltage mute attenuation Conditions relative VVAFL mute Baud Unit Soft mute; SMUTE 22.5 kHz; fmod
VVAFR
RVAFL
VO(VAFL-VAFR) output voltage difference between pins VAFL VAFR including pilot deviation; fmod channel separation including pilot deviation; fmod kHz; Baud 22.5 kHz; pre-emphasis with between
-0.5
+0.5
upper bandwidth lower bandwidth
(S+N)/N(m)
maximum signal-to-noise ratio, 22.5 kHz; fmod kHz; de-emphasis mono kHz; A-weighting filter maximum signal-to-noise ratio, 67.5 kHz; stereo fmod kHz; fpilot 6.75 kHz; de-emphasis kHz; A-weighting filter
(S+N)/N(s)
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Table signal channel characteristics .continued Figure values given RMS; min. max. values include spread VCCA VCCD Tamb unless otherwise specified. input values defined potential difference, except when explicitly stated. Symbol Parameter total harmonic distortion Conditions including pilot deviation; fmod kHz; Baud kHz; A-weighting filter mono; pilot deviation stereo; pilot deviation; Figure sup(pilot) pilot suppression measured pins VAFL VAFR; related including pilot deviation; fmod kHz; Mono stereo blend; Vstart(blend) blend start voltage channel separation including pilot deviation; fmod kHz; increasing input level decreasing input level switching voltage hysteresis
Unit
fpilot hys(pilot) TCdeem
pilot frequency deviation pilot tone detection hysteresis de-emphasis time constant
Table note
Mono stereo switching; including pilot deviation; fmod kHz; channel separation
driven mute functions Tuning mute; mute(VAFR) mute depth VAFR kHz; mono; Baud kHz; A-weighting filter kHz; mono; Baud kHz; A-weighting filter kHz; mono; Baud kHz; A-weighting filter
mute(VAFL)
mute depth VAFL
mute
mute depth pins VAFL VAFR
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Table signal channel characteristics .continued Figure values given RMS; min. max. values include spread VCCA VCCD Tamb unless otherwise specified. input values defined potential difference, except when explicitly stated. Symbol Parameter Conditions Unit demodulator/decoder; 22.5 kHz; kHz; TCdeem SYM1 SYM0 average over 2000 blocks IRDS Vsens current sensitivity value ICCD current when running 22.5 kHz; kHz; SYM1 SYM0 block quality rate fRDS block quality rate fRDS fcenter Pause detector fth(det)(pause) pause detection threshold frequency fmod kHz; filter center frequency bandwidth 24.7 37.5
56.5
57.5
Low-side high-side selectivity measured changing mixer injection from high-side low-side. When STEREO logic frequency between kHz; when STEREO logic frequency kHz. With increasing input levels radio switches gradually from mono stereo. mono stereo switching level input level switching from mono stereo.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
(dB)
001aac797
THD,
10-7
10-6
10-5
10-4
10-3
10-2
10-1
Mono signal, soft mute (fFM 22.5 kHz; kHz) Noise mono mode, soft mute Total harmonic distortion, (fFM kHz; kHz) VCCA Tamb AFout: A-weighting filter, filter: Measurements/decade:
Mono characteristics
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
001aac798
THD,
(dB)
10-7
10-6
10-5
10-4
10-3
10-2
10-1
VAFL signal, soft mute 67.5 kHz; kHz; fpilot 6.75 kHz) VAFR signal, soft mute 67.5 kHz; kHz; fpilot 6.75 kHz) Noise stereo mode, soft mute kHz; kHz; fpilot 6.75 kHz) Total harmonic distortion, 67.5 kHz; kHz; fpilot 6.75 kHz) VCCA Tamb AFout: A-weighting filter, filter: kHz; Measurements/decade:
Stereo characteristics
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
001aac799
THD,
(dB)
10-7
10-6
10-5
10-4
10-3
10-2
10-1
Mono signal, soft mute (fFM 22.5 kHz; kHz) Noise mono mode, soft mute Total harmonic distortion, (fFM kHz; kHz) VCCA Tamb AFout: A-weighting filter, filter: kHz; soft mute Measurements/decade:
Soft mute overdrive characteristics
10-3 VRFIN1, VRFIN2 10-4
001aac800
10-5
10-6
10-7 output
conversion levels
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Application information
Table Symbol List components Parameter band filter coil coil 32.768 crystal Type Qmin tolerance: Qmin tolerance: Manufacturer Philips Coilcraft; Murata Coilcraft; Murata varicap diode tuning BB202
ACT200; ppm; Section
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Package outline
WLB34: wafer-level ball grid array; balls; 0.36 TEA5764UK
ball index area
detail
scale
DIMENSIONS original dimensions) UNIT 0.26 0.22 0.38 0.34 0.38 0.28 4.02 3.96 4.02 3.96 0.05 0.015
OUTLINE VERSION TEA5764UK
REFERENCES JEDEC JEITA
EUROPEAN PROJECTION
ISSUE DATE 05-04-21 05-06-23
Package outline TEA5764UK (WLB34)
TEA5764UK_2 Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Soldering
17.1 Introduction soldering surface mount packages
This text gives very brief insight complex technology. more in-depth account soldering found Data Handbook IC26; Integrated Circuit Packages (document order number 9398 90011). There soldering method that ideal surface mount packages. Wave soldering still used certain surface mount ICs, suitable fine pitch SMDs. these situations reflow soldering recommended.
17.2 Reflow soldering
Reflow soldering requires solder paste suspension fine solder particles, flux binding agent) applied printed-circuit board screen printing, stencilling pressure-syringe dispensing before package placement. Driven legislation environmental forces worldwide lead-free solder pastes increasing. Several methods exist reflowing; example, convection convection/infrared heating conveyor type oven. Throughput times (preheating, soldering cooling) vary between seconds seconds depending heating method. Typical reflow peak temperatures range from depending solder paste material. top-surface temperature packages should preferably kept:
below (SnPb process) below (Pb-free process)
BGA, HTSSON.T SSOP.T packages packages with thickness packages with thickness volume called thick/large packages.
below (SnPb process) below (Pb-free process) packages with
thickness volume called small/thin packages. Moisture sensitivity precautions, indicated packing, must respected times.
17.3 Wave soldering
Conventional single wave soldering recommended surface mount devices (SMDs) printed-circuit boards with high component density, solder bridging non-wetting present major problems. overcome these problems double-wave soldering method specifically developed. wave soldering used following conditions must observed optimal results:
double-wave soldering method comprising turbulent wave with high upward
pressure followed smooth laminar wave.
packages with leads sides pitch (e):
larger than equal 1.27 footprint longitudinal axis preferred parallel transport direction printed-circuit board;
TEA5764UK_2 Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
smaller than 1.27 footprint longitudinal axis must parallel transport direction printed-circuit board. footprint must incorporate solder thieves downstream end.
packages with leads four sides, footprint must placed angle
transport direction printed-circuit board. footprint must incorporate solder thieves downstream side corners. During placement before soldering, package must fixed with droplet adhesive. adhesive applied screen printing, transfer syringe dispensing. package soldered after adhesive cured. Typical dwell time leads wave ranges from seconds seconds depending solder material applied, SnPb Pb-free respectively. mildly-activated flux will eliminate need removal corrosive residues most applications.
17.4 Manual soldering
component first soldering diagonally-opposite leads. voltage less) soldering iron applied flat part lead. Contact time must limited seconds When using dedicated tool, other leads soldered operation within seconds seconds between
17.5 Package related soldering information
Table Package BGA, HTSSON.T [3], LBGA, LFBGA, SQFP, SSOP.T [3], TFBGA, VFBGA, XSON DHVQFN, HBCC, HBGA, HLQFP, HSO, HSOP, HSQFP, HSSON, HTQFP, HTSSOP, HVQFN, HVSON, PLCC [5], LQFP, QFP, TQFP SSOP, TSSOP, VSO, VSSOP CWQCCN.L [8], PMFP [9], WQCCN.L
Suitability surface mount packages wave reflow soldering methods Soldering method Wave suitable suitable Reflow suitable suitable
suitable recommended recommended
suitable suitable suitable suitable
suitable
more detailed information packages refer (LF)BGA Application Note (AN01026); order copy from your Philips Semiconductors sales office. surface mount (SMD) packages moisture sensitive. Depending upon moisture content, maximum temperature (with respect time) body size package, there risk that internal external package cracks occur vaporization moisture them (the called popcorn effect). details, refer Drypack information Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods. These transparent plastic packages extremely sensitive reflow soldering conditions must account processed through more than soldering cycle subjected infrared reflow soldering with peak temperature exceeding measured atmosphere reflow oven. package body peak temperature must kept possible.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
These packages suitable wave soldering. versions with heatsink bottom side, solder cannot penetrate between printed-circuit board heatsink. versions with heatsink side, solder might deposited heatsink surface. wave soldering considered, then package must placed angle solder wave direction. package footprint must incorporate solder thieves downstream side corners. Wave soldering suitable LQFP, TQFP packages with pitch larger than definitely suitable packages with pitch equal smaller than 0.65 Wave soldering suitable SSOP, TSSOP, VSSOP packages with pitch equal larger than 0.65 definitely suitable packages with pitch equal smaller than Image sensor packages principle should soldered. They mounted sockets delivered pre-mounted flex foil. However, image sensor package mounted client flex foil using soldering process. appropriate soldering profile provided request. soldering manual soldering suitable PMFP packages.
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Revision history
Table Revision history Release date 20050809 Data sheet status Product data sheet Preliminary data sheet Change notice Doc. number Supersedes TEA5764UK_1 Document TEA5764UK_2 Modifications: TEA5764UK_1
Specification status changed from preliminary data sheet product data sheet.
20050701
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Data sheet status
Level Data sheet status Objective data Preliminary data Product status Development Qualification Definition This data sheet contains data from objective specification product development. Philips Semiconductors reserves right change specification manner without notice. This data sheet contains data from preliminary specification. Supplementary data will published later date. Philips Semiconductors reserves right change specification without notice, order improve design supply best possible product. This data sheet contains data from product specification. Philips Semiconductors reserves right make changes time order improve design, manufacturing supply. Relevant changes will communicated Customer Product/Process Change Notification (CPCN).
Product data
Production
Please consult most recently issued data sheet before initiating completing design. product status device(s) described this data sheet have changed since this data sheet published. latest information available Internet data sheets describing multiple type numbers, highest-level product status determines data sheet status.
Definitions
Short-form specification data short-form specification extracted from full data sheet with same type number title. detailed information relevant data sheet data handbook. Limiting values definition Limiting values given accordance with Absolute Maximum Rating System (IEC 60134). Stress above more limiting values cause permanent damage device. These stress ratings only operation device these other conditions above those given Characteristics sections specification implied. Exposure limiting values extended periods affect device reliability. Application information Applications that described herein these products illustrative purposes only. Philips Semiconductors make representation warranty that such applications will suitable specified without further testing modification.
customers using selling these products such applications their risk agree fully indemnify Philips Semiconductors damages resulting from such application. Right make changes Philips Semiconductors reserves right make changes products including circuits, standard cells, and/or software described contained herein order improve design and/or performance. When product full production (status `Production'), relevant changes will communicated Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes responsibility liability these products, conveys license title under patent, copyright, mask work right these products, makes representations warranties that these products free from patent, copyright, mask work right infringement, unless otherwise specified.
Trademarks
Notice referenced brands, product names, service names trademarks property their respective owners. I2C-bus wordmark logo trademarks Koninklijke Philips Electronics N.V.
Disclaimers
Life support These products designed life support appliances, devices, systems where malfunction these products reasonably expected result personal injury. Philips Semiconductors
Contact information
additional information, please visit: sales office addresses, send email
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Contents
8.10 8.11 8.12 General description Features Applications Quick reference data Ordering information Block diagram Pinning information Pinning description Functional description noise amplifier mixer Crystal oscillator tuning system Band limits Local long distance receive filter. demodulator counter Voltage level generator analog-to-digital converter. 8.13 Mute 8.13.1 Soft mute 8.13.2 Hard mute 8.13.3 Audio frequency mute 8.14 decoder 8.15 Signal dependent mono/stereo blend (stereo noise cancellation) 8.16 Software programmable port 8.17 Standby mode. 8.18 Power-on reset 8.19 RDS/RBDS 8.19.1 RDS/RBDS demodulator 8.19.2 data clock direct 8.19.2.1 RDS/RBDS decoder 8.20 Audio pause detector 8.21 Auto search Preset mode 8.21.1 Search mode 8.21.2 Preset mode 8.21.3 Auto high-side low-side injection stop switch 8.21.4 Muting during search preset 8.22 update/alternative frequency jump 8.22.1 Muting during update Interrupt handling Interrupt register. 9.1.1 Interrupt clearing 9.1.2 Timing 9.1.3 Reset 9.1.4 Interrupt flags behavior 9.1.4.1 Multiple interrupt events 9.1.4.2 Data available flag 9.1.4.3 synchronization flag. 9.1.4.4 frequency flag 9.1.4.5 RSSI threshold flag 9.1.4.6 Pause detection flag. 9.1.4.7 Frequency ready flag 9.1.4.8 Band limit flag. Interrupt output. data processing 10.1 DAV-A processing mode. 10.2 DAV-B processing mode fast search mode 10.3 DAV-C reduced processing mode 10.4 Synchronization 10.4.1 Conditions synchronization 10.4.2 Data overflow 10.5 flag behavior during read action 10.6 Error detection reporting 10.7 test modes 10.8 Reading data from registers I2C-bus interface 11.1 Write read mode 11.2 Data transfer. 11.3 Register 11.4 Byte description Limiting values Static characteristics Dynamic characteristics Application information Package outline Soldering 17.1 Introduction soldering surface mount packages 17.2 Reflow soldering. 17.3 Wave soldering. 17.4 Manual soldering 17.5 Package related soldering information Revision history Data sheet status.
continued
TEA5764UK_2
Koninklijke Philips Electronics N.V. 2005. rights reserved.
Product data sheet
Rev. August 2005
Philips Semiconductors
TEA5764UK
radio
Definitions Disclaimers Trademarks. Contact information
Koninklijke Philips Electronics N.V. 2005
rights reserved. Reproduction whole part prohibited without prior written consent copyright owner. information presented this document does form part quotation contract, believed accurate reliable changed without notice. liability will accepted publisher consequence use. Publication thereof does convey imply license under patent- other industrial intellectual property rights. Date release: August 2005 Document number: TEA5764UK_2
Published Netherlands
Other recent searches
R5F21238JFP - R5F21238JFP R5F21238JFP Datasheet
AQV214S - AQV214S AQV214S Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
