AKD4705-A AK4705 Evaluation Board Rev.0 GENERAL DESCRIPTION

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

AKD4705-A AK4705 Evaluation Board Rev.0 GENERAL DESCRIPTION

Datasheet Thumbnail

Top Searches for this datasheet

[AKD4705-A]
AKD4705-A
AK4705 Evaluation Board Rev.0
GENERAL DESCRIPTION AKD4705-A evaluation board quickly evaluating AK4705, with SCART switch. Evaluation requires audio/video analog analyzers/generators, digital audio signal source, power supply. AKM's evaluation board also used audio source. Also included AK4112B digital audio interface receiver which receives S/PDIF compatible audio data. digital audio data available optical connector BNC.
AKD4705-A -AK4705 Evaluation Board (Cable connecting with printer port IBM-AT compatible control software enclosed with board. This control software dose support Windows NT.)
FUNCTION connectors analog audio input/output connectors analog video input/output On-board clock generator connector external clock input Compatible with types digital interface Serial interface: Direct interface with evaluation boards AKM's converter evaluation boards. S/PDIF: On-board AK4112BVF that accepts optical input input 10pin header serial control interface
VVD2 VVD1
JP10 Reg. PORT3 Control Data 10pin Heder Port1
DATA DATA 10pin Header
+12V
JP11 (Digital)
PORT2
Clock Generator
AK4705
JP12
ENCB ENCRC ENCV TVVIN VCRFB VCRG
VCRSB VCRB TVSB
ENCG
ENCC
ENCY
VCRVIN
VCRRC
Figure AKD4705-A Block Diagram Circuit diagram layout attached this manual.
<KM078601>
2006/08
[AKD4705-A]
Operation sequence
power supply lines. (Note [+12V] [+5V] [D5V] [VVD1] [VVD2] [AGND] [DGND] [VVSS2] (Orange) (Red) (Red) (Red) (Blue) (Black) (Black) (Black) +11.4 +12.6V +4.75 +5.25V (Note +4.75 +5.25V (Note +4.75 VVD2 (Note VDD1 +5.25V (Note
Note: Each supply line should distributed from power supply unit. (REG) should open when "+5V" jack used. (D-A) should open when "D5V" jack used. JP10 (VDD1) JP11 (VDD2) should open when "VDD1" jack "VDD2" jack used independently. Set-up evaluation modes, jumper pins DIP-switches. (Refer next sections.) Connect PORT3 (µP-I/F) with enclosed 10-wire flat cable. execute enclosed control software. (Refer "CONTROL SOFTWARE MANUAL".) Turn power Reset AK4705 once bringing (PDN) "L", return "H".
<KM078601>
2006/08
[AKD4705-A]
Evaluation mode S/PDIF mode (Optical Link BNC: default)
When (DIP-switch S1_1 board) "L", AK4112B (DIR) generates MCLK, BICK, LRCK SDATA from received stream through PORT2 (TORX176: optical link) (BNC). This mode used evaluation using test disk. PORT1 (EXT) should open. 1)-1. DIP-switch set-up DIF2 DIF0 Audio Data Format AK4112B 16bit justified 18bit justified 24bit justified 24bit Table DIP-switch set-up
(Note) AK4112B: DIF1="L"
Notes
(Default)
Much data format AK4705 I2C-bus control following notes. Note 16bit justified DIP-switch follows.
AK4112B
(Reserved) (Reserved)
control registers DIF1/0 AK4705 enclosed software follows.
Note 18bit justified DIP-switch follows.
DIF2 DIF0
<KM078601>
AK4112B
(Reserved)
control registers DIF1/0 AK4705 enclosed software follows.
(Reserved)
DIF2 DIF0
2006/08
[AKD4705-A]
Note 24bit justified DIP-switch follows.
AK4112B
(Reserved) (Reserved) (Reserved) (Reserved)
control registers DIF1/0 AK4705 enclosed software follows.
Note 24bit (Default) DIP-switch follows.
control registers DIF1/0 AK4705 enclosed software follows.
<KM078601>
DIF2 DIF0
DIF2 DIF0
AK4112B
2006/08
[AKD4705-A]
1)-2. Jumper pins
MCLK
BICK
SDTI
LRCK
(Open)
(Default)
(Short)
(Default)
(Short)
(Default)
(Short)
(Default)
(Short)
(Default)
selects input port S/PDIF stream form Port2 (TOTX176) (BNC RX).
TORX
TORX
(TORX)
(Default)
(BNC)
<KM078601>
2006/08
[AKD4705-A]
On-board X'tal mode/ Feeding external MCLK
When (DIP-switch S1_1 board) "H", AK4112B generates MCLK, BICK LRCK from on-board X'tal external clock form SDATA should PORT1.
2)-1. DIP-switch set-up DIF1 Don't care DIF0 Don't care
Table DIP-switch set-up
2)-2. Jumper pins
2)-2-a. Using on-board X'tal
MCLK BICK SDTI LRCK
(Open) (Short) JP6: Don't care.
(Short)
(Open)
(Short)
2)-2-b. Using external clock connector MCLK BICK SDTI LRCK
(Short) (Short) (Short) JP6: Don't care. Remove on-board X'tal.
(Open)
(Short)
<KM078601>
2006/08
[AKD4705-A]
Feeding clocks from external
Under following set-up, external signals AK4705 through POTR1 (EXT). AKM's evaluation board used.
3)-1. DIP-switch set-up Don't care DIF1 Don't care DIF0 Don't care
Table DIP-switch set-up
3)-2. Jumper pins MCLK BICK SDTI LRCK
(Open) (Open) JP6: Don't care.
(Open)
(Open)
(Open)
Other jumper pins
[JP12](VCRRC): Input Jack selection VCRRC AK4705 When VCRC AK4705 outputs setting "1", signal through (VCRCOUT) VCRRC pin. "I": signal through (VCRRC) VCRRC pin. (Default) "I/O": signal through (VCRCOUT) VCRRC pin. AK4705 should "1".
JP12 JP12
(Default)
(I/O)
[JP7](GND): Analog ground digital ground Open: separated. (Default) Short: connected. (The jack "DGND" open.)
DGND AGND (Open)
(Default)
<KM078601>
2006/08
[AKD4705-A]
DIP-switch (S1) List
Switch Name DIF0 DIF2 Default Function mode (Refer evaluation mode) mode (Refer evaluation mode) (Reserved) (Reserved) Table DIP-switch list Jumper List 2,3, Jumper Name MCLK source set-up when CM0="H". MCLK, BICK, LRCK, SDTI
Open: X'tal (Default). Short: External clock (J1). Remove on-board X'tal.
Function
Clock source set-up
Short: Connect (AK4112B). (Default) Open: Separate DIR. Supply clocks Port1.
S/PDIF's port set-up when CM0="L".
TORX: Optical connector PORT2. (Default) BNC: connector
Analog ground digital ground
Open: separated (Default). Short: connected (The connector "DGND" open.).
Power supply source set-up digital section AKD4705-A.
Open: from "D5V" Jack. Short: from regulator "+5V" Jack. Don't connect anything "D5V" Jack. (Default)
Power supply source set-up AK4705.
Open: from "+5V" Jack. Short: from regulator. Don't connect anything "+5V" Jack. (Default)
Power supply source set-up VVD1 AK4705. VVD1
Open: from "VVD1" Jack. Short: from regulator "+5V" Jack. Don't connect anything "VVD1" Jack. (Default)
Power supply source set-up VVD1 AK4705. VVD2
Open: from "VVD2" Jack. Short: from regulator "+5V" Jack. Don't connect anything "VVD2" Jack. (Default)
Input Selection VCRRC VCRRC
side: Input VCRRC from VCRRC jack. (Default) "I/O" side: Input VCRC from VCRC jack. (Note: Refer AK4705)
Table Jumper list
<KM078601>
2006/08
[AKD4705-A]
Serial Control
AK4705-A controlled printer port (parallel port) IBM-AT compatible Connect PORT3 (µP-IF) with wire flat cable packed with AKD4705-A. careful connector direction. Flat cable should connected 10-pin header, line 10pin header pin.
Connect
SDA(ACK) AKD4705-A
wire flat cable Connector PORT3
µP-IF
Header
Figure Connection flat cable PORT3
Input/Output port List
Signal Name Input Audio Output Digital Input Input Video Output Slow Blanking Fast Blanking Input Output Input Output (VCRINL), (VCRINR), (TVINL), (TVINR) (VCROUTL), (VCROUTR), (TVOUTL), (TVOUTR), (MONOOUT) Port2 (TORX176) (RX) (ENCB), (ENCG), (ENCRC), (ENCC), (ENCV), J23(ENCY), J25(TVVIN), J14(VCRVIN), J18(VCRRC; Note), J20(VCRG), J22(VCRB) (VCRCOUT; Note), (TVVOUT), (TVRC), (TVG), (TVB), (RFV), (VCRVOUT) (VCRSB) (VCRSB) (TVSB) (VCRFB) (TVFB) Notes Max: 2Vrms Max: 3Vrm Max: D5V+0.3V Max: 1.5Vp-p Max: 3Vp-p Max: VP+0.3V Max: Max: VVD1+0.3V Max: VVD2
Note: Refer JP12 AK4705. Table Input/Output port List
indication content
turns during each output "H". [LE1] Indicates unlock parity error S/PDIF. Connected (AK4112B). (Normally off.) [LE2] Indicates validity status S/PDIF. Connected (AK4112B). (Normally off.)
Toggle switch (SW1 board) operation
"H": AK4705 active. "L": AK4705 powered down. (Note: When power AKD4705-A first, should switched from "H".) <KM078601> -92006/08
[AKD4705-A]
Control Software Manual Set-up evaluation board control software
AKD4705-A according previous term. Connect IBM-AT compatible with AKD4705-A 10-line type flat cable (packed with AKD4705-A). Take care direction 10pin header. (Please install driver CD-ROM when this control software used Windows 2000/XP. Please refer "Installation Manual Control Software Driver device control software". case Windows95/98/ME, this installation needed. This control software does operate Windows NT.) Insert CD-ROM labeled "AK4705 Evaluation Kit" into CD-ROM drive. Access CD-ROM drive double-click icon "akd4705.exe" control program. Then please evaluate according follows.
Operation flow
Keep following flow. control program according explanation above. Click "Port Reset" button. Click "Write default" button
Explanation each buttons
[Port Reset]: [Write default]: [All Write]: [Function1]: [Function2]: [Function3]: [Function4]: [Function5]: [SAVE]: [OPEN]: [Write]: interface board (AKDUSBIF-A) when using board. Initialize register AK4705. Write registers that currently displayed. Dialog write data keyboard operation. Dialog write data keyboard operation. sequence register setting executed. sequence that created [Function3] assigned buttons executed. register setting that created [SAVE] function main window assigned buttons executed. Save current register setting. Write saved values register. Dialog write data mouse operation.
Indication data
Input data indicated register map. letter indicates blue indicates "0". Blank part that defined datasheet.
<KM078601>
2006/08
[AKD4705-A]
Explanation each dialog [Write Dialog]: Dialog write data mouse operation
There dialogs corresponding each register. Click [Write] button corresponding each register dialog. check check box, data becomes "1". not, "0". want write input data AK4705, click [OK] button. not, click [Cancel] button.
[Function1 Dialog] Dialog write data keyboard operation
Address Box: Data Box: Input registers address figures hexadecimal. Input registers data figures hexadecimal.
want write input data AK4705, click [OK] button. not, click [Cancel] button.
[Function2 Dialog] Dialog evaluate DATT
There dialogs corresponding register 02h. Address Box: Input registers address figures hexadecimal. Start Data Box: Input starts data figures hexadecimal. Data Box: Input data figures hexadecimal. Interval Box: Data written AK4705 this interval. Step Box: Data changes this step. Mode Select Box: check this check box, data reaches data, returns start data. [Example] Start Data Data Data flow: check this check box, data reaches data, does return start data. [Example] Start Data Data Data flow: want write input data AK4705, click [OK] button. not, click [Cancel] button.
<KM078601>
2006/08
[AKD4705-A]
[SAVE] [OPEN]
4-1. [SAVE]
current register setting values displayed main window saved file. extension file name "akr". <Operation flow> Click [SAVE] Button. file name click [SAVE] Button. extension file name "akr".
4-2. [OPEN]
register setting values saved [SAVE] written AK4705. file type same [SAVE]. <Operation flow> Click [OPEN] Button. Select file (*.akr) Click [OPEN] Button.
<KM078601>
2006/08
[AKD4705-A]
[Function3 Dialog]
sequence register setting executed.
Click [F3] Button. following displayed.
control sequence. address, Data Interval time. "-1" address step where sequence should paused. Click [START] button. Then this sequence executed. sequence paused step Interval="-1". Click [START] button, sequence restarts from paused step. This sequence saved opened [SAVE] [OPEN] button Function3 window. extension file name "aks".
Figure Window [F3]
<KM078601>
2006/08
[AKD4705-A]
[Function4 Dialog]
sequence file (*.aks) saved [Function3] listed files, assigned buttons then executed. When [F4] button clicked, window shown Figure opens.
Figure [F4] window
<KM078601>
2006/08
[AKD4705-A]
6-1. [OPEN] buttons left side [START] buttons
Click [OPEN] button select sequence file (*.aks) saved [Function3]. sequence file name displayed shown Figure case that selected sequence file name "DAC_Stereo_ON.aks")
Figure [F4] window(2) Click [START] button, then sequence executed.
6-2. [SAVE] [OPEN] buttons right side
[SAVE] name assign sequence file displayed [Function4] window saved file. file name "*.ak4". [OPEN] name assign sequence file(*.ak4) saved [SAVE] loaded.
6-3. Note
This function doesn't support pause function sequence function. files used [SAVE] [OPEN] function right side need same folder. When sequence changed [Function3], sequence file (*.aks) should loaded again order reflect change.
<KM078601>
2006/08
[AKD4705-A]
[Function5 Dialog]
register setting file(*.akr) saved [SAVE] function main window listed files, assigned buttons then executed. When [F5] button clicked, window shown Figure opens.
Figure [F5] window
7-1. [OPEN] buttons left side [WRITE] button
Click [OPEN] button select register setting file (*.akr). register setting file name displayed shown Figure case that selected file name "DAC_Output.akr") Click [WRITE] button, then register setting executed.
<KM078601>
2006/08
[AKD4705-A]
Figure [F5] windows(2)
7-2. [SAVE] [OPEN] buttons right side
[SAVE] name assign register setting file displayed [Function5] window saved file. file name "*.ak5". [OPEN] name assign register setting file(*.ak5) saved [SAVE] loaded.
7-3. Note
files used [SAVE] [OPEN] function right side need same folder. When register setting changed [SAVE] Button main window, register setting file (*.akr) should loaded again order reflect change.
<KM078601>
2006/08
[AKD4705-A]
MEASUREMENT RESULTS Audio
[Measurement condition] Measurement unit Audio Precision System Cascade MCLK 256fs BICK 64fs 48kHz 10Hz20kHz 18bit Power Supply VD=5V, VDD1=5V, VDD2=5V, VP=12V Interface Temperature Room Volume#0=Volume#1=0dB Measurement signal line path: Volume#0 Volume#1 TVOUTL/R Parameter S/(N+D) 2Vrms Output Input signal 1kHz, 0dBFS 1kHz, -60dBFS data Measurement filter 20kLPF 22kLPF, A-weighted 22kLPF, A-weighted Results [dB] 93.3 96.8 97.0
Plots
Figure 1-1. (1kHz, 0dBFS input) 2Vrms output Figure 1-2. (1kHz, -60dBFS input) Figure 1-3. (Noise floor) Figure 1-4. (Out-of band noise) Figure 1-5. THD+N Input Level (fin=1kHz) Figure 1-6. THD+N (Input Level=0dBFS) Figure 1-7. Linearity (fin=1kHz) Figure 1-8. Frequency Response (Input Level=0dBFS) Figure 1-9. Crosstalk (Input Level=0dBFS)
<KM078601>
2006/08
[AKD4705-A]
Video
[Measurement condition] Signal Generator Sony Tectonics TG2000 Measurement unit Sony Tectonics VM700T Power Supply VD=5V, VDD1=5V, VDD2=5V, VP=12V Interface Room Temperature Measurement signal line path: ENCV TVVOUT, ENCRC TVRC Parameter Measurement conditions Input flat field Filter Uni-weighted, 15kHz 5MHz Input 100%red(ENCRC), Measured TVVOUT Input Modulated Lamp Input Modulated Lamp Results 73.1 Unit
Crosstalk
-58.9 0.67 0.83
deg.
Plots
Figure 2-1. Noise spectrum (Input=0%flat field, BW=15kHz 5MHz, weighted) Figure Crosstalk (Input= 100% (ENCRC), measured TVVOUT) Figure (Input= Modulated Lamp)
<KM078601>
2006/08
[AKD4705-A]
Plots (Audio)
AK4705 TVOUT S/(N+D) fs=48kHz
-100
-120
-140
-160
Figure1-1. (fin=1kHz Input Level=0dBFS)
AK4705 TVOUT fs=48kHz
-100
-120
-140
-160
Figure-1-2. (fin=1kHz Input Level=-60dBFS)
<KM078601>
2006/08
[AKD4705-A]
AK4705 TVOUT fs=48kHz
-100
-120
-140
-160
Figure1-3. (Noise Floor)
Figure1-4. (Outband Noise)
AK4705 THD+N fs=48kHz
-100
Figure1-5. THD+N Input level (fin=1kHz)
<KM078601>
2006/08
[AKD4705-A]
AK4705 THD+N Input Level fs=48kHz
-100 -140
-130
-120
-110
-100
dBFS
Figure1-6. THD+N Input Frequency (Input level=0dBFS)
AK4705 Linerarty fs=48kHz
-108
-120 -120
-110
-100
dBFS
Figure1-7.Linearity (fin=1kHz)
<KM078601>
2006/08
[AKD4705-A]
AK4705 Frequency Responce fs=48kHz
+0.8
+0.6
+0.4
+0.2 -0.2
-0.4
-0.6
-0.8
Figure1-8. Frequency Response (Input level=0dBFS)
-100 -105 -110 -115 -120
AK4705 Crosstalk fs=48kHz
Figure1-9. Crosstalk (Input level=0dBFS)
<KM078601>
2006/08
[AKD4705-A]
Plots(Video)
Figure 2-1. Noise spectrum (Input=0%flat field, BW=15kHz 5MHz, weighted)
<KM078601>
2006/08
[AKD4705-A]
Figure Crosstalk (Input= 100% (ENCRC), measured TVVOUT)
Figure (Input= Modulated Lamp)
<KM078601>
2006/08
[AKD4705-A]
Revision History
Date (YY/MM/DD) 05/09/27 06/08/30 Manual Board Reason Revision Revision KM078600 First Edition KM078601 Modification Contents
Comment addition
Title: Evaluation board Rev.0 AK4705 AK4705 Evaluation Board Rev.0 1)-1 switch set-up: Table1 (Note) AK4112B: DIF1="L" "Default Notes
Modification Comment addition
24bit 24bit (Default) Note3, Note4: Delete check mark MUTE, STBY
P5-P7. (EXT), (MCLK), (BICK), (SDTI), (LRCK), (GND): "Short", "Open", "Default (RX): "TORX", "BNC", "Default JP12 (VCRRC): "I", "I/O", "Default DIP-switch (S1) List: Switch Name: DIF0, Default: Switch Name: DIF2: Default: Jumper List: No.1: Short: X'tal (default) Open: X'tal (Default) Open: External clock (J1) Short: External clock (J1) No.8: Open: from "D-5V" Jack.(default) Open: from "D-5V" Jack.
Error Correct
No.12: VCRRC side: Input VCRRC from VCRRC jack side: Input VCRRC from VCRRC jack (Default)
P25. Figure 2-3. Crosstalk: Plot Correct
<KM078601>
2006/08
[AKD4705-A]
IMPORTANT NOTICE
These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising from said product absence such notification.
<KM078601>
2006/08
(VVSS)
0.1u
(VSS) VCRVOUT TVFB SDTI BICK MCLK LRCK
PVCOM DVCOM
VCRC VVSS TVVOUT VVD2 TVRC VVD1 REFI ENCB ENCG
0.1u
0.1u
+C21
MONOOUT
0.1u
R555
TVOUTL TVOUTR VCROUTL VCROUTR TVINL TVINR VCRINL
0.1u
4705
0.1u
VCRVIN
VCRRC
VCRSB
VCRFB
ENCRC TVVIN ENCC ENCV ENCY
VCRINR TVSB
VCRG
VCRB
Title Size Date:
Document Number
AKD4705-A-48LQFP AK4705
Sheet
4112B_3.3V
0.1u
MCLK BICK LRCK SDATA Logic
PORT1
Logic
Logic
74HCU04
(OPEN)
(OPEN)
4112B_3.3V
Logic
PORT2 R-PACK5R
TORX176
BNC(RX)
0.1u
Size Date:
0.1u
12.288MHz
DVDD DVSS TVDD V/TX AVDD AVSS DIF0/RX2 DIF1/RX3 DIF2/RX4
CM0/CDTO CM1/CDTI OCKS1/CCLK OCKS0/CSN MCK01 MCK02 DAUX BICK SDTO LRCK FS96 AUTO
INTRUPT
MCLK
MCLK BICK SDTI
BICK SDTI LRCK
LRCK Logic
AK4112BVF
74HCU04
DIF0 DIF2 DIF0 DIF2
AK4112B
DIP-5
74HCU04
Logic
74HCU04
0.1u
DIF0 DIF2
74HCU04 74HCU04
0.1u
TORX
Title Document Number
AKD4705-A AK4112B
Sheet
LRCK
BICK
MCLK
SDTI
VCRVOUT
TVFB
VCRC
(VVSS2)
TVVOUT
VVD2
TVRC
+12V
MONOOUT
TVOUTL
TVOUTR
VCROUTL
VVD1
ENCB
VCROUTR
ENCG
ENCRC
TVINL
ENCC
TVINR
VCRINL
VCRFB VCRRC VCRG VCRB INTRUPT VCRVIN ENCV TVVIN ENCY
VCRSB
Analog Ground
TVSB
Title Size Date:
VCRINR
Digital Ground
Document Number
AKD4705-A AK4705
Sheet
VCRINR 0.47u (open)
(VVSS)
MONOOUT
VCRINR
MONOOUT
(VVSS) (VVSS)
(VVSS)
VCRINL 0.47u (open) TVINR
(VVSS)
TVOUTL
VCRINL
(VVSS)
TVOUTL
(VVSS)
(VVSS)
From Analog output
TVINR 0.47u (open)
(VVSS) (VVSS)
TVOUTR
TVOUTR
Analog input
(VVSS)
(VVSS)
TVINL 0.47u (open)
VCROUTL
TVINL
(VVSS)
VCROUTL
(VVSS)
(VVSS)
(VVSS)
VCROUTR
VCROUTR
(VVSS)
(VVSS)
Title Size Date:
AKD4705-A
Document Number
Analog Input/Output Circuit Thursday, August 2006 Sheet
74HCT541
Logic
Logic
74HCT14 74HCT14
PORT3
SDA(ACK)
uP-I/F
0.1u
74HCT14
74LS07 74LS07 74LS07 74LS07 74LS07
74LS07
Logic
(short)
74HCT14 74HCT14 74HCT14
SDA(ACK)
Logic
NJM78M05FA
+12V
+C39
+12V (short)
0.1u
0.1u
(short) VVD1 JP10 VDD1 VVD2
Logic
LP2950A 4112B_3.3V
0.1u Logic 0.1u
0.1u
0.1u
0.1u
0.1u
VVD1
0.1u
74HCT14, 74HCU04, 74LS07, 74HCT541
Title
VVD2 (short)
JP11 VDD2
Size Date:
Document Number
AKD4705-A POWER SUPPLY
Sheet
ENCB
(short)
VCRVIN ENCB
(VVSS2) (VVSS2)
(short)
VCRVIN 0.1u
0.1u
(VVSS2)
ENCG
(VVSS2)
(short)
VCRFB ENCG
(VVSS2) (VVSS2)
VCRFB
0.1u
(VVSS2)
(VVSS2)
ENCRC
ENCRC 0.1u
VCRRC
(VVSS2) (VVSS2)
JP12
(short)
VCRRC 0.1u VCRCOUT
(short)
VCRRC
(VVSS2)
(VVSS2)
ENCC
(VVSS2) (VVSS2)
(short)
ENCC 0.1u
VCRG
(VVSS2) (VVSS2)
(short)
VCRG 0.1u
ENCV
(short)
ENCV 0.1u
VCRB
(VVSS2) (VVSS2)
(short)
VCRB 0.1u
(VVSS2)
(VVSS2)
ENCY
(VVSS2) (VVSS2)
(short)
ENCY 0.1u
VCRSB
(VVSS) (VVSS)
VCRSB
TVVIN
(VVSS2)
(short)
TVVIN 0.1u
Size Date:
Title Document Number
AKD4705-A
(VVSS2)
Video Block Input Circuit Sheet
VCRC
VCRCOUT
VCRCOUT
(VVSS2)
(VVSS2)
TVVOUT
TVVOUT
TVFB
(VVSS2)
TVFB
TVRC
TVRC
(VVSS2)
TVSB
TVSB
(VVSS2)
(VVSS2)
(VVSS2)
(VVSS2)
VCRVOUT
VCRVOUT
(VVSS2)
Title Size Date:
AKD4705-A
Document Number
Video Block Output6 Circuit Sheet

AKD4705-A AK4705 Evaluation Board Rev.0 GENERAL DESCRIPTION

Top Searches for this datasheet

Other recent searches