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AKD4705-A

AK4705 Evaluation Board Rev.0

ASAHI KASEI
AKD4705-A
AK4705 Evaluation Board Rev.0
AKD4705-A -AK4705 Evaluation Board (Cable for connecting with printer port of IBM-AT compatible PC and a control software are enclosed with board. This control software dose not support Windows NT.)
MO NO D5V VVD2 VVD1
JP10 Reg. PORT3 µ P- IF Control Data 10pin Heder Port1
AD DATA ROM DATA 10pin Header
JP11 (Digital) JP8 JP9
PORT2 Opt In
J1 EXT JP1 Clock Generator
AK4705
TVI NL
TVI NR
TV ENCB ENCRC ENCV TVVIN VCRFB VCRG
VC RI VCRSB VCRB TVSB
VCRVIN
VCRRC
Figure 1. AKD4705-A Block Diagram Circuit diagram and PCB layout are attached at the end of this manual.
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AKD4705-A
Operation sequence
Note: 1. Each supply line should be distributed from the power supply unit. 2. JP9 (REG) should be open when the "+5V" jack is used. 3. JP8 (D-A) should be open when the "D5V" jack is used. 4. JP10 (VDD1) / JP11 (VDD2) should be open when the "VDD1" jack / "VDD2" jack are used independently. 2) Set-up the evaluation modes, jumper pins and DIP-switches. (Refer next sections.) 3) Connect the PORT3 (µP-I / F) with PC by the enclosed 10-wire flat cable. 4) Set up the PC and execute the enclosed control software. (Refer "CONTROL SOFTWARE MANUAL".) 5) Turn the power on. 6) Reset the AK4705 once by bringing the SW1 (PDN) "L", and return it to "H".
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AKD4705-A
Evaluation mode 1) S / PDIF mode (Optical Link or BNC: default)
(Default)
Much the data format of the AK4705 via I2C-bus control as following notes. Note 1. 16bit LSB justified Set up the DIP-switch as follows.
S1 AK4112B ON OFF
(Reserved) (Reserved)
Set up the control registers DIF1 / 0 of the AK4705 by enclosed software as follows.
Note 2. 18bit LSB justified Set up the DIP-switch as follows.
ON OFF
CM0 DIF2 DIF0
(Reserved)
Set up the control registers DIF1 / 0 of the AK4705 by enclosed software as follows.
(Reserved)
CM0 DIF2 DIF0
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AKD4705-A
Note 3. 24bit MSB justified Set up the DIP-switch as follows.
S1 AK4112B ON OFF
(Reserved) (Reserved) (Reserved) (Reserved)
Set up the control registers DIF1 / 0 of the AK4705 by enclosed software as follows.
Note 4. 24bit I2S (Default) Set up the DIP-switch as follows.
ON OFF
Set up the control registers DIF1 / 0 of the AK4705 by enclosed software as follows.
CM0 DIF2 DIF0
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AKD4705-A
1)-2. Jumper pins set up
JP1 EXT
JP2 MCLK
JP3 BICK
JP4 SDTI
JP5 LRCK
(Open)
(Default)
(Short)
(Default)
(Short)
(Default)
(Short)
(Default)
(Short)
(Default)
The JP6 selects the input port of S / PDIF bit stream form Port2 (TOTX176) or J2 (BNC RX).
BNC (TORX)
(Default)
BNC (BNC)
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AKD4705-A
Table 2. DIP-switch set-up
2)-2. Jumper pins set up
JP1 EXT JP2 MCLK JP3 BICK JP4 SDTI JP5 LRCK
(Short)
(Open)
(Short)
2)-2-b. Using external clock via BNC connector J1 JP1 EXT JP2 MCLK JP3 BICK JP4 SDTI JP5 LRCK
(Open)
(Short)
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AKD4705-A
3) Feeding all clocks from external
Table 3. DIP-switch set-up
3)-2. Jumper pins set up JP1 EXT JP2 MCLK JP3 BICK JP4 SDTI JP5 LRCK
(Open)
Other jumper pins set up
JP12(VCRRC): Input Jack selection for the VCRRC pin of AK4705 When the VCRC pin of the AK4705 outputs 0V by setting CIO bit to "1", the signal can be fed through the J27 (VCRCOUT) to VCRRC pin. "I": The signal is fed through the J18 (VCRRC) to VCRRC pin. (Default) "I / O": The signal is fed through the J27 (VCRCOUT) to VCRRC pin. The CIO bit of AK4705 should be set to "1".
(Default)
JP7(GND): Analog ground and digital ground Open: separated. (Default) Short: connected. (The jack "DGND" can be open.)
JP7 DGND AGND (Open)
(Default)
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AKD4705-A
DIP-switch (S1) List
Function
Clock source set-up
Short: Connect the DIR (AK4112B). (Default) Open: Separate the DIR. Supply clocks via Port1.
TORX: Optical connector PORT2. (Default) BNC: BNC connector J2.
Analog ground and digital ground 7 GND
Open: separated (Default). Short: connected (The connector "DGND" can be open.).
Power supply source set-up for digital section of AKD4705-A. 8 D-A
Power supply source set-up for VD of AK4705. 9 REG
Power supply source set-up for VVD1 of AK4705. 10 VVD1
Power supply source set-up for VVD1 of AK4705. 11 VVD2
Input Selection for VCRRC 12 VCRRC
"I" side: Input to VCRRC from VCRRC jack. (Default) "I / O" side: Input to VCRC from VCRC jack. (Note: Refer CIO bit of AK4705)
Table 5. Jumper list
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AKD4705-A
Serial Control
The AK4705-A can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT3 (µP-IF) with PC by 10 wire flat cable packed with the AKD4705-A. Be careful connector direction. Flat cable should be connected 10-pin header, red line put on 10pin header 5 and 6 pin.
Connect PC
SCL SDA SDA(ACK) AKD4705-A
RED 10 wire flat cable 5 10 pin Connector PORT3 6
µP-IF
10 pin Header
Figure 2. Connection of 10 pin flat cable for PORT3
Input / Output port List
Signal Name Input Audio Output Digital Input Input Video Output Slow Blanking Fast Blanking Input Output Input Output J5 (VCRINL), J3 (VCRINR), J9 (TVINL), J8 (TVINR) J12 (VCROUTL), J10 (VCROUTR), J6 (TVOUTL), J7 (TVOUTR), J4 (MONOOUT) Port2 (TORX176) or J2 BNC (RX) J13 (ENCB), J15 (ENCG), J17 (ENCRC), J19 (ENCC), J21 (ENCV), J23(ENCY), J25(TVVIN), J14(VCRVIN), J18(VCRRC Note), J20(VCRG), J22(VCRB) J27 (VCRCOUT Note), J29 (TVVOUT), J30 (TVRC), J31 (TVG), J32 (TVB), J33 (RFV), J34 (VCRVOUT) J24 (VCRSB) J24 (VCRSB) , J28 (TVSB) J16 (VCRFB) J26 (TVFB) Notes Max: 2Vrms Max: 3Vrm Max: D5V+0.3V Max: 1.5Vp-p Max: 3Vp-p Max: VP+0.3V Max: VP Max: VVD1+0.3V Max: VVD2
Note: Refer JP12 and CIO bit of the AK4705. Table 6. Input / Output port List
The indication content for LED
LED turns on during each output is "H". LE1 Indicates unlock or parity error of S / PDIF. Connected to the ERF pin of DIR (AK4112B). (Normally off.) LE2 Indicates the validity status of S / PDIF. Connected to the V pin of DIR (AK4112B). (Normally off.)
Toggle switch (SW1 on board) operation
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AKD4705-A
4) Control Software Manual Set-up of evaluation board and control software
1. Set up the AKD4705-A according to previous term. 2. Connect IBM-AT compatible PC with AKD4705-A by 10-line type flat cable (packed with AKD4705-A). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000 / XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95 / 98 / ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled "AK4705 Evaluation Kit" into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of "akd4705.exe" to set up the control program. 5. Then please evaluate according to the follows.
Operation flow
Keep the following flow. 1. Set up the control program according to explanation above. 2. Click "Port Reset" button. 3. Click "Write default" button
Explanation of each buttons
1. Port Reset: 2. Write default: 3. All Write: 4. Function1: 5. Function2: 6. Function3: 7. Function4: 8. Function5: 9. SAVE: 10. OPEN: 11. Write: Set up the USB interface board (AKDUSBIF-A) when using the board. Initialize the register of AK4705. Write all registers that is currently displayed. Dialog to write data by keyboard operation. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on Function3 can be assigned to buttons and executed. The register setting that is created by SAVE function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation.
Indication of data
Input data is indicated on the register map. Red letter indicates "H" or "1" and blue one indicates "L" or "0". Blank is the part that is not defined in the datasheet.
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AKD4705-A
Explanation of each dialog 1. Write Dialog: Dialog to write data by mouse operation
There are dialogs corresponding to each register. Click the Write button corresponding to each register to set up the dialog. If you check the check box, data becomes "H" or "1". If not, "L" or "0". If you want to write the input data to the AK4705, click OK button. If not, click Cancel button.
2. Function1 Dialog : Dialog to write data by keyboard operation
Address Box: Data Box: Input registers address in 2 figures of hexadecimal. Input registers data in 2 figures of hexadecimal.
If you want to write the input data to the AK4705, click OK button. If not, click Cancel button.
3. Function2 Dialog : Dialog to evaluate DATT
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AKD4705-A
4. SAVE and OPEN
4-1. SAVE
4-2. OPEN
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AKD4705-A
5. Function3 Dialog
The sequence of register setting can be set and executed.
(1) Click F3 Button. The following is displayed.
Figure 1. Window of F3
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AKD4705-A
6. Function4 Dialog
The sequence file (.aks) saved by Function3 can be listed up to 10 files, assigned to buttons and then executed. When F4 button is clicked, the window as shown in Figure 2 opens.
Figure 2. F4 window
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AKD4705-A
6-1. OPEN buttons on left side and START buttons
Figure 3. F4 window(2) (2) Click START button, then the sequence is executed.
6-2. SAVE and OPEN buttons on right side
SAVE : The name assign of sequence file displayed on Function4 window can be saved to the file. The file name is ".ak4". OPEN : The name assign of sequence file(.ak4) saved by SAVE is loaded.
6-3. Note
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AKD4705-A
7. Function5 Dialog
The register setting file(.akr) saved by SAVE function on main window can be listed up to 10 files, assigned to buttons and then executed. When F5 button is clicked, the window as shown in Figure 4 opens.
Figure 4. F5 window
7-1. OPEN buttons on left side and WRITE button
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AKD4705-A
Figure 5. F5 windows(2)
7-2. SAVE and OPEN buttons on right side
SAVE : The name assign of register setting file displayed on Function5 window can be saved to the file. The file name is ".ak5". OPEN : The name assign of register setting file(.ak5) saved by SAVE is loaded.
7-3. Note
(1) All files used by SAVE and OPEN function on right side need to be in the same folder. (2) When the register setting is changed by SAVE Button on the main window, the register setting file (.akr) should be loaded again in order to reflect the change.
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AKD4705-A
MEASUREMENT RESULTS Audio
Plots
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AKD4705-A
Video
Crosstalk DG DP
Plots
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AKD4705-A
Plots (Audio)
500 Hz
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AKD4705-A
500 Hz
Figure1-3. FFT (Noise Floor)
Figure1-4. FFT (Outband Noise)
500 Hz
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AKD4705-A
-70 dBFS
-60 dBFS
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AKD4705-A
500 Hz
-60 -65 -70 -75 -80 -85 d B -90 -95 -100 -105 -110 -115 -120 20
500 Hz
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AKD4705-A
Plots(Video)
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AKD4705-A
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AKD4705-A
Revision History
Date (YY / MM / DD) 05 / 09 / 27 06 / 08 / 30 Manual Board Reason Revision Revision KM078600 0 First Edition KM078601 0 Modification Contents
Comment addition
Modification Comment addition
24bit I2S 24bit I2S (Default) P4. Note3, Note4: Delete the check mark of MUTE, STBY
Error Correct
No.12: VCRRC "I" side: Input to VCRRC from VCRRC jack "I" side: Input to VCRRC from VCRRC jack (Default)
P25. Figure 2-3. Y / C Crosstalk: Plot Correct
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AKD4705-A
IMPORTANT NOTICE
· These products and their specifications are subject to change without notice. Before considering any use or application, consult the Asahi Kasei Microsystems Co., Ltd. (AKM) sales office or authorized distributor concerning their current status. · AKM assumes no liability for infringement of any patent, intellectual property, or other right in the application or use of any information contained herein. · Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. · AKM products are neither intended nor authorized for use as critical components in any safety, life support, or other hazard related device or system, and AKM assumes no responsibility relating to any such use, except with the express written consent of the Representative Director of AKM. As used here: (a) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. (b) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. · It is the responsibility of the buyer or distributor of an AKM product who distributes, disposes of, or otherwise places the product with a third party to notify that party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKM harmless from any and all claims arising from the use of said product in the absence of such notification.
CN3 CN4
0.1u 10u
C13 (VSS) + C19 + 35 VCRVOUT PDN TVFB SDTI SCL BICK VD MCLK SDA LRCK VSS RFV
PVCOM DVCOM VP 36 C12 35 34 33 32 31 30 29 28 27 26 25
VCRC VVSS TVVOUT VVD2 TVRC TVG TVB VVD1 REFI ENCB ENCG
C20 +C21
MONOOUT
TVOUTL TVOUTR VCROUTL VCROUTR TVINL TVINR VCRINL
AK 4705
VCRVIN
VCRRC
VCRSB
VCRFB
ENCRC TVVIN ENCC ENCV ENCY
VCRINR TVSB
Title Size A Date:
Document Number
AKD4705-A-48LQFP AK4705
Sheet
MCLK BICK LRCK SDATA Logic
R2 10k Logic
Logic
U2A 1 2 74HCU04 C5
JP1 EXT 22p
J1 BNC R3 75
(OPEN) 1 C6
(OPEN)
Logic
PORT2 6 5 6 5 GND VCC GND OUT 4 3 2 1 R-PACK5R 13
TORX176
C11 R8
BNC(RX)
Size A Date:
12.288MHz
DVDD DVSS TVDD V / TX XTI XTO PDN R AVDD AVSS RX1 DIF0 / RX2 DIF1 / RX3 DIF2 / RX4
CM0 / CDTO CM1 / CDTI OCKS1 / CCLK OCKS0 / CSN MCK01 MCK02 DAUX BICK SDTO LRCK ERF FS96 P / S AUTO
R82 10k R83 INTRUPT
JP2 MCLK
R9 R12
MCLK BICK SDTI
JP3 JP4 JP5
BICK SDTI LRCK
R11 R10
LRCK Logic
AK4112BVF
74HCU04
DIF0 DIF2 CM0 DIF0 DIF2
U2C S1
AK4112B
74HCU04
Logic
U2D 9 8 74HCU04
CM0 DIF0 DIF2
U2E 11 10 74HCU04 U2F 12 74HCU04
JP6 RX TORX
Title Document Number
AKD4705-A AK4112B
Sheet
Rev of
VCRVOUT
CN3 CN4
2 (VVSS2) 35 3 34
TVVOUT
MONOOUT
TVOUTL
TVOUTR
VCROUTL
VCROUTR
ENCRC
TVINL
TVINR
VCRINL
VCRFB VCRRC VCRG VCRB INTRUPT VCRVIN ENCV TVVIN ENCY
VCRSB
JP7 GND Analog Ground
Title Size A Date:
VCRINR
Digital Ground
Document Number
AKD4705-A AK4705
Sheet
Rev of
VCRINR R17 0.47u (open)
(VVSS)
MONOOUT 10k
J3 VCRINR
MONOOUT
(VVSS) (VVSS)
(VVSS) J6
VCRINL R21 0.47u (open) J8 TVINR
(VVSS)
TVOUTL 10k
J5 VCRINL
+ (VVSS)
TVOUTL
(VVSS)
(VVSS) J7
From Analog output
TVINR R26 0.47u (open)
(VVSS) (VVSS)
TVOUTR 10k
TVOUTR
FOR Analog input
(VVSS) C31 R28
(VVSS) J10
TVINL R29 0.47u (open)
VCROUTL 10k
J9 TVINL
+ (VVSS)
VCROUTL
(VVSS)
(VVSS) C33 R32
(VVSS) J12
VCROUTR 10k
VCROUTR
(VVSS)
Title Size A Date:
AKD4705-A
Document Number Rev
Analog Input / Output Circuit Thursday, August 17, 2006 3 6 of Sheet
Logic 10k
100 SCL Logic
D1 R38
U5A 1 2 74HCT14 C34 SW1 3 U5B 4 74HCT14 PDN
10k SCL SDA SDA(ACK)
U5C 5 6 74HCT14 1
U6A 2 74LS07 U6B 4 74LS07 U6D 8 74LS07 U6E 10 74LS07 U6F 12 74LS07
R42 U6C 6 74LS07
Logic SDA
(short)
74HCT14 U5E 11 10 74HCT14 U5F 13 12 74HCT14
SDA(ACK)
D5V JP8 Logic D-A
T1 NJM78M05FA
+12V R44
GND 3 OUT IN 1 C35 + C36
+12V (short)
47u R45 +5V (short) VVD1 JP10 VDD1 VVD2
47u Logic
C41 0.1u Logic 47u 0.1u
C42 0.1u
C43 0.1u
C44 0.1u
C45 0.1u
R14 5.1
for 74HCT14, 74HCU04, 74LS07, 74HCT541
Title
R13 VVD2 (short)
JP11 VDD2
Size A Date:
Document Number
AKD4705-A POWER SUPPLY
Sheet
J13 ENCB
R70 (short)
R46 75
J14 VCRVIN ENCB R47 75
(VVSS2) (VVSS2)
R77 (short)
C51 VCRVIN 0.1u
(VVSS2)
J15 ENCG
(VVSS2)
R71 R48 75 (short)
J16 VCRFB ENCG R49 75
(VVSS2) (VVSS2)
R78 VCRFB 300
(VVSS2)
(VVSS2) R72
J17 ENCRC R50 75
C53 ENCRC 0.1u
J18 VCRRC R51 75
(VVSS2) (VVSS2)
JP12 I
R79 (short)
C54 VCRRC 0.1u VCRCOUT
(short)
(VVSS2)
J19 ENCC R52 75
(VVSS2) (VVSS2)
R73 (short)
C55 ENCC 0.1u
J20 VCRG R53 75
(VVSS2) (VVSS2)
R80 (short)
C56 VCRG 0.1u
J21 ENCV
R74 R54 75 (short)
C57 ENCV 0.1u
J22 VCRB R55 75
(VVSS2) (VVSS2)
R81 (short)
C58 VCRB 0.1u
(VVSS2)
J23 ENCY R57 75
(VVSS2) (VVSS2)
R75 (short)
C59 ENCY 0.1u
J24 VCRSB R58 10K
(VVSS) (VVSS)
R56 VCRSB 300
J25 TVVIN R59 75
(VVSS2)
R76 (short)
C60 TVVIN 0.1u
Size A Date:
Title Document Number
AKD4705-A
(VVSS2)
Video Block Input 5 of 6 Circuit Sheet
75 VCRC
VCRCOUT RFV
VCRCOUT
R63 J29
(VVSS2)
75 TVVOUT
TVVOUT
R60 J26
75 TVFB
(VVSS2) R64 J30
75 TVRC
R62 J28
(VVSS2)
300 TVSB
(VVSS2) R65 J31
75 TVG
(VVSS2)
(VVSS2) R66 J32
75 TVB
(VVSS2) R68 J34
75 VCRVOUT
VCRVOUT
(VVSS2)
Title Size A Date:
AKD4705-A
Document Number Rev
Video Block Output6 Circuit 6 of Sheet