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AKD4550-E Evaluation board Rev.0 AK4550 GENERAL DESCRIPTION


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[AKD4550]
AKD4550-E
Evaluation board Rev.0 AK4550
GENERAL DESCRIPTION AKD4550-E evaluation board portable digital audio 16bit converter, AK4550. AKD4550-E evaluate converter converter separately addition loopback mode (A/D D/A). section evaluated interfacing with AKM's evaluation boards directly. AKD4550 interface with AKM's evaluation boards. Therefore, it's easy evaluate section. AKD4550-E also digital audio interface achieve interface with digital audio systems opt-connector. Ordering guide
AKD4550 -Evaluation board AK4550
FUNCTION Compatible with types interface Direct interface with AKM's converter evaluation boards DIT/DIR with optical input/output
AGND
DGND
Regulator AK4114
DIT/DIR
AINL/ AINR
AK4550
10pin Header
AOUTL/ AOUTR
Figure AKD4550-E Block Diagram Circuit diagram layout attached this manual.
<KM083000>
2006/02
[AKD4550]
Evaluation Board Manual Operation sequence
power supply lines. [VDD] (Orange) 3.6V [REG] (Red) 5.0V [AGND] (Black) [DGND] (Black) AK4550 regulator analog ground (including AK4550) logic ground
Each supply line should distributed from power supply unit.
evaluation mode, jumper pins switches. (See followings.) Power AK4550 should reset once bringing (PDN) "OFF" upon power-up.
<KM083000>
2006/02
[AKD4550]
Evaluation mode
Applicable Evaluation Mode Evaluation loopback mode (default) Evaluation using converted data Evaluation using (Optical Link) Evaluation using converted data Evaluation using (Optical Link) interface signals including master clock externally.
AKD43XX Board PORT2
AKD4550-E
PORT1
PORT3 10pin-Header AKD53XX Board Player
Evaluation loopback mode. (default) Nothing should connected PORT1/PORT3.
MCLK SCLK LRCK SDTI
<KM083000>
2006/02
[AKD4550]
Evaluation using converted data. part evaluated connecting with AKM's evaluation boards PORT3. Nothing should connected PORT1
MCLK SCLK LRCK SDTI
Evaluation using DIR. (Optical link) PORT1 (TORX141) used. generates MCLK, SCLK, LRCK SDATA from received data through optical connector (TORX141). Used evaluation using test disk. Nothing should connected PORT2/PORT3.
MCLK SCLK LRCK SDTI
Evaluation using converted data. part evaluated connecting with AKM's evaluation boards PORT3. Nothing should connected PORT1.
MCLK SCLK LRCK SDTI
<KM083000>
2006/02
[AKD4550]
Evaluation using DIT. (Optical link) PORT2 (TOTX141) used. generates audio bi-phase signal from received data which output through optical connector (TOTX141). possible connect AKM's converter evaluation boards digital-amplifier, which equips input.
MCLK SCLK LRCK SDTI
interfacing signals (MCLK, SCLK, LRCK) from external circuit through PORT3. Under following set-up, external signals needed AK4550 operate could through PORT3.
MCLK SCLK LRCK SDTI
<KM083000>
2006/02
[AKD4550]
switch
Upper-side "ON" ("H") lower side "OFF" ("L"). [SW1]: AK4550 AK4114. Name DIF2, DEM1 DEM0
Always OFF.
Mode
AK4550 AK4114 Audio Format Setting
de-emphasis AK4550 (See table
Table DIPswitch set-up AK4114
DEM1 DEM0 Mode (SW1-#2) (SW1-#3) 44.1kHz 48kHz 32kHz Table DIPswitch de-emphasis
<KM083000>
2006/02
[AKD4550]
Other jumper pins
[JP1] (GND): Connection between AGND DGND open: Both grounds separated board.<default> short: Both grounds connected board. [JP2] (REG): Select regulator open: On-board regulator used. <default> short: On-board regulator used.(The connector "VDD" open.) [JP3] (PWR): Pull power supply select SDTO. VDD: Connected AK4550. <default> D3V: Supplied from regulator (3V).
function toggle Upper-side "ON" lower side "OFF".
[SW2] (PDN): Resets AK4550 AK4114. Keep "ON" during normal operation.
Indication
[LED1] (ERF): Monitor INT0 AK4114. turns when some error occurred AK4114.
<KM083000>
2006/02
[AKD4550]
Input Circuit
AINL/AINR
4.7u
R101
AINR C102
2.2n
4.7u
R100
AINL
C101
2.2n
Figure Input circuit board
Output Circuit
AOUTR
AOUTL/AOUTR
AOUTL
Figure Output circuit board
assumes responsibility trouble when using circuit examples.
<KM083000>
2006/02
[AKD4550]
MEASUREMENT RESULTS
[Measurement condition] Measurement unit Audio Precision, System 256fs MCLK 64fs (ADC, DAC) SCLK 44.1kHz 16bit 2.5V, 3.0V,3.6V Power Supply DIT/DIR Interface Room Temperature SCLK 64fs 2.5V Parameter S/(N+D) (-0.5dBFS) D-Range (-60dBFS) data) S/(N+D) (-0.5dBFS) D-Range (-60dBFS) data) S/(N+D) (-0.5dBFS) D-Range (-60dBFS) data) Measured Filter 20kHz 20kLPF A-weighted 20kLPF A-weighted 20kHz 20kLPF A-weighted 20kLPF A-weighted 20kHz 20kLPF A-weighted 20kLPF A-weighted 44.1kHz 81.6 89.7 89.7 80.7 90.9 90.9 79.6 92.0 92.0
3.0V
3.6V
SCLK 64fs 2.5V Parameter S/(N+D) (0dBFS) D-Range (-60dBFS) data) S/(N+D) (0dBFS) D-Range (-60dBFS) data) S/(N+D) (0dBFS) D-Range (-60dBFS) data) Measured Filter 20kHz 22kLPF A-weighted 22kLPF A-weighted 20kHz 22kLPF A-weighted 22kLPF A-weighted 20kHz 22kLPF A-weighted 22kLPF A-weighted 44.1kHz 87.5 92.5 93.2 89.6 93.8 94.9 91.3 95.2 96.6
3.0V
3.6V
<KM083000>
2006/02
[AKD4550]
3.Graph
AK4550 ev.B THD+N Input Level =2.5V, =64fs, fs=44.1kHz
-100 -120
-110
-100
olor
Line Style Solid
Thick
Audio Anlr.TH
Axis Left
t.at2
K4550 ev.B Input Frequency =2.5V, =64fs, fs=44.1kHz
-100
olor
Line Style Solid
Thick
Audio Anlr.TH
Axis Left
t.at2
<KM083000>
2006/02
[AKD4550]
AK4550 ev.B Linearity =2.5V, =64fs, fs=44.1kHz
-100
-120 -120
-110
-100
olor
Line Style Solid
Thick
Audio Anlr.Bandpas
Axis Left t.at2
K4550 ev.B Frequency esponse =2.5V, LK=64fs, fs=44.1kHz, Input=-0.5dB
-0.25 -0.5 -0.75 -1.25 -1.5 -1.75
olor
Line Style Solid
Thick
Audio Anlr.Bandpas
Axis Left t.at2
<KM083000>
2006/02
[AKD4550]
K4550 Rev.B rosstalk =2.5V, =64fs, fs=44.1kHz
-100 -105
-110 -115 -120 -125 -130
olor
Line Style Solid
Thick
Audio Anlr.C talk
Axis Left t.at2
AK4550 ev.B =2.5V, LK=64fs, fs=44.1kHz, Input=-0.5dB
-100 -120 -140 -160
olor
Line Style Solid
Thick
Fft.C
Axis Left t.at2
<KM083000>
2006/02
[AKD4550]
AK4550 ev.B =2.5V, LK=64fs, fs=44.1kHz, Input=-60dBr
-100 -120 -140 -160
olor
Line Style Solid
Thick
Fft.C
Axis Left t.at2
AK4550 ev.B =2.5V, LK=64fs, fs=44.1kHz, Input=None
-100 -120 -140 -160
olor
Line Style Solid
Thick
Fft.C
Axis Left t.at2
<KM083000>
2006/02
[AKD4550]
AK4550 ev.B THD+N Input Level =2.5V, =64fs, fs=44.1kHz
-82.5 -87.5 -92.5 -97.5 -100 -120
-110
-100
olor
Line Style Solid
Thick
Anlr.TH
Axis Left t.at2
K4550 ev.B Input Frequency =2.5V, =64fs, fs=44.1kHz
-82.5 -87.5 -92.5 -97.5 -100
olor
Line Style Solid
Thick
Anlr.TH
Axis Left t.at2
<KM083000>
2006/02
[AKD4550]
AK4550 ev.B Linearity =2.5V, =64fs, fs=44.1kHz
-100
-120 -120
-110
-100
olor
Line Style Solid
Thick
Anlr.Bandpas
Axis Left t.at2
K4550 ev.B Frequency esponse =2.5V, LK=64fs, fs=44.1kHz, Input=0dBFS
0.75 0.25 -0.25 -0.5 -0.75
olor Line Style Solid Thick Anlr.Bandpas Axis Left t.at2
<KM083000>
2006/02
[AKD4550]
K4550 Rev.B rosstalk =2.5V, =64fs, fs=44.1kHz
-100 -105
-110
olor
Line Style Solid
Thick
Anlr.C talk
Axis Left t.at2
AK4550 ev.B =2.5V, LK=64fs, fs=44.1kHz, Input=0dBFS
-100 -120 -140 -160
olor
Line Style Solid
Thick
Fft.C
Axis Left t.at2
<KM083000>
2006/02
[AKD4550]
AK4550 ev.B =2.5V, LK=64fs, fs=44.1kHz, Input=-60dBFS
-100 -120 -140 -160
olor
Line Style Solid
Thick
Fft.C
Axis Left t.at2
AK4550 ev.B =2.5V, LK=64fs, fs=44.1kHz, Input=None
-100 -120 -140 -160
olor
Line Style Solid
Thick
Fft.C
Axis Left t.at2
<KM083000>
2006/02
[AKD4550]
Revision History
Date (YY/MM/DD) 06/02/01 Manual Revision KM083000 Board Revision Reason First Edtion Contents
IMPORTANT NOTICE These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising from said product absence such notification.
<KM083000>
2006/02
4.7u
R101 T45_R
T45_O
AGND
DGND
T45_BK T45_BK
C102 2.2n
AINL/AINR
AOUTL/AOUTR
4.7u
(5V) R100
(1.6-3.6V)
TA4803F
C101 2.2n
DGND
AGND
0.1u C100 4.7u 0.1u
0.1u
VCOM
AOUTR
AINR
AOUTL
AINL
PWDA
PWDAN
(short)
0.1u
PWAD
SCLK
BCLK
DEM0 MCLK
MCLK
DEM1 LRCK
LRCK
SDTO SDTI
SDTI
AK4550
DEM0 DEM1 4554_SDTO
Title Size Document Number
AKD4550-E
AK4550
Sheet
Date:
Tuesday, February 2006
DIF2, AK4555 AK4550/4 DEM1 DEM0 44.1k
PORT1
0.1u 0.1u
TORX141
0.47u
TEST1
AVSS
VCOM
AVDD
INT1
DIF2,0
INT0
MODE2 DEM0 DEM1
IPS0
LED1
74HC14
OCKS0
DIF0
OCKS1
TEST2
DIF1
4114_PDN EXTCLK
DIF2
AK4114
11.2896MHz
IPS1
P/SN
DAUX
SDTO
XTL0
MCKO2
XTL1
BICK
DIR_BICK
MCKO1 COUT UOUT DVDD BOUT VOUT DVSS DVSS TVDD LRCK
SDTO
DIR_SDTO
0.1u
0.1u
DIR_LRCK
DIR_MCKO
PORT2
TOTX141
0.1u
Title Size Document Number
AKD4550-E
DIR/DIT
Date:
Wednesday, February 2006 Sheet
SDTO PWDAN
4554_SDTO
74LVC07ANS
JP4MCLK MCLK
DIR_MCKO JP5SCLK
BCLK
DIR_BICK JP6LRCK
LRCK
DIR_LRCK
SDTI
0.1u
74LVC541
MCLK BICK LRCK SDTI
PORT3
SDTO
1S1588
4114_PDN
74HC14
74HC14 SDTO
0.1u
74HC14
74LVC07ANS 0.1u 0.1u
SDTI DIR_SDTO
Title Size Document Number
AKD4550-E
LOGIC
Date:
Wednesday, February 2006 Sheet
74LVC07ANS
74LVC07ANS
74HC14
74LVC07ANS
74LVC07ANS
74HC14
74LVC07ANS
74HC14
Title Size Document Number
AKD4550-E
Date:
Wednesday, February 2006 Sheet

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