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Evaluation Board, A/D Converter, Digital Analog Converter, SCR, Connectors, Divider, Digital Signal Processor, Circuit Diagram

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AKD4345-A


AK4345 Evaluation Board Rev.2

AKD4345-A
AK4345 Evaluation Board Rev.2
AKD4345-A -AK4345 Evaluation Board
VDD AGND
Digital In OPT BNC MCLK
74LVC541 AK4112B (DIR)
AK4345
Digital Out OPT Analog Out LOUT
Clock Divider Generator 10pin Header DSP Data
Figure 1. AKD4345-A Block Diagram
Circuit diagram and PCB layout are attached at the end of this manual.
AKD4345-A
Operation sequence
Evaluation mode
JP4 MCLK JP5 BICK JP6 SDTI1 JP7 LRCK JP12 EXT
3) D / A part evaluation using PORT3 (DSP), and supplying all interface signals from external equipments In case of using PORT3 (DSP), and supplying signals (MCLK, BICK, LRCK, SDTI1) that is needed for the AK4345 from external equipments, set up as following.
JP4 MCLK JP5 BICK JP6 SDTI1 JP7 LRCK JP12 EXT
AKD4345-A
Other Jumper pins set up
AKD4345-A
Example for External Clock setting
32kHz Normal 44.1kHz
Default
48kHz
48kHz Double 96kHz
AKD4345-A
DIP Switch set up
Default
Note. The AK4112B does not support 16bit, I2S Compatible.
AKD4345-A
The function of the toggle SW
SW1 (AK4345-PDN): Resets the AK4345. Keep "H" during normal operation. The AK4345 should be reset once by bringing SW1 "L" upon power-up. SW2 (AK4112B-PDN): Resets the AK4112B. Keep "H" during normal operation. The AK4112B should be reset once by bringing SW2 "L" upon power-up.
Analog Output Circuit
The DAC of AK4345 outputs analog audio signals through J3 and J4. C13 22u
+ AK4345-LOUT R9 10k J3 BNC-R-PC
R7 220
C100 1n
C17 22u + AK4345-ROUT R13 10k
R12 220
J4 BNC-R-PC
C101 1n
Figure 2. LOUT / ROUT Output circuit
AKEMD assumes no responsibility for the trouble when using the above circuit examples.
Serial control
The AKD4345-A can be controlled via the printer port (parallel port) of IBM-AT compatible PC. Connect PORT4 (uP-I / F) to PC by 10-line flat cable packed with the AKD4345-A. Take care of the direction of connector. There is a mark at pin#1. The pin layout of PORT4 as shown Figure 3.
Figure 3. PORT4 pin layout
CCLK CSN
AKD4345-A
Control Software Manual Set-up of evaluation board and control software
1. Set up the AKD4345-A according to the Operating Sequence located on page 2. 2. Connect IBM-AT compatible PC with AKD4345-A by 10-line type flat cable (packed with AKD4345-A). Take care of the direction of 10pin header. (Please install the driver in the CD-ROM when this control software is used on Windows 2000 / XP. Please refer "Installation Manual of Control Software Driver by AKM device control software". In case of Windows95 / 98 / ME, this installation is not needed. This control software does not operate on Windows NT.) 3. Insert the CD-ROM labeled "AKD4345-A Evaluation Kit" into the CD-ROM drive. 4. Access the CD-ROM drive and double-click the icon of "akd4345-a.exe" to set up the control program. 5. Please evaluate according to the following.
Operation flow
Keep the following flow. 1. Set up the control program according to explanation above. 2. Click "Port Reset" button.
Explanation of each buttons
1. Port Reset: 2. Write default: 3. All Write: 4. Function1: 5. Function2: 6. Function3: 7. Function4: 8. Function5: 9. SAVE: 10. OPEN: 11. Write: Set up the USB interface board (AKDUSBIF-A) . Initialize the register of AK4345. Write all registers that is currently displayed. Dialog to write data by keyboard operation. Dialog to write data by keyboard operation. The sequence of register setting can be set and executed. The sequence that is created on Function3 can be assigned to buttons and executed. The register setting that is created by SAVE function on main window can be assigned to buttons and executed. Save the current register setting. Write the saved values to all register. Dialog to write data by mouse operation.
Indication of data
Input data is indicated on the register map. Red letter indicates "H" or "1" and blue one indicates "L" or "0". Blank is the part that is not defined in the datasheet.
AKD4345-A
Explanation of each dialog 1. Write Dialog: Dialog to write data by mouse operation
There are dialogs corresponding to each register. Click the Write button corresponding to each register to set up the dialog. If you check the check box, data becomes "H" or "1". If not, "L" or "0". If you want to write the input data to AK4345, click OK button. If not, click Cancel button.
2. Function1 Dialog : Dialog to write data by keyboard operation
Address Box: Input registers address in 2 figures of hexadecimal. Data Box: Input registers data in 2 figures of hexadecimal. If you want to write the input data to AK4345, click OK button. If not, click Cancel button.
3. Function2 Dialog : Dialog to evaluate ATT
Address Box: Start Data Box: End Data Box: Interval Box: Step Box: Input registers address in 2 figures of hexadecimal. Input starts data in 2 figures of hexadecimal. Input end data in 2 figures of hexadecimal. Data is written to AK4345 by this interval. Data changes by this step.
AKD4345-A
4. Save and Open 4-1. Save
Save the current register setting data. The extension of file name is "akr".
(Operation flow)
(1) Click Save Button. (2) Set the file name and push Save Button. The extension of file name is "akr". 4-2. Open The register setting data saved by Save is written to AK4345. The file type is the same as Save.
(Operation flow)
(1) Click Open Button. (2) Select the file (.akr) and Click Open Button.
AKD4345-A
5. Function3 Dialog
Figure 4. Window of F3
AKD4345-A
6. Function4 Dialog
The sequence that is created on Function3 can be assigned to buttons and executed. When F4 button is clicked, the
window as shown in Figure opens.
Figure 5. F4 window
AKD4345-A
6-1. OPEN buttons on left side and START buttons
(1) Click OPEN button and select the sequence file (.aks). The sequence file name is displayed as shown in Figure.
Figure 6. F4 window(2) (2) Click START button, then the sequence is executed.
6-2. SAVE and OPEN buttons on right side
SAVE: The sequence file names can assign be saved. The file name is .ak4. OPEN: The sequence file names assign that are saved in .ak4 are loaded.
6-3. Note
AKD4345-A
7. Function5 Dialog The register setting that is created by SAVE function on main window can be assigned to buttons and executed. When F5 button is clicked, the following window as shown in Figure opens.
Figure 7. F5 window
7-1. OPEN buttons on left side and WRITE button
(1) Click OPEN button and select the register setting file (.akr).
(2) Click WRITE button, then the register setting is executed.
7-2. SAVE and OPEN buttons on right side
SAVE : The register setting file names assign can be saved. The file name is .ak5. OPEN : The register setting file names assign that are saved in .ak5 are loaded.
7-3. Note
(1) All files need to be in same folder used by SAVE and OPEN function on right side. (3) When the register setting is changed by Save Button in main window, the file should be loaded again in order to reflect the change.
AKD4345-A
MEASUREMENT RESULTS
AKD4345-A
-70 -72 -74 -76 -78 -80 -82 d B r A -88 -90 -92 -94 -96 -98 -100 -140 -84 -86
-70 dBFS
-70 -72 -74 -76 -78 -80 -82 d B r A -88 -90 -92 -94 -96 -98 -100 20 -84 -86
500 Hz
AKD4345-A
+0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140
-70 dBFS
+1 +0.9 +0.8 +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 d B r A +0.1 +0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 2k 4k
10k Hz
AKD4345-A
500 Hz
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50
500 Hz
AKD4345-A
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50 100 200 500 Hz 1k 2k 5k 10k 20k
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50 100
500 Hz
Figure 8. FFT Plot (no-input)
AKD4345-A
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50 100 200 500 1k Hz 2k 5k 10k 20k 50k 100k
Figure 9. FFT Plot (out-of-band-noise)
-70 -72.5 -75 -77.5 -80 -82.5 -85 -87.5 -90 d B r A -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 -140 -130 -120 -110 -100
-70 dBFS
AKD4345-A
-70 -72.5 -75 -77.5 -80 -82.5 -85 -87.5 -90 d B r A -92.5 -95 -97.5 -100 -102.5 -105 -107.5 -110 -112.5 -115 -117.5 -120 10 20 50 100
500 Hz
+0 -10 -20 -30 -40 -50 d B r A -60 -70 -80 -90 -100 -110 -120 -130 -140 -140
-70 dBFS
AKD4345-A
+1 +0.9 +0.8 +0.7 +0.6 +0.5 +0.4 +0.3 +0.2 d B r A +0.1 +0 -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 -1 2.5k 5k 7.5k 10k 12.5k 15k 17.5k 20k Hz 22.5k 25k 27.5k 30k 32.5k 35k 37.5k 40k
-70 -75 -80 -85 -90 -95 d B -100 -105 -110 -115 -120 -125 -130 10
500 Hz
AKD4345-A
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50 100 200 500 Hz 1k 2k 5k 10k 20k 40k
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50
500 Hz
AKD4345-A
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50 100 200 500 Hz 1k 2k 5k 10k 20k 40k
Figure 17. FFT Plot (no-input)
+0 -10 -20 -30 -40 -50 -60 d B r A -70 -80 -90 -100 -110 -120 -130 -140 -150 -160 10 20 50 100
Figure 18. FFT Plot (out-of-band-noise)
AKD4345-A
Revision History Date (yy / mm / dd) 07 / 03 / 15 07 / 04 / 17 Manual Revision KM087800 KM087801 Board Revision 0 1 Reason First Edition Circuit Change Change Circuit Change Add Contents
KM087802
Change U1 (AK4345): 28pin SOP 16pin TSSOP Remove jumper pins: JP1 (TX), JP3 (TEST1). Add resistance: R100 (300) to TX. TEST1 is open. P3. Remove description: (7) JP1 (TX), (8) JP3 (TEST1). Capacitor between VCOM and VSS: C3: Change: 10uF 4.7uF Add capacitor C100: 1nF between J3 (LOUT) and GND. Add capacitor C101: 1nF between J4 (ROUT) and GND. Add measurement results
IMPORTANT NOTICE These products and their specifications are subject to change without notice. When you consider any use or application of these products, please make inquiries the sales office of Asahi Kasei EMD Corporation (AKEMD) or authorized distributors as to current status of the products. AKEMD assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein. Any export of these products, or devices or systems containing them, may require an export license or other official approval under the law and regulations of the country of export pertaining to customs and tariffs, currency exchange, or strategic materials. AKEMD products are neither intended nor authorized for use as critical componentsNote1) in any safety, life support, or other hazard related device or systemNote2), and AKEMD assumes no responsibility for such use, except for the use approved with the express written consent by Representative Director of AKEMD. As used here: Note1) A critical component is one whose failure to function or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. Note2) A hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fields, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. It is the responsibility of the buyer or distributor of AKEMD products, who distributes, disposes of, or otherwise places the product with a third party, to notify such third party in advance of the above content and conditions, and the buyer or distributor agrees to assume any and all responsibility and liability for and hold AKEMD harmless from any and all claims arising from the use of said product in the absence of such notification.
U1 R100
AK4345-MCLK
AK4345-TX
AK4345-BICK
CDTO / SDTI2
CDTO JP2(3x1) CDTO / SDTI2 SDTI2
AK4345-CDTO
AK4345-SDTI1
SDTI1
AK4345-SDTI2
C1 0.1u AK4345-LRCK
4 4 LRCK VSS 13
C2 10u
AK4345-PDN
AK4345-CSN
AK4345-CCLK
AK4345-CDTI
TEST1
AK4345
C3 4.7u
AK4345-LOUT
AK4345-ROUT
Title
Date:
AKD4345-A A4 AK4345 Tuesday, June 12, 2007
Document Number Sheet
VCC C4 10u C6 10u VCC + C5 0.1u
CM0 / CDTO
CM1 / CDTI
X1 HC-49 / U 11.2896MHz
6 XTO MCKO2 23
AK4112B-PDN R1
VCC C10 10u + C11 0.1u
AK4112B-RX1
AK4112B-DIF0
AK4112B-DIF1
AK4112B-DIF2
C7 0.1u
3 TVDD OCKS1 / CCLK 26
OCKS0 / CSN
MCKO1
AK4112B-MCKO1
AK4112B-BICK
AK4112B-SDTO
AK4112B-LRCK
AK4112B-ERF
RX2 / DIF0
RX3 / DIF1
RX4 / DIF2
AK4112B
Title Size
Document Number
Date:
AKD4345-A AK4112B
Sheet
Thursday, May 31, 2007
VCC U3
C12 0.1u
19 G2 GND 10
EXT-MCLK AK4112B-MCKO1 EXT-BICK AK4112B-BICK AK4112B-SDTO EXT-LRCK AK4112B-LRCK
EXT DIR EXT DIR
EXT DIR
PORT3-MCLK JP4(3x1) MCLK PORT3-BICK JP5(3x1) BICK PORT3-SDTI1 JP6(2x1) SDTI1 PORT3-LRCK JP7 (3x1) LRCK 74LVC541A-PDN
51 AK4345-MCLK
51 AK4345-BICK
51 AK4345-SDTI1
51 AK4345-LRCK
AK4345-PDN
PORT3-SDTI2
PORT3 GND
JP8 (3x1) SDTI2
AK4345-SDTI2
74LVC541A
Title Size Document Number
Date:
AKD4345-A 74LVC541A
Sheet
Thursday, May 31, 2007
EXT-MCLK
VCC U4A 74AC74
GND CL
VCC PR
CLK RST
J1 BNC-R-PC
VCC PR
U4B 74AC74
JP11 (3x2)
JP9 (3x2) x1 1 x2 3 x3 5
VCC x1 x2 x4 x8
JP10 (4x2)
GND CL
R6 51 EXT JP12 (2x1)
VCC U6 74AC163
U5 74HC4040
Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 Q12
EXT-BICK
JP13 (3x2) x3 1 x1 3 x2 5
EXT-LRCK
U7A 74HC14
ENP ENT CLK LOAD CLR
U7B 74HC14
U7C 74HC14
U7D 74HC14
U7E 74HC14
U7F 74HC14
Title Size Document Number
AKD4345-A
External Master Clock Divider
Sheet
Date:
Thursday, May 31, 2007
L1 47u PORT1 TORX141 D1 HSU119 R8 10k U8A
C13 22u + AK4345-LOUT
R7 220
J3 BNC-R-PC
RX1(OPT) U8B
VCC GND OUT
C14 0.1u R10 470 OPT JP14 (3x1) AK4112B-RX1 RX1
R9 10k
C100 1n
74LVC541A-PDN
74HC14 C15 0.1u
74HC14 J2 BNC-R-PC
SW1 ATE1D-2M3 AK4345-PDN
RX1(BNC)
C16 R11 75 0.1u
C17 22u + VCC
R12 220
J4 BNC-R-PC
AK4345-ROUT PORT2 TOTX141 R14 10k U8C
D2 HSU119
TX(OPT) U8D
IN VCC GND
AK4345-TX VCC C18 0.1u
R13 10k
C101 1n
AK4112B-PDN
74HC14 C19 0.1u
74HC14
SW2 ATE1D-2M3 AK4112B-PDN
SW3 DSS103 DIF0 DIF1 DIF2
PORT3-MCLK PORT3-BICK PORT3-LRCK PORT3-SDTI1 PORT3-SDTI2 PORT3 A1-10PA-2.54DSA 1 10 MCLK 2 9 BICK 3 8 LRCK 4 7 SDTI1 SDTI2 5 6 DSP
AK4112B-MODE R15 R16 R17 47K 47K 47K AK4112B-DIF0 AK4112B-DIF1 AK4112B-DIF2 U9A 74HCT04 AK4112B-ERF
R18 1k
LED1 SML-210VT
AK4112B-ERF
U9B 74HCT04
VCC U10 74HCT157
U9C 74HCT04
74HC14 VCC U8F
U9D 74HCT04
R22 R25
10k 10k
R23 R26
74HC14
U9E 74HCT04
R21 R24 R27 R28 R29 100K
AK4345-CSN AK4345-CCLK AK4345-CDTI AK4345-CDTO
U9F 74HCT04
PORT4 A1-10PA-2.54DSA 10 9 CSN 8 7 CCLK 6 5 CDTI 4 3 CDTO uP-I / F R30 (short)
Title Size
AKD4345-A
Document Number Rev
Date:
Input Output for Digital Analog Sheet of
Tuesday, June 12, 2007 5 6
L2 (short)
L3 (short) JP15 (2x1) VDD C21 47u + R31 (short) C22 0.1u R32 C23 0.1u C24 0.1u C25 0.1u C26 0.1u C27 0.1u C28 0.1u For 74HC14 x 1, 74HCT04 x 1, 74AC74 x 1, 74HC4040 x 1, 74AC163 x 1, 74HC14 x 1 VCC
C20 47u +
VDD (short)
JP16 AGND (2x1) DGND GND
Title Size Document Number
Date:
AKD4345-A Power Supply
Sheet
Thursday, May 31, 2007