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AKD4113-B AK4113-B Evaluation Board Rev.1 GENERAL DESCRIPTIO


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[AKD4113-B]
AKD4113-B
AK4113-B Evaluation Board Rev.1
GENERAL DESCRIPTION AKD4113-B evaluation board AK4113, 192kHz digital audio receiver. This board optical, cannon connector connector interface with other digital audio equipment. Ordering guide
AKD4113-B -Evaluation board AK4113 cable connecting with printer port IBM-AT compatible control software packed with this.)
FUNCTION Digital interface -S/PDIF channel input (optical BNC) channel output (optical BNC) Serial audio data output (for data output. 10-pin port) -Serial control data input/output port (10-pin port)
3.3V Control
AK4113
Serial Data (For DIR)
Figure AKD4113-B Block Diagram *Circuit diagram layout attached this manual.
<KM076501>
2004/11
[AKD4113-B]
Evaluation Board Manual
Operating sequence power supply lines. (Red) [GND] (Black) evaluation mode jumper pins. (Refer following item.) Connect cables. (Refer following item.) Power AK4113 should reset once bringing PDN(SW2) upon power-up.
Evaluation modes Evaluation S/PDIF (optical BNC) AK4113 Serial Data (10pin port) generates MCLK, BICK LRCK SDATA from received data through optical connector(PORT1: TORX176) connector. AKD4113-B connected with AKM's evaluation board 10-line cable. Set-up Bi-phase Input RX2-6 should select connector same time. a-1. Connector JP2(RX1) Optical (PORT1) (J2) Table Set-up a-2. RX2, inputted from (J2) connector only. Only used parallel mode. a-2-1. Set-up jumper board. Mode Serial mode Parallel mode JP19 DIF0 JP21 JP22 JP23 JP24 DIF1 DIF2 Table Set-up Jumper board JP25 DIF0 JP26 DIF1
a-2-2. Set-up jumper main board. Input Short Short jumper, which selects channel, should Short. Table Set-up RX2,
<KM076501>
2004/11
[AKD4113-B]
a-3. Set-up AK4113 input path sets (IPS pin) parallel mode. Please IPS2-0 bits serial mode. IPS2 IPS1 IPS0 INPUT Data Table Recovery Data Select (Serial)
Default
IPS0 INPUT Data Default Table Recovery Data Select (parallel mode)
Set-up clock input output signal level outputted/inputted from PORT2 3.3V.
MCLK SDTO LRCK BICK PORT2
Figure PORT2 layout b-1. MCKO1/MCKO2 output MCKO1 MCKO2 selected JP12. output frequency MCKO1/MCKO2 selected OCKS 1-0. Output JP12 signal Default MCKO1 MCKO1 MCKO2 MCKO2 Table MCKO1/MCKO2 set-up
OCKS1 (SW3_2) OCKS1
OCKS0 (SW3_3) OCKS0
(X'tal)
MCKO1
MCKO2
(max) Default
256fs 256fs 256fs 256fs 256fs 128fs 512fs 512fs 256fs 128fs 128fs 64fs Table Master Clock Frequency Select
<KM076501>
2004/11
[AKD4113-B]
b-2. Set-up BICK LRCK input output Please select (DIR_I/O) according setup audio format AK4113 (Refer Table Output signal SW3_7 (DIR_I/O) Slave mode Master mode Table DIR_I/O set-up Set-up Audio data format sets 1_2, SW1_4 parallel mode. Please DIF2-0 serial mode. DIF2 (SW1_4) DIF2 DIF1 (SW1_3) DIF1 DIF0 (SW1_2) DIF0 LRCK 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, 24bit, Left justified 24bit, 16bit, Right justified 18bit, Right justified 20bit, Right justified 24bit, Right justified 24bit, Left justified 24bit, 24bit, Left justified 24bit, 64fs 64fs 64fs 64fs 64fs 64fs 64128fs 64128fs BICK Default
Default
Mode
DAUX
SDTO
Table Audio data format Set-up operation mode selected CM0. parallel mode, selected SW2_1 JP18. serial mode, selected CM1-0 bits. (SW3_1) (JP18) (CM0) (CDTO/CM0=H) (CM0) (Note) Clock source (RX) X'tal (RX) X'tal SDTO source DAUX DAUX Default
(UNLOCK)
X'tal
(CDTO/CM0=H) X'tal DAUX Oscillation (Power-up), OFF: STOP (Power-Down) Note: When X'tal used clock comparison detection (XTL0, "1,1"), X'tal OFF. Table Clock Operation Mode Select
<KM076501>
2004/11
[AKD4113-B]
Evaluation S/PDIF (optical BNC)- AK4113 S/PDIF (optical BNC) Set-up Bi-phase output signal only loop back mode corresponds. serial mode, selected OPS2-0 bits. This mode supported parallel mode. Connector JP13 (TX) Optical (PORT4) (J4) Table Set-up
Serial control
AK4113 controlled printer port (parallel port) IBM-AT compatible Connect PORT6 (uP-I/F) with 10-line flat cable packed with AKD4113-B. Take care direction connector. There mark pin#1. layout PORT6 Figure
Mode wire Serial
SW1_6 JP18 CDTO/CM0="H" CM0="L"(Note) Note: mode, chip address fixed "01". Table Set-up parallel mode serial mode
PORT6
JP20
Figure PORT6 layout This evaluation board encloses control software. software operation procedure included evaluation board manual.
<KM076501>
CDTO
CCLK
CDTI
2004/11
[AKD4113-B]
Toggle switch set-up Reset switch AK4113. during normal operation. Bring once after power supplied.
indication INT0 INT1
Bright when INT0 goes "H". Bright when INT1 goes "H".
switch (SW1) set-up: -off- means Switch Name Function IPS0 Set-up IPS0 pin. parallel mode) DIF0 Set-up DIF0 pin. parallel mode) DIF1 Set-up DIF1 pin. parallel mode) DIF2 Set-up DIF2 pin. parallel mode) IPS1/IIC Set-up pin. serial mode) "L": wire Serial, "H": Set-up P/SN pin. "L": Serial mode, "H": parallel mode P/SN TEST Don't care ACKS Don't care switch (SW3) set-up: -off- means Switch Name Function Set-up pin. parallel mode) OCKS1 Set-up OCKS1 pin. parallel mode) OCKS0 Set-up OCKS0 pin. parallel mode) PSEL Don't care XTL0 Don't care XTL1 Don't care Set-up transmission direction 74AC245 DIR_I/O "L": When inputting from PORT2, "H": When outputting from PORT2 DIT_I/O Don't care
<KM076501>
2004/11
[AKD4113-B]
Jumper Jumper Name D3V/VD
7,8,9,10
RX2-3 RX4-7 MCLK MCLK
11,12
SDA/CDTO
RX2/DIF0
IIC/FS96
RX3/DIF1
RX4/DIF2
RX6/IPS
RX4/IPS
RX5/DIF0
RX6/DIF1
Function Set-up Power supply source 74AC245. (default) Set-up input circuit. Optical (default) Set-up RX2-3 input circuit. RX4-7 set-up depending serial/parallel mode RX4-7 Serial mode (default) DIF2-0,IPS0 Parallel mode MCKO set-up PORT5(DIT) PORT2(DIR) MCKO1 MCKO1 AK4113 (default) MCKO2 MCKO2 AK4113 Set-up output circuit. Optical (default) Set-up SDA/CDTO pin. wire Serial CDTO/CM0="H". (default) CM0="L" Set-up depending serial/parallel mode RX2: Serial mode (default) DIF0: Parallel mode Set-up depending serial/parallel mode IIC: Serial mode (default) FS96: Parallel mode Set-up depending serial/parallel mode RX3: Serial mode (default) DIF1: Parallel mode Set-up depending serial/parallel mode RX4: Serial mode (default) DIF2: Parallel mode Set-up depending serial/parallel mode RX6: Serial mode (default) IPS: Parallel mode Set-up depending serial/parallel mode RX4: Serial mode (default) IPS: Parallel mode Set-up depending serial/parallel mode RX5: Serial mode (default) DIF0: Parallel mode Set-up depending serial/parallel mode RX6: Serial mode (default) DIF1: Parallel mode
<KM076501>
2004/11
[AKD4113-B]
Control Software Manual Set-up evaluation board control software
AKD4113-B according previous term. Connect IBM-AT compatible with AKD4113-B 10-line type flat cable (packed with AKD4113-B). Take care direction 10pin header. (Please install driver CD-ROM when this control software used Windows 2000/XP. Please refer "Installation Manual Control Software Driver device control software". case Windows95/98/ME, this installation needed. This control software does operate Windows NT.) Insert CD-ROM labeled "AKD4113-B Evaluation Kit" into CD-ROM drive. Access CD-ROM drive double-click icon "akd4113-b0.exe" control program. Then please evaluate according follows.
Operation flow
Keep following flow. control program according explanation above. Click "Write default" button. Then dialog input data.
Explanation each buttons
[Port Setup] printer port. [Write default] Initialize register AK4113. [All Write] Write registers that currently displayed. [Read All] registers AK4113 read. [Function1] Dialog write data keyboard operation. [F3] Dialog sequential writing. [SAVE] Save current register setting. [OPEN] Write saved values register. [Write] Dialog write data mouse operation. [Read] data corresponding each register read.
<KM076501>
2004/11
[AKD4113-B]
Explanation each dialog
[Function1 Dialog] Dialog write data keyboard operation Address Box: Data Box: Input register address figures hexadecimal. Input register data figures hexadecimal.
want write input data AK4113, click "OK" button. not, click "Cancel" button. [Write Dialog] Dialog write data mouse operation There dialogs corresponding each register. Click "Write" button corresponding each register dialog. check check box, data becomes "1". not, "0". want write input data AK4113, click "OK" button. not, click "Cancel" button.
Indication data
Input data indicated register map. letter indicates blue indicates "0". Blank part that defined datasheet.
Attention operation
Function1 dialog, input data boxes. Attention dialog indicated input data address that specified datasheet click "OK" button before input data. that case dialog input data once more again. These operations does need click "Cancel" button check check box.
<KM076501>
2004/11
[AKD4113-B]
Revision History Date (YY/MM/DD) 04/11/11 04/11/30 Manual Revision KM076500 KM076501 Board Revision Reason First Edtion Modification Contents
Circuit diagram (U1-15 U1-1 pin) changed
IMPORTANT NOTICE These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising from said product absence such notification.
<KM076501>
2004/11
CM1/CDTI/SDA
INT1
OCKS0/CSN/CAD
OCKS1/CCLK/SCL
CM0/CDTO/CAD1
INT0
INT0 INT1
0.1u TVDD AVDD V/TX
DVDD
CM0/CDTO/CAD1
DVSS
CM1/CDTI/SDA
0.1u TVDD OCKS1/CCLK/SCL
P/SN
P/SN MCKO2 MCKO1
11.2896MHz
DAUX
DIF0 JP19 FS96 RX2/DIF0 FS96/I2C
DIF1
JP21
RX3/DIF1
P/SN
DIF2 JP22 RX4/DIF2 INT1 JP23 FS96 RX6/IPS INT1
JP24 IPS/RX4
AK4113
JP25 DIF0 DIF0/RX5 DIF1/RX6 DIF1 JP26
DAUX
BICK
SDTO
MCKO1
MCKO2
LRCK
DIF2/RX7
V/TX
OCKS0/CSN/CAD0
0.1u AVDD SDTO BICK
AVSS
LRCK
INT0
JP20
V/TX INT0 TVDD
TVDD
P/SN
Title Size Date:
AKD4113-B
Document Number
Tuesday, November 2004 Sheet
PORT1
D3V/VD
AVDD P/SN/ANS ACKS AVDD
0.1u
0.1u0.1u0.1u
0.1u 0.1u
TORX176
0.1u
P/SN/ANS
LP2950A AVDD
ACKS
TVDD/VDD
short
short
TA48M033F DVDD
0.1u
AVDD IPS0
AVDD
short
OVDD
short
short
IPS0 DIF2/XSEL IPS1/IIC P/SN/ANS TEST ACKS
AVDD
AVDD
IPS0/RX4 IPS1/IIC P/SN/ANS TEST ACKS DIF0/RX5 JP10 DIF2/XSEL
TEST
TEST
DIF1/RX6
DIF2/XSEL/RX7
DVDD
DVDD
EMCK1
1S1588
74HC14
74HC14
DAUX2
DAUX
EMCK2 DAUX2
0.1u
74LVC157
JP11 MCKO1 MCKO2
MCKO1 MCKO MCKO2
DIT_MCLK DIR_MCLK
D3V/VD PORT2 JP12 MCKO1 MCKO2
OVDD
OVDD
MCLK BICK LRCK SDTO DAUX
100k
100k
D3V/VD
BICK
SDTO
LRCK
74AC245
DIR_I/O
Title Size Date: Document Number
AKD4113-B
MAIN
Tuesday, November 2004 Sheet
T45_BK T45_BK
VOUT
JP13
PORT4
TVDD/VDD
TVDD
TOTX176
0.1u
DA02-F
OVDD OVDD
EMCK2 EMCK INT0 INT1 CM0/CDTO/CAD1 74LS07 OCKS0/CSN/CAD0 DVDD DVDD IPS1/IIC IPS1/IIC 74LS07
INT0
74HC14
INT1
74HC14
PORT6
74HC14 74HC14
SCL/CCLK SDA/CDTI SDA(ACK)/CDTO
CM1/CDTI/SDA
OCKS1/CCLK/SCL
P/SN/ANS
uP-I/F
CM1/FS1 OCKS1/FS2 OCKS0/FS0 PSEL XTL0/CKS1 XTL1/TRANS DIR_I/O DIT_I/O JP18
74LVC157
CDTO/CM0=H CM0=L
SDA/CDTO
PSEL D3V/VD
XTL0
XTL1
DIR_I/O DIT_I/O
74LS07
74LS07
74LS07
74LS07
Title Size Date:
AKD4113-B
Document Number
MAIN
Tuesday, November 2004 Sheet

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