AKD4112B-B AK4112B Evaluation Board Rev.0 GENERAL DESCRIPTIO

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AKD4112B-B AK4112B Evaluation Board Rev.0 GENERAL DESCRIPTIO

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[AKD4112B-B]
AKD4112B-B
AK4112B Evaluation Board Rev.0
GENERAL DESCRIPTION AKD4112B-B evaluation board AK4112B, 96kHz digital audio receiver. This board optical, cannon connector connector interface with other digital audio equipment. Ordering guide
AKD4112B-B Evaluation board AK4112B cable connecting with printer port IBM-AT compatible control software packed with this.)
FUNCTION Digital interface -S/PDIF channel input (optical BNC) channel output (optical BNC) Serial audio data output (for data output. 10-pin port) -Serial control data input/output port (10-pin port)
3.3V Control
AK4112B
Serial Data (For DIR)
Figure AKD4112B-B Block Diagram *Circuit diagram layout attached this manual.
<KM080200>
2005/10
[AKD4112B-B]
Evaluation Board Manual
Operating sequence power supply lines. (Red) [GND] (Black) evaluation mode jumper pins. (Refer following item.) Connect cables. (Refer following item.) Power AK4112B should reset once bringing PDN(SW2) upon power-up.
Evaluation modes Evaluation S/PDIF (optical BNC) AK4112B Serial Data (10pin port)
MCLK BICK LRCK SDTO
S/PDIF
Optical, connector
AK4112B (DIR)
PORT2 (10pin Header)
MCLK BICK LRCK SDTO
AKD4112B-B
generates MCLK, BICK LRCK SDTO from received data through optical connector(PORT1: TORX176) connector. AKD4112B-B connected with AKM's evaluation board 10-line cable. Set-up Bi-phase Input RX2-4 should select connector same time. a-1. Connector JP2(RX1) Optical (PORT1) (J2) Table Set-up a-2. RX2, inputted from (J2) connector only. Only used parallel mode. a-2-1. Set-up jumper board. JP21 JP22 Mode JP19 Serial mode DIF1 DIF2 Parallel mode DIF0 Table Set-up Jumper board
<KM080200>
2005/10
[AKD4112B-B]
a-2-2. Set-up jumper main board. Short Short jumper, which selects channel, should Short. Table Set-up RX2, Input a-3. Set-up AK4112B input path sets IPS1-0 bits serial mode. IPS1 IPS0 INPUT Data Default Table Recovery Data Select (Serial)
Set-up clock input output signal level outputted/inputted from PORT2 3.3V.
MCLK SDTO LRCK BICK PORT2
Figure PORT2 layout b-1. MCKO1/MCKO2 output MCKO1 MCKO2 selected JP12. output frequency MCKO1/MCKO2 selected OCKS 1-0. Output JP12 signal Default MCKO1 MCKO1 MCKO2 MCKO2 Table MCKO1/MCKO2 set-up
OCKS1 (SW3_2) OCKS1
OCKS0 (SW3_3) OCKS0
(X'tal)
MCKO1
MCKO2
(max) Default
256fs 256fs 256fs 256fs 256fs 128fs 512fs 512fs 256fs Table Master Clock Frequency Select
<KM080200>
2005/10
[AKD4112B-B]
b-2. Set-up BICK LRCK input output Please select (DIR_I/O) according setup audio format AK4112B (Refer Table Output signal SW3_7 (DIR_I/O) Slave mode Master mode Table DIR_I/O set-up Set-up Audio data format sets 1_2, SW1_4 parallel mode. Please DIF2-0 serial mode. Mode DIF2 (SW1_4) DIF2 DIF1 (SW1_3) DIF1 DIF0 (SW1_2) DIF0 DAUX 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, Left justified 24bit, 24bit, Left justified 24bit, SDTO 16bit, Right justified 18bit, Right justified 20bit, Right justified 24bit, Right justified 24bit, Left justified 24bit, 24bit, Left justified 24bit, LRCK 64fs 64fs 64fs 64fs 64fs 64fs 64128fs 64128fs BICK Default
Default
Table Audio data format Set-up operation mode selected CM0. parallel mode, selected SW3_1 JP18. serial mode, selected CM1-0 bits. (SW3_1) (JP18) (CM0="L") (CDTO/CM0="H") (CM0="L") (Note) Clock source (RX) X'tal (RX) X'tal SDTO source DAUX DAUX Default
(UNLOCK)
X'tal
X'tal DAUX (CDTO/CM0="H") Oscillation (Power-up), OFF: STOP (Power-Down) Note: When X'tal used clock comparison detection (XTL0, "1,1"), X'tal OFF. Table Clock Operation Mode Select
<KM080200>
2005/10
[AKD4112B-B]
Evaluation S/PDIF (optical BNC)- AK4112B S/PDIF (optical BNC) Set-up Bi-phase output signal only loop back mode corresponds. serial mode, selected OPS1-0 bits. This mode supported parallel mode. Connector JP13 (TX) Optical (PORT4) (J4) Table Set-up
Serial control
AK4112B controlled printer port (parallel port) IBM-AT compatible Connect PORT6 (uP-I/F) with 10-line flat cable packed with AKD4112B-B. Take care direction connector. There mark pin#1. layout PORT6 Figure
Mode Parallel Serial
SW1_6 JP18 CDTO/CM0="H" CM0="L" CM0="L" short Table Set-up parallel mode serial mode
PORT6
Figure PORT6 layout This evaluation board encloses control software. software operation procedure included evaluation board manual.
<KM080200>
CDTO
CCLK
CDTI
2005/10
[AKD4112B-B]
Toggle switch set-up Reset switch AK4112B. during normal operation. Bring once after power supplied.
indication INT0 INT1
Bright when goes "H". Bright when AUTO goes "H".
switch (SW1) set-up: -off- means Switch Function Name IPS0 Don't care DIF0 Set-up DIF0 pin. parallel mode) DIF1 Set-up DIF1 pin. (parallel mode) DIF2 Set-up DIF2 pin. (parallel mode) IPS1/IIC Don't care Set-up P/SN pin. "OFF": Serial mode, "ON": parallel mode P/SN TEST Don't care ACKS Don't care switch (SW3) set-up: -off- means Switch Function Name Set-up pin. (parallel mode) OCKS1 Set-up OCKS1 pin. (parallel mode) OCKS0 Set-up OCKS0 pin. (parallel mode) PSEL Don't care XTL0 Don't care XTL1 Don't care Set-up transmission direction 74AC245 DIR_I/O "OFF": When inputting from PORT2, "ON": When outputting from PORT2 DIT_I/O Don't care
Default
Default
<KM080200>
2005/10
[AKD4112B-B]
Jumper Jumper Name D3V/VD
5,6,7 11,12
RX2-4 MCLK MCLK
SDA/CDTO
(Sub)
RX2/DIF0
(Sub)
RX3/DIF1
(Sub)
RX4/DIF2
Function Set-up Power supply source 74AC245. (default) Set-up input circuit. Optical (default) Set-up RX2-4 input circuit. MCKO set-up PORT5(DIT) PORT2(DIR) MCKO1 MCKO1 AK4112B (default) MCKO2 MCKO2 AK4112B Set-up output circuit. Optical (default) Set-up Serial mode. Parallel: CM0="L"short pin="L" CDTO/CM0="H"short pin="H" Serial CM0="L"short (default) Set-up depending serial/parallel mode RX2: Serial mode (default) DIF0: Parallel mode Set-up depending serial/parallel mode RX3: Serial mode (default) DIF1: Parallel mode Set-up depending serial/parallel mode RX4: Serial mode (default) DIF2: Parallel mode
<KM080200>
2005/10
[AKD4112B-B]
Control Software Manual Set-up evaluation board control software
AKD4112B-B according previous term. Connect IBM-AT compatible with AKD4112B-B 10-line type flat cable (packed with AKD4112B-B). Take care direction 10pin header. (Please install driver CD-ROM when this control software used Windows 2000/XP. Please refer "Installation Manual Control Software Driver device control software". case Windows95/98/ME, this installation needed. This control software does operate Windows NT.) Insert CD-ROM labeled "AKD4112B-B Evaluation Kit" into CD-ROM drive. Access CD-ROM drive double-click icon "akd4396.exe" control program. Then please evaluate according follows.
Operation flow
Keep following flow. control program according explanation above. Click "Port Reset" button.
Explanation each buttons
[Port Reset] [Write default] [All Write] [Function1] [Function3] [Function4] [Function5]: [SAVE] [OPEN] [Write] interface board (AKDUSBIF-A) Initialize register AK4112B. Write registers that currently displayed. Dialog write data keyboard operation. sequence register setting executed. sequence that created [Function3] assigned buttons executed. register setting that created [SAVE] function main window assigned buttons executed. Save current register setting. Write saved values register. Dialog write data mouse operation.
Indication data
Input data indicated register map. letter indicates blue indicates "0". Blank part that defined datasheet.
<KM080200>
2005/10
[AKD4112B-B]
Explanation each dialog [Write Dialog]: Dialog write data mouse operation
There dialogs corresponding each register. Click [Write] button corresponding each register dialog. check check box, data becomes "1". not, "0". want write input data AK4112B, click [OK] button. not, click [Cancel] button.
[Function1 Dialog] Dialog write data keyboard operation
Address Box: Input registers address figures hexadecimal. Data Box: Input registers data figures hexadecimal. want write input data AK4112B, click [OK] button. not, click [Cancel] button.
[Save] [Open] 3-1. [Save]
Save current register setting data. extension file name "akr".
(Operation flow)
Click [Save] Button. file name push [Save] Button. extension file name "akr". 3-2. [Open] register setting data saved [Save] written AK4112B. file type same [Save].
(Operation flow)
Click [Open] Button. Select file (*.akr) Click [Open] Button.
<KM080200>
2005/10
[AKD4112B-B]
[Function3 Dialog]
sequence register setting executed. Click [F3] Button. control sequence. address, Data Interval time. "-1" address step where sequence should paused. Click [Start] button. Then this sequence executed. sequence paused step Interval="-1". Click [START] button, sequence restarts from paused step. This sequence saved opened [Save] [Open] button Function3 window. extension file name "aks".
Figure Window [F3]
<KM080200>
2005/10
[AKD4112B-B]
[Function4 Dialog]
sequence that created [Function3] assigned buttons executed. When [F4] button clicked,
window shown Figure opens.
Figure [F4] window
<KM080200>
2005/10
[AKD4112B-B]
5-1. [OPEN] buttons left side [START] buttons
Click [OPEN] button select sequence file (*.aks). sequence file name displayed shown Figure
Figure [F4] window(2) Click [START] button, then sequence executed.
5-2. [SAVE] [OPEN] buttons right side
[SAVE] sequence file names assign saved. file name *.ak4. [OPEN] sequence file names assign that saved *.ak4 loaded.
5-3. Note
This function doesn't support pause function sequence function. files need same folder used [SAVE] [OPEN] function right side. When sequence changed [Function3], file should loaded again order reflect change.
<KM080200>
2005/10
[AKD4112B-B]
[Function5 Dialog] register setting that created [SAVE] function main window assigned buttons executed. When [F5] button clicked, following window shown Figure 7opens.
Figure [F5] window
6-1. [OPEN] buttons left side [WRITE] button
Click [OPEN] button select register setting file (*.akr).
Click [WRITE] button, then register setting executed.
6-2. [SAVE] [OPEN] buttons right side
[SAVE] register setting file names assign saved. file name *.ak5. [OPEN] register setting file names assign that saved *.ak5 loaded.
6-3. Note
files need same folder used [SAVE] [OPEN] function right side. When register setting changed [Save] Button main window, file should loaded again order reflect change.
<KM080200>
2005/10
[AKD4112B-B]
Revision History Date (YY/MM/DD) 05/10/03 Manual Revision KM080200 Board Revision Reason First Edtion Contents
IMPORTANT NOTICE These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising from said product absence such notification.
<KM080200>
2005/10
INT1
CM1/CDTI/SDA
OCKS0/CSN/CAD
OCKS1/CCLK/SCL
CM0/CDTO/CAD1
INT0
INT0 INT1
0.1u TVDD AVDD V/TX
DVDD CM0/CDTO
DVSS
CM1/CDTI
0.1u TVDD OCKS1/CCLK
P/SN
P/SN MCKO2 MCKO1
11.2896MHz
DAUX
DIF0 JP19 FS96 RX2/DIF0 FS96 TVDD TVDD
DIF2 JP22 RX4/DIF2 AUTO INT1
IPS/RX4
DIF0/RX5
DIF1/RX6
DAUX
BICK
SDTO
MCKO1
MCKO2
LRCK
DIF2/RX7
V/TX
OCKS0/CSN
0.1u AVDD SDTO BICK
AVSS
LRCK
V/TX INT0
DIF1
JP21
RX3/DIF1
P/SN
P/SN
AK4112B
Title Size Date:
AKD4112B-B
Document Number
Tuesday, October 2005 Sheet
PORT1
D3V/VD
AVDD P/SN/ANS ACKS AVDD
0.1u
0.1u0.1u0.1u
0.1u 0.1u
TORX176
0.1u
P/SN/ANS
LP2950A AVDD
ACKS
TVDD/VDD
short
short
TA48M033F DVDD
0.1u
AVDD IPS0
AVDD
short
OVDD
short
short
IPS0 DIF0 DIF1 DIF2/XSEL IPS1/IIC P/SN/ANS TEST ACKS
AVDD
AVDD
IPS0/RX4 DIF0 IPS1/IIC P/SN/ANS TEST ACKS DIF0/RX5 DIF1 JP10 DIF2/XSEL
TEST
TEST
DIF1/RX6
DIF2/XSEL/RX7
DVDD
DVDD
EMCK1
1S1588
74HC14
74HC14
DAUX2
DAUX
EMCK2 DAUX2
100k
0.1u
JP11
MCKO1 MCKO2
MCKO1 MCKO MCKO2
74LVC157
DIT_MCLK DIR_MCLK
D3V/VD PORT2 JP12 MCKO1 MCKO2
OVDD
OVDD
MCLK BICK LRCK SDTO DAUX
100k
100k
D3V/VD
BICK
SDTO
LRCK
74AC245
DIR_I/O
Title Size Date: Document Number
AKD4112B-B
MAIN
Wednesday, June 2005 Sheet
T45_BK T45_BK
VOUT
JP13
PORT4
TVDD/VDD
TVDD
TOTX176
0.1u
DA02-F
OVDD OVDD
EMCK2 EMCK INT0 INT1 CM0/CDTO/CAD1 74LS07 OCKS0/CSN/CAD0 DVDD DVDD IPS1/IIC IPS1/IIC 74LS07
INT0
74HC14
INT1
74HC14
PORT6
74HC14 74HC14
SCL/CCLK SDA/CDTI SDA(ACK)/CDTO
CM1/CDTI/SDA
OCKS1/CCLK/SCL
P/SN/ANS
uP-I/F
CM1/FS1 OCKS1/FS2 OCKS0/FS0 PSEL XTL0/CKS1 XTL1/TRANS DIR_I/O DIT_I/O JP18 CDTO/CM0=H
74LVC157
CM0=L
SDA/CDTO
PSEL D3V/VD
XTL0
XTL1
DIR_I/O DIT_I/O
74LS07
74LS07
74LS07
74LS07
Title Size Date:
AKD4112B-B
Document Number
MAIN
Wednesday, June 2005 Sheet

AKD4112B-B AK4112B Evaluation Board Rev.0 GENERAL DESCRIPTIO

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