AK4707 SCART Switch GENERAL DESCRIPTION AK4707 offers ideal

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AK4707 SCART Switch GENERAL DESCRIPTION AK4707 offers ideal

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[AK4707]
AK4707
SCART Switch
GENERAL DESCRIPTION AK4707 offers ideal features digital set-top-box systems. AK4707 includes audio switches, video switches, etc. designed primarily digital set-top-box systems. AK4707 offered space saving 48-pin LQFP package.
FEATURES Analog switches SCART Audio section THD+N: -86dB (@2Vrms) Dynamic Range: 96dB (@2Vrms) Analog Inputs Full Differential Stereo Input Single-ended input Decoder Stereo Input SCART) Analog Outputs Stereo Outputs SCART) Noise Free Circuit Power on/off Video section 75ohm driver Gain Outputs Four CVBS/Y inputs (ENCx2, VCR), CVBS/Y outputs (TV, VCR) Three inputs (ENCx2, VCR), output (TV) inputs (ENC, VCR), outputs (TV) TV/VCR input monitor Loop-through Mode standby Auto-Startup Mode power saving SCART pin#16 (Fast Blanking), pin#8 (Slow Blanking) Control Power supply 5V+/-5% 12V+/-5% Power Dissipation Power Standby Mode Package Small 48pin LQFP AK4702 Compatible
MS0551-E-00
2006/10
[AK4707]
Block Diagram
DVCOM
-6dB +12dB (3dB/step) AINL+ AINLAMP AINRAINR+ Volume TV1-0 MONO TVOUTR TVOUTL
PVCOM
VCRINL VCRINR
TVINL
VCROUTL VCROUTR VMONO Register Control Bias VCR1-0
TVINR
Audio Block
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[AK4707]
Typical connection
VVD1 VVD2 VVSS1 VVSS2
Typical connection
CVBS/Y CVBS/Y CVBS
ENCV ENCY VCRVIN TVVIN TVVOUT
ENCRC ENCC VCRRC TVRC SCART
G/CVBS
ENCG VCRG
ENCB VCRB Monitor
VCRVOUT
SCART
Video Block
Typical connection Typical connection
VCRFB SCART TVSB TVFB
Monitor
VCRSB
SCART
Video Blanking Block
MS0551-E-00
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[AK4707]
Ordering Guide
AK4707EQ +70°C 48pin LQFP (0.5mm pitch)
Layout
VCRVOUT
AINR+
AINL+
AINR-
AINL-
TVFB
TST1
TST2 VVSS TVVOUT VVD2 TVRC VVD1 ENCB ENCG ENCRC ENCC
View
PVCOM DVCOM TST4 TVOUTL TVOUTR VCROUTL VCROUTR TST3 TVINL TVINR VCRINL
AK4707EQ
VCRVIN
VCRSB
TVVIN
VCRG
ENCV
VCRB
MS0551-E-00
VCRINR
VCRRC
VCRFB
ENCY
TVSB
2006/10
[AK4707]
Main difference between AK4702 AK4707 Items Audio MONO input/ output Video video gain control TV/VCR video input monitor Slow Blanking monitor output mode. TV/VCR CVBS input detection Power Save Mode modulator output output Bi-Directional Control VCR-Red/Chroma Pinout Pin#1 PIN#28 PIN#33 Pin#46 Others speed (max) Mask bits function (09H) FB/SB loop back auto mode.
AK4702 AK4707 Enabled Disabled VCRC TST2 MONOIN MONOOUT input TST1 100kHz 400kHz available. Available
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[AK4707]
PIN/FUNCTION
Name TST2 VVSS TVVOUT VVD2 TVRC VVD1 ENCB ENCG ENCRC ENCC ENCV ENCY TVVIN VCRVIN VCRFB VCRRC VCRG VCRB VCRSB TVSB VCRINR VCRINL TVINR TVINL TST3 VCROUTR VCROUTL TVOUTR TVOUTL TST4 Function Test Mode Input Internal Pull Down 100k Normally connected VSS. Video Ground Composite/Luminance Output Video Power Supply Normally connected VVSS with 0.1µF ceramic capacitor parallel with 10µF electrolytic cap. Red/Chrominance Output Green Output Blue Output Video Power Supply Normally connected VVSS with 0.1µF ceramic capacitor parallel with 10µF electrolytic cap. Blue Input Encoder Green Input Encoder Red/Chrominance Input Encoder Chrominance Input Encoder Composite/Luminance Input Encoder Composite/Luminance Input Encoder Composite/Luminance Input Composite/Luminance Input Fast Blanking Input Red/Chrominance Input Green Input Blue Input Interrupt Video Blanking Slow Blanking Input/Output Slow Blanking Output Audio Input Audio Input Audio Input Audio Input Test Mode Input This should connected VSS. Analog Output Analog Output Analog Output Analog Output Test Mode Input This should connected VSS. Power Supply Pin, Normally connected with 0.1µF ceramic capacitor parallel with 10µF electrolytic cap. Audio Common Voltage Normally connected with 0.1µF ceramic capacitor parallel with 10µF electrolytic cap. Audio Common Voltage Normally connected with 0.1µF ceramic capacitor parallel with 10µF electrolytic cap. caps affect settling time audio bias level. Ground
DVCOM
PVCOM
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[AK4707]
PIN/FUNCTION (Continued)
Name AINR- AINR+ AINL- AINL+ TST1 VCRVOUT TVFB Function Power Supply Pin, Normally connected with 0.1µF ceramic capacitor parallel with 10µF electrolytic cap. Negative Analog Input Positive Analog Input Negative Analog Input Positive Analog Input Control Data Clock Control Data Power-Down Mode When "L", AK4707 power-down mode held reset. AK4707 should always reset upon power-up. Test Mode Input Internal Pull Down 100k Normally connected Composite/Luminance Output Fast Blanking Output
Note: digital input pins should left floating.
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[AK4707]
INTERNAL EQUIVALENT CIRCUIT
Name Type Equivalent Circuit
Description
Digital
AINRAINR+ AINL- AINL+
Audio
150K
Digital
voltage must exceed
VVD1
Digital
Normally connected VD(5V) through resister externally.
VVD2 VVD2
TVVOUT TVRC VCRVOUT TVFB
Video
VVSS
VVSS
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[AK4707]
Name ENCB ENCG ENCRC ENCC ENCV ENCY TVVIN VCRVIN VCRFB VCRRC VCRG VCRB
Type
Equivalent Circuit
Description
VVD1
Video
VVSS
VCRSB TVSB
Video
(120k) VVSS VVSS VVSS
120k attached TVSB.
VCRINR VCRINL TVINR TVINL
150k
Audio
VCROUTR VCROUTL TVOUTR TVOUTL
Audio
DVCOM PVCOM
VCOM
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[AK4707]
ABSOLUTE MAXIMUM RATINGS
(VSS =VVSS Note Parameter Power Supply Symbol VVD1 VVD2 VIND VINV VINA1 VINA2 Tstg -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 VD+0.3 VVD1+0.3 VP+0.3 VD+0.3 Units
(Note
Input Current (any pins except supplies) Input Voltage Video Input Voltage Audio Input Voltage (VCRINR/L, TVINR/L pins) Audio Input Voltage (AINL+/-, AINR+/- pins) Ambient Operating Temperature Storage Temperature
Note voltages with respect ground. Note VVSS must connected same analog ground plane.
WARNING: Operation beyond these limits result permanent damage device. Normal operation guaranteed these extremes.
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[AK4707]
RECOMMENDED OPERATING CONDITIONS
(VSS VVSS Note Parameter Power Supply (Note Symbol VVD1 VVD2 4.75 4.75 4.75 11.4 5.25 5.25 VVD1 12.6 Units
Note voltages with respect ground. Note VVD1 VVD2 must connected same voltage. *AKM assumes responsibility usage beyond conditions this datasheet.
ELECTRICAL CHARACTERISTICS 25°C; 12V, VVD1 VVD2 Power Supplies Power Supply Current Normal Operation (PDN "H") (Note VVD1+VVD2 Power-Down Mode (PDN "L") (Note VVD1+VVD2
Units
Note STBY "0", video outputs active. signal, load switches. Note digital inputs held VSS.
DIGITAL CHARACTERISTICS 25°C; 4.75 5.25V) Parameter Symbol High-Level Input Voltage Low-Level Input Voltage Low-Level Output Voltage (SDA pin: Iout= 3mA, pin: Iout= 1mA) Input Leakage Current
Units
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[AK4707]
ANALOG CHARACTERISTICS (AUDIO) 25°C; 12V, VVD1 VVD2 Signal Frequency 1kHz; Measurement frequency 20Hz 20kHz; 4.5k; 0dB=2Vrms output; unless otherwise specified) Parameter Analog Input: (TVINL/TVINR/VCRINL/VCRINR pins) Analog Input Characteristics Input Voltage Input Resistance Analog Input: (AINL+/AINL-/AINR-/AINR+ pins) Analog Input Characteristics Input Voltage Input Resistance Stereo/Mono Output: (TVOUTL/TVOUTR/VCROUTL/VCROUTR pins) (Note Analog Output Characteristics Volume#0 Step Width THD+N 2Vrms output) (Note Dynamic Range (-60dB Output, A-weighted) (Note (A-weighted) (Note Interchannel Isolation (Note 7,Note Interchannel Gain Mismatch (Note 7,Note Gain Drift Load Resistance (AC-Lord, Note TVOUTL/R, VCROUTL/R Load Capacitance TVOUTL/R, VCROUTL/R Output Voltage 1.85 2.15 Frequency Response 20.0kHz Power Supply Rejection (PSR) (Note
Note Measured Audio Precision System Cascade. Note Analog TVOUT. Path AINL+/- TVOUTL, AINR+/- TVOUTR Note Between TVOUTL TVOUTR with analog inputs AINL+/-, AINR+/-, 1kHz/0dB. Note applied with 1kHz, 100mV. Note THD+N: -80dB(min. 2Vrns)
Units
Vrms
Vrms
ppm/°C Vrms
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[AK4707]
ANALOG CHARACTERISTICS (VIDEO) 25°C; 12V, VVD1 VVD2 unless otherwise specified.) Parameter Conditions Sync Clamp Voltage output pin. Chrominance Bias Voltage output pin. Gain Input 0.3Vp-p, 100kHz Interchannel Gain Mismatch TVRC, TVG, TVB. Input 0.3Vp-p, 100kHz. Frequency Response Input=0.3Vp-p, 100kHz 6MHz Input Impedance Chrominance input (internally biased) Input Signal 100kHz, maximum with distortion 1.0% Load Resistance (Note Load Capacitance (Note (Note Dynamic Output Signal 100kHz, maximum with distortion 1.0% Crosstalk 4.43MHz, 1Vp-p input. Among TVVOUT, TVRC VCRVOUT outputs. Reference Level 0.7Vp-p, CCIR weighting. 15kHz 5MHz. Differential Gain 0.7Vpp 5steps modulated staircase. chrominance &burst 280mVpp, 4.43MHz. Differential Phase 0.7Vpp 5steps modulated staircase. chrominance &burst 280mVpp, 4.43MHz.
Note Refer Figure
Video Signal Output max: 15pF max: 400pF
-0.5 -1.0
Units Degree
Figure Load Resistance R1+R2 Load Capacitance C1/C2.
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[AK4707]
SWITCHING CHARACTERISTICS 25°C; 11.4 12.6V, 4.75 5.25V, VVD1 VVD2 4.75 5.25V) Parameter Symbol Control Interface Timing (I2C Bus): Clock Frequency fSCL Free Time Between Transmissions tBUF Start Condition Hold Time tHD:STA (prior first clock pulse) Clock Time tLOW Clock High Time tHIGH Setup Time Repeated Start Condition tSU:STA Hold Time from Falling (Note tHD:DAT Setup Time from Rising tSU:DAT Rise Time Both Lines Fall Time Both Lines Setup Time Stop Condition tSU:STO Pulse Width Spike Noise Suppressed Input Filter Capacitive load Reset Timing Pulse Width (Note
Note Data must held sufficient time bridge transition time SCL. Note AK4707 should reset upon power Note registered trademark Philips Semiconductors.
Units
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[AK4707]
Timing Diagram
tBUF tHD:STA Stop Start tHD:DAT tSU:DAT tSU:STA Start
mode Timing
tLOW
tHIGH
tSU:STO Stop
Power-down Timing
MS0551-E-00
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[AK4707]
OPERATION OVERVIEW
System Reset Power-down options
AK4707 should reset once bringing upon power-up. AK4707 several operation modes. pin, AUTO bit, BIAS bit, STBY control operation modes shown Table Table Mode Mode Full Power-down Auto Startup mode (Power-on default) Standby Mute Standby Mute (AMP power down) Normal operation (AMP operation) Table Operation Mode Settings Don't Care) Register Control available video input Video input Available Audio Bias Level Power down Video Output Hi-Z TVFB, TVSB Hi-Z VCRSB AUTO STBY BIAS
Mode Full Power-down Auto Startup mode (Power-on default) Standby Mute Standby Mute (AMP power down) Normal operation (AMP operation)
Pull-down
Active Power down Active Power down Active
Active
Active Hi-Z Active
Active
Note Internally pulled down 120k (typ) resistor. Note Video input TVVIN VCRVIN. Note TVOUTL/R muted Mute default state. Table Status each operation modes
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[AK4707]
Full Power-down Mode
AK4707 should reset once bringing upon power-up. pin: Power down Device power down. Normal operation.
Auto Startup Mode
After when "H", AK4707 auto startup mode. this mode, blocks except video detection circuit powered down. Once video detection circuit detects video signal from TVVIN VCRVIN pin, AK4707 goes stand-by mode automatically sends pulse pin. sources TVOUTL/R fixed VCRINL/R, sources VCROUTL/R fixed TVINL/R respectively. source restore circuit VCRVIN pin. exit auto startup mode, AUTO "0". AUTO (00H D3): Auto startup Auto startup disable. (Manual startup) Auto startup enable. (default)
Bias Mode
When BIAS "1", bias voltage audio output goes level. Bringing BIAS changes this bias voltage smoothly from VP/2 2sec (typ.). This removes huge click noise related sudden change bias voltage power-on. change BIAS from also makes smooth transient from VP/2 2sec (typ). This removes huge click noise related sudden change bias voltage power-off. BIAS (00H D1): Bias-off Normal operation. audio bias GND. (default)
Standby Mode
When AUTO BIAS STBY "1", AK4707 forced into TV-VCR loop through mode. this mode, sources TVOUTL/R pins fixed VCRINL/R pins; sources VCROUTL/R fixed TVINL/R pins respectively. register values themselves changed STBY "1". STBY (00H D0): Standby Normal operation. Standby mode. (default)
MS0551-E-00
2006/10
[AK4707]
Normal Operation Mode
change analog switches, AUTO bit, BIAS STBY "0". AK4707 power-down mode until "H". Figure shows example system timing power-down power-up pin.
Typical Operation Sequence (auto setup mode)
Figure shows example system timing auto setup mode.
TVVIN VCRVIN TVVOUT, VCRVOUT Audio (DC)
Power Mode
Power Mode
Power Mode
don't care
Signal
Signal
Signal
Signal
Signal
don't care
don't care
Signal
Signal
Signal
don't care
Hi-Z
Active (loop-through)
Hi-Z
Active (loop-through)
Hi-Z
(GND)
Active (loop-through)
Active (loop-through)
Figure Typical operating sequence (auto setup mode)
Typical Operation Sequence (except auto setup mode)
Figure shows example system timing auto setup mode.
AUTO BIAS STBY TV-Source select (default) (default) (default)
"Stand-by"
"Mute"
"Stand-by"
fixed in(Loop-through)
(default)
fixed in(Loop-through)
Notes: STBY pass 20.2ms after MUTE "0", prevent click noise (1). Mute analog outputs externally click noise affects system. Figure Typical operating sequence (except auto setup mode)
MS0551-E-00
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[AK4707]
Audio Block
Switch Control
AK4707 switch matrixes designed primarily SCART routing. Those controlled control register shown Table Table (Please refer Block Diagram). (01H: D1-D0) Source TVOUTL/R VCRIN (default) Mute (Reserved) Table TVOUT Switch Configuration (01H: D5-D4) VCR1 VCR0 Source VCROUTL/R TVIN (default) Mute (Reserved) Table VCROUT Switch Configuration
Volume Control (7-Level Volume)
AK4707 7-level volume control (Volume shown Table volume reflects change register value immediately.
1Vrms 2Vrms differential input 1Vrms
AINL/R+
0.47µ 0.47µ
2Vrms Volume Gain TVOUTL/R Volume (VCROUTL/R)
AINL/R-
Figure Volume #0(Volume Gain=0dB:default), Full Differential Stereo Input (02H: D5-D3)
Volume Gain Output Level (Typ) +12dB 2Vrms (with 0.5Vrms differential input) +9dB +6dB 2Vrms (with 1Vrms differential input) +3dB 2Vrms (with 2Vrms differential input: default) -3dB -6dB 1Vrms (with 2Vrms differential input) Mute Table Volume Full Differential Stereo Input
MS0551-E-00
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[AK4707]
1Vrms
1Vrms AINL/R+
0.47µ
Volume Gain TVOUTL/R Volume (VCROUTL/R)
AINL/R0.47µ
Figure Volume #0(Volume Gain=0dB:default), Single-ended Input (02H: D5-D3) VOL2 VOL1
VOL0
Volume Gain +12dB +9dB +6dB +3dB -3dB -6dB Mute
Output Level (Typ) 2Vrms (with 0.5Vrms input) 2Vrms (with 1Vrms input) 1Vrms (with 1Vrms input: default) 0.5Vrms (with 1Vrms input)
Table Volume Single-ended Input
MUTE Control
minimize click noise setting MUTE "1", AK4707 zero-cross detection. When ZERO "1", zero-cross detection function enabled. TVOUTL/R outputs analog common voltage input signal first zero-cross point from setting MUTE when zero-cross detected within time ZTM1-0 bits (12.8msec 102.4msec). TVOUTL/R outputs TV1-0 switch input signal first zero-cross point from setting MUTE when zero-cross detected within time ZTM1-0 bits. zero-cross detected channels TV1/0 selector independently. disable this function, ZERO "0". ZERO: Zero-cross detection enable TV1/0 selector Disable Enable (default)
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[AK4707]
Video Block
Video Switch Control
AK4707 switches VCR. Each switch controlled registers independently. When AUTO STBY "1", these switches setting ignored fixed configuration (loop-through mode). Refer auto setup mode standby mode. (04H: D2-D0) Mode Shutdown Encoder CVBS /RGB Encoder Encoder (default) CVBS (Reserved) (Reserved) VTV2-0 Source Source Source TVVOUT TVRC (Hi-Z) (Hi-Z) (Hi-Z) ENCV ENCRC ENCG (Encoder CVBS) (Encoder Red,C) (Encoder Green) ENCV ENCRC Hi-Z (Encoder (Encoder ENCY ENCC Hi-Z (Encoder (Encoder VCRVIN VCRG VCRRC (VCR CVBS) (VCR Green) (VCR Red,C) TVVIN (Hi-Z) (Hi-Z) CVBS) Table video output (Refer Note 18.) Source (Hi-Z) ENCB (Encoder Blue) (Hi-Z) (Hi-Z) VCRB (VCR Blue) (Hi-Z)
(04H: D5-D3) Source VCRVOUT Shutdown (Hi-Z) ENCV Encoder CVBS (Encoder CVBS) ENCY Encoder CVBS (Encoder CVBS) TVVIN CVBS (default) CVBS) VCRVIN (VCR CVBS) (Reserved) (Reserved) (Reserved) Table video output (Refer Note 18.) Mode VVCR2-0 Note When input video signal ENCRC VCRRC pin, CLAMP1-0 bits respectively.
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[AK4707]
Video Output Control (05H: D6-D0)
Each video output Hi-Z individually control registers. These settings ignored when AUTO "1". TVV: TVVOUT output control TVR: TVRCOUT output control TVG: TVGOUT output control TVB: TVBOUT output control VCRV: VCRVOUT output control TVFB: TVFB output control Hi-Z. (default) Active.
Clamp DC-restore circuit control (06H: D6-D5, D3-D2)
Each CVBS input sync clamp circuit. sync voltage each output 0.7V (typ). This corresponds 0.35V (typ) SCART connector when matched resistors. CLAMP1-0 bits select input circuit ENCRC (Encoder Red/Chroma) VCRRC (VCR Red/Chroma) respectively. VCLP1-0 bits select source DC-restore circuit. CLAMP1: Encoder Red/Chroma (ENCRC pin) input clamp control restore clamp active (for signal. default) Biased (for Chroma signal) CLAMP0: (VCRRC pin) input clamp control restore clamp active (for signal) Biased (for Chroma signal. default) VCLP1-0: restore source control When AUTO "1", source fixed VCRVIN. VCLP1 VCLP0 Sync Source Restore ENCV (default) ENCY VCRVIN (Reserved) Table restore source control
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[AK4707]
Blanking Control
AK4707 supports Fast Blanking signals Slow Blanking (Function Switching) signals TV/VCR SCART.
Input/Output Control Fast/Slow Blanking
FB1-0: Fast Blanking output control (07H: D1-D0) TVFB Output Level (default) 2V<, 4V(typ) load Same input (4V/0V) (Reserved) Table Fast Blanking output (Note: minimum load 150) SBT1-0: Slow Blanking output control (07H: D3-D2) SBT1 SBT0 TVSB Output Level (default) (Reserved) Table Slow Blanking output (Note: minimum load 10k) SBV1-0: Slow Blanking output control (07H: D5-D4) SBV1 SBV0 VCRSB Output Level (default) (Reserved) Table Slow Blanking output (Note: minimum load 10k) SBIO1-0: TV/VCR Slow Blanking control (07H: D7-D6) SBIO1 SBIO0 VCRSB Direction TVSB Direction Output Output (Controlled SBV1-0 bits) (Controlled SBT1-0 bits) (Reserved) (Reserved) Input Output (Stored SVCR1-0 bits) (Controlled SBT1-0 bits) Input Output (Stored SVCR1-0 bits) (Same output Table TV/VCR Slow Blanking control
(default)
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[AK4707]
Monitor Options function
Monitor Options (08H: D4-D0)
AK4707 several detection functions. SVCR1-0 bits, FVCR bit, VCMON TVMON reflect input level slow blanking, input level fast blanking signals input TVVIN VCRVIN pins. SVCR1-0: Slow blanking status monitor SVCR1-0 bits reflect voltage VCRSB only when VCRSB input mode. When VCRSB output mode, SVCR1-0 bits hold previous value. VCRSB input level SVCR1 SVCR0 4.5V (Reserved) 9.5V Table Slow Blanking monitor FVCR: Fast blanking input level monitor This enabled when TVFB "1". VCRFB input level FVCR 0.4V Table Fast Blanking monitor (Typical threshold 0.7V)
VCMON: VCRVIN video input monitor (MCOMN "1"), TVVIN VCRVIN video input monitor (MCOMN "0") video signal detected. Detects video signal. TVMON: TVVIN video input monitor (active when MCOMN "1") video signal detected. Detects video signal.
AUTO (00H MCOMN (09H TVVIN signal VCRVIN signal TVMON (08H VCMON (08H
*:don't care, Note TVVIN/VCRVIN signal: signal signal applied, signal signal applied Table TV/VCR Monitor Function
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[AK4707]
Function Mask Options (09H: D3-D1)
Changes status monitored pin. open drain output goes (typ.) when status changed. This should connected (typ. through 10kohm resistor. bit, bit, MCOMN bit, MFVCR MSVCR control reflection status change these monitors onto from report prevent masks each monitor.
AK4707
R=10k
Figure MVC: VCMON Mask. Refer Table MTV: TVMON Mask. Refer Table MCOMN: Refer Table AUTO (00H TVMON (08H (09H Change Hi-Z Change Hi-Z Change Generates Pulse Change Hi-Z Change Hi-Z Change Hi-Z Note When STBY "0", Monitor Mask function enabled. Note When AUTO "1", TVMON does change. Table Monitor Mask VCMON (08H Change Change Change Change (09H Hi-Z Hi-Z Generates Pulse Hi-Z
AUTO (00H
Change Hi-Z Change Hi-Z Change Generates Pulse Change Generates Pulse Note When STBY "0", Monitor Mask function enabled. Table Monitor Mask MFVCR: FVCR Monitor mask. Change FVCR reflected pin. (default) Change FVCR reflected pin. MSVCR: SVCR1-0 Monitor mask Change SVCR1-0 reflected pin. (default) Change SVCR1-0 reflected pin.
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[AK4707]
Control Interface
I2C-bus Control Mode WRITE Operations Figure shows data transfer sequence I2C-bus mode. commands preceded START condition. HIGH transition line while HIGH indicates START condition (Figure 13). After START condition, slave address sent. This address 7bits long followed eighth that data direction (R/W). most significant seven bits slave address fixed "0010001". slave address match that AK4707, AK4707 generates acknowledge operation executed. master must generate acknowledge-related clock pulse release line (HIGH) during acknowledge clock pulse (Figure 15). indicates that read operation executed. indicates that write operation executed. second byte consists address control registers AK4707. format first, those most significant 3-bits fixed zeros (Figure data after second byte contain control data. format first, 8bits (Figure 10). AK4707 generates acknowledge after each byte been received. data transfer always terminated STOP condition generated master. HIGH transition line while HIGH defines STOP condition (Figure 13). AK4707 execute multiple byte write operations sequence. After receipt third byte, AK4707 generates acknowledge, awaits next data again. master transmit more than byte instead terminating write cycle after first data byte transferred. After receipt each data, internal address counter incremented one, next data taken into next address automatically. address exceeds prior generating stop condition, address counter will "roll over" previous data will overwritten. data line must stable during HIGH period clock. HIGH state data line only change when clock signal line (Figure except START STOP condition.
Data(n) Data(n+1) Data(n+x)
R/W=
Slave Address
Address(n)
Figure Data transfer sequence I2C-bus mode
Figure first byte
Figure second byte
Figure Byte structure after second byte
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[AK4707]
READ Operations READ operations. After transmission data, master read next address's data generating acknowledge instead terminating write cycle after receipt first data word. After receipt each data, internal address counter incremented one, next data taken into next address automatically. address exceeds prior generating stop condition, address counter will "roll over" previous data will overwritten. AK4707 supports basic read operations: CURRENT ADDRESS READ RANDOM READ. 2-1. CURRENT ADDRESS READ AK4707 contains internal address counter that maintains address last word accessed, incremented one. Therefore, last access (either read write) address next CURRENT READ operation would access data from address n+1. After receipt slave address with "1", AK4707 generates acknowledge, transmits 1byte data which address internal address counter increments internal address counter master does generate acknowledge data generate stop condition, AK4707 discontinues transmission.
R/W= Data(n+1) Data(n+2) Data(n+x)
Slave Address
Data(n)
Figure CURRENT ADDRESS READ 2-2. RANDOM READ Random read operation allows master access memory location random. Prior issuing slave address with "1", master must first perform "dummy" write operation. master issues start condition, slave address (R/W "0") then register address read. After register's address acknowledge, master immediately reissues start condition slave address with "1". Then AK4707 generates acknowledge, 1-byte data increments internal address counter master does generate acknowledge data generate stop condition, AK4707 discontinues transmission.
Slave Address Data(n+1) Data(n+x)
R/W=
R/W=
Slave Address
Address(n)
Data(n)
Figure RANDOM ADDRESS READ
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[AK4707]
start condition stop condition
Figure START STOP conditions
DATA OUTPUT TRANSMITTER acknowledge DATA OUTPUT RECEIVER acknowledge FROM MASTER clock pulse acknowledgement
START CONDITION
Figure Acknowledge I2C-bus
data line stable; data valid
change data allowed
Figure transfer I2C-bus
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[AK4707]
Register
Addr Register Name Control Switch Main Volume Zerocross Video switch Video output enable Video clamp Blanking control Blanking monitor Monitor mask MUTE SBIO1 MCOMN VMONO TVFB VCLP1 SBIO0 VCR1 VVCR2 VCLP0 SBV1 VCR0 VVCR1 VCRV SBV0 TVMON AUTO MONO VVCR0 CLAMP1 SBT1 VCMON ZERO VTV2 CLAMP0 SBT0 FVCR MFVCR BIAS ZTM1 VTV1 SVCR1 MSVCR STBY ZTM0 VTV0 SVCR0
When goes "L", registers initialized their default values. While "H", registers accessed. write data register over 09H.
Register Definitions
Addr Register Name Control Default AUTO BIAS STBY
STBY: Standby control Normal Operation Standby Mode (default). registers initialized. Source TVOUT fixed VCRIN, Source VCROUT fixed TVIN Source TVVOUT fixed VCRVIN Hi-Z), Source TVRC fixed VCRRC Hi-Z), Source fixed VCRG Hi-Z), Source fixed VCRB Hi-Z), Source VCRVOUT fixed TVVIN Hi-Z), Source TVFB fixed VCRFB Hi-Z), Source TVSB fixed VCRSB.
BIAS: Audio output control Normal operation Audio outputs (default) AUTO: Auto startup Auto startup disable (Manual startup). Auto startup enable (default). Note When SBIO1 "1"(default "0"), change AUTO cause pulse pin.
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[AK4707]
Addr
Register Name Switch Default
MUTE
VCR1
VCR0
MONO
TV1-0: TVOUTL/R pins source switch VCRINL/R pins (default) MUTE Reserved MONO: Mono select TVOUTL/R pins Stereo. (default) Mono. (L+R)/2 VCR1-0: VCROUTL/R pins source switch TVINL/R pins (default) MUTE Reserved MUTE: Mute switch Normal operation Mute (default) When Mute "1", TVOUTL/R outputs VCOM voltage after TVOUTL/R output zero-crossing (ZERO bit= "1"). MUTE bit= pass 100ms after setting pin="H".
Addr
Register Name Main volume Default
L2-0: Volume control Those registers control both Volume 111: Volume gain +12dB 110: Volume gain +9dB 101: Volume gain +6dB 100: Volume gain +3dB 011: Volume gain +0dB (default) 010: Volume gain -3dB 001: Volume gain -6dB 000: MUTE
MS0551-E-00
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[AK4707]
Addr
Register Name Zerocross Default
VMONO
ZERO
ZTM1
ZTM0
ZTM1-0: time length control zero-cross timeout typ. 12.8ms, max. 20.2ms (default) typ. 25.6ms typ. 51.2ms typ. 102.4ms ZERO: Zero-cross detection enable TVOUT output Disable TVOUTL/R outputs VCOM voltage immediately without zero-cross when MUTE "1". TVOUTL/R outputs TV1-0 switch immediately without zero-cross when MUTE "0". Enable (default) TVOUTL/R outputs VCOM voltage when timeout zero-cross before timeout when MUTE "1". TVOUTL/R outputs TV1-0 switch when timeout zero-cross before timeout when MUTE "0". VMONO: Mono select VCROUTL/R pins Stereo. (default) Mono. (L+R)/2
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[AK4707]
Addr
Register Name Video switch Default
VVCR2
VVCR1 VVCR0
VTV2
VTV1
VTV0
VTV2-0: Selector video output Refer Table VVCR2-0: Selector video output Refer Table
Addr
Register Name Output Enable Default
TVFB
VCRV
TVV: TVVOUT output control TVR: TVRCOUT output control TVG: TVGOUT output control TVB: TVBOUT output control VCRV: VCRVOUT output control TVFB: TVFB output control Hi-Z (default) Active.
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[AK4707]
Addr
Register Name Video Clamp Default
VCLP1
VCLP0
CLAMP1
CLAMP0
CLAMP1: Encoder R/Chroma (ENCRC pin) input clamp control restore clamp active (for signal. default) Biased (for Chroma signal.) CLAMP0: (VCRC pin) input clamp control restore clamp active (for signal) Biased (for Chroma signal. default.) VCLP1-0: restore source control ENCV (default) ENCY VCRVIN (Reserved) When AUTO "1", source fixed VCRVIN pin.
Addr
Register Name Blanking Default
SBIO1
SBIO0
SBV1
SBV0 SBT1
SBT0
FB1-0: Fast Blanking output control (for TVFB pin) (default) 2V<, 4V(typ.) load follow input (4V/0V) (Reserved) SBT1-0: Slow Blanking output control (for TVSB pin. minimum load 10k.) (default) (Reserved) SBV1-0: Slow Blanking output control (for VCRSB pin. minimum load 10k.) (default) (Reserved) SBIO1-0: TV/VCR Slow Blanking control Refer Table
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[AK4707]
Addr
Register Name SB/FB monitor Default
TVMON VCMON READ
FVCR
SVCR1
SVCR0
SVCR1-0: Slow blanking status monitor SVCR1-0 bits reflect voltage VCRSB only when VCRSB input mode. When VCRSB output mode, SVCR1-0 bits hold previous value. VCRSB input level SVCR1 SVCR0 4.5V (Reserved) 9.5V Table Slow Blanking monitor FVCR: Fast blanking input level monitor This enabled when TVFB "1". VCRFB input level FVCR 0.4V Table Fast Blanking monitor (Typical threshold 0.7V) VCMON: TVMON: Refer Table
Addr
Register Name Monitor mask Default
MCOMN
MFVCR
MSVCR
MSVCR: SVCR1-0 bits Monitor mask reflects change SVCR1-0 bit. (default) does reflect change SVCR1-0 bits. MFVCR: FVCR Monitor mask reflects change FVCR bit. (default) does reflect change FVCR bit. MVC: input monitor mask Refer Table MTV: input monitor mask Refer Table MCOMN: Monitor mask option Refer Table
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[AK4707]
SYSTEM DESIGN
Figure Figure shows system connection diagram example. evaluation board available which demonstrates application circuits, optimum layout, power supply arrangements measurement results.
Audio
0.47u
0.47u
0.47u
0.47u
0.1u
VCRVOUT
TST1
AINL+
AINL-
AINR+
AINR-
TVFB
0.1u
0.1u
0.1u 0.1u
VVSS TVVOUT VVD2
DVCOM TST4
0.1u
TST2
PVCOM
Analog
TVRC VVD1 0.1u 0.1u 0.1u 0.1u ENCB ENCG ENCRC VCRVIN
AK4707EQ
TVOUTL TVOUTR VCROUTL VCROUTR TST3 TVINL TVINR TVSB VCRINR
220k 220k 220k 220k 0.47u 0.47u 0.47u
Video
controller
VCRRC
DACL DACR
MPEG decoder
VCRSB
VCRFB
ENCC TVVIN ENCV ENCY
VCRG
VCRINL
VCRB
Digital Ground
Analog Ground
Figure Typical Connection Diagram (Full Differential Stereo Input)
MS0551-E-00
SCART
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
encoder
VIDEO
0.47u
SCART
Micro
2006/10
[AK4707]
Audio
0.47u
0.47u
0.47u
0.47u
0.1u
VCRVOUT
TST1
AINL+
AINL-
AINR+
AINR-
TVFB
0.1u
0.1u
0.1u 0.1u
VVSS TVVOUT VVD2
DVCOM TST4
0.1u
TST2
PVCOM
Analog
TVRC VVD1 0.1u 0.1u 0.1u 0.1u ENCB ENCG ENCRC VCRVIN
AK4707EQ
TVOUTL TVOUTR VCROUTL VCROUTR TST3 TVINL TVINR TVSB VCRINR
220k 220k 220k 220k 0.47u 0.47u 0.47u
Video
controller
VCRRC
DACL DACR
MPEG decoder
VCRSB
VCRFB
ENCC TVVIN ENCV ENCY
VCRG
VCRINL
VCRB
Digital Ground
Analog Ground
Figure Typical Connection Diagram (Single-ended Input
MS0551-E-00
SCART
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
0.1u
encoder
VIDEO
0.47u
SCART
Micro
2006/10
[AK4707]
Grounding Power Supply Decoupling
VVD1, VVD2, VVSS should supplied from analog supply unit with impedance separated from system digital supply. electrolytic capacitor 10µF parallel with 0.1µF ceramic capacitor should attached these pins eliminate effects high frequency noise. 0.1µF ceramic capacitor should placed near VVD1, VVD2 possible.
Voltage Reference
Each DVCOM/PVCOM signal ground this chip. electrolytic capacitor 10µF parallel with 0.1µF ceramic capacitor should attached these VCOM pins eliminate effects high frequency noise. load current drawn from these VCOM pins. signals, especially clocks, should kept away from these VCOM pins order avoid unwanted coupling into AK4707.
Analog Audio Outputs
analog outputs also single-ended centered 5.6V(typ.). output signal range typically 2Vrms. voltage analog outputs eliminated coupling.
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[AK4707]
External Circuit Example
Analog Audio Input
300ohm TVINL/R VCRINL/R (Cable) 0.47µF
Analog Audio Input
0.47µF
AINR+ AINRAINL+ AINL-
Analog Audio Output
TVOUTL/R VCROUTL/R 10µF 300ohm (Cable)
Total 4.5kohm
Analog Video Input
ENCV, ENCY, VCRVIN, TVVIN, ENCRC, ENCC, VCRRC, ENCG, VCRG, ENCB, VCRB
75ohm
(Cable) 75ohm
0.1µF
Analog Video Output
75ohm
TVVOUT, TVRC TVG, TVR, TVB, VCRVOUT 15pF
(Cable) 400pF 75ohm
MS0551-E-00
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[AK4707]
Slow Blanking
TVSB VCRSB 400ohm
(max 500ohm)
(Cable) (with 400ohm) min:
Fast Blanking Input
VCRFB 75ohm (Cable) 75ohm
Fast Blanking Output
75ohm TVFB (Cable) 75ohm
MS0551-E-00
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[AK4707]
PACKAGE
48pin LQFP(Unit:mm)
1.70Max 0.13 0.13 1.40 0.05
0.22 0.08
0.145 0.05 0.10
0.10
Package Lead frame material
Package molding compound: Lead frame material: Lead frame surface treatment: Epoxy Solder free) plate
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[AK4707]
MARKING
AK4707EQ XXXXXXX
XXXXXXXX: Date code identifier
Revision History
Date (YY/MM/DD) 06/10/16 Revision Reason First Edition Page Contents
MS0551-E-00
2006/10
[AK4707]
IMPORTANT NOTICE
These products their specifications subject change without notice. Before considering application, consult Asahi Kasei Microsystems Co., Ltd. (AKM) sales office authorized distributor concerning their current status. assumes liability infringement patent, intellectual property, other right application information contained herein. export these products, devices systems containing them, require export license other official approval under regulations country export pertaining customs tariffs, currency exchange, strategic materials. products neither intended authorized critical components safety, life support, other hazard related device system, assumes responsibility relating such use, except with express written consent Representative Director AKM. used here: hazard related device system designed intended life support maintenance safety applications medicine, aerospace, nuclear energy, other fields, which failure function perform reasonably expected result loss life significant injury damage person property. critical component whose failure function perform reasonably expected result, whether directly indirectly, loss safety effectiveness device system containing which must therefore meet very high standards performance reliability. responsibility buyer distributor product distributes, disposes otherwise places product with third party notify that party advance above content conditions, buyer distributor agrees assume responsibility liability hold harmless from claims arising from said product absence such notification.
MS0551-E-00
2006/10

AK4707 SCART Switch GENERAL DESCRIPTION AK4707 offers ideal

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