Light Management Unit POWER MANAGEMENT Features Input supply

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Light Management Unit POWER MANAGEMENT Features Input supply

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SC624A
Light Management Unit
POWER MANAGEMENT Features
Input supply voltage range 3.0V 5.5V Charge pump modes 1.5x Four programmable current sinks with steps from 0.5mA 25mA user-configurable 100mA low-noise regulators Charge pump frequency 250kHz compatible interface 400kHz Backlight current accuracy ±1.5% typical Backlight current matching ±0.5% typical Programmable fade-in/fade-out main backlight Automatic sleep mode (LEDs 100A shutdown current 0.1A (typical) Ultra-thin package 0.6mm Fully WEEE RoHS compliant
Charge Pump, LEDs, Dual LDOs, Interface Description
SC624A high efficiency charge pump driver using Semtech's proprietary mAhXLifetechnology. Performance optimized single-cell Li-ion battery applications. charge pump provides backlight current conjunction with four matched current sinks. load supply conditions determine whether charge pump operates 1.5x, mode. optional fading feature that gradually adjusts backlight current provided simplify control software. SC624A also provides low-dropout, low-noise linear regulators powering camera module other peripheral circuits. SC624A uses compatible serial interface. interface controls functions device, including backlight current voltage outputs. sleep mode, device reduces quiescent current 100A while continuing monitor serial interface. LDOs enabled when device sleep mode. Total current reduces 0.1A shutdown.
Applications
Cellular phone backlighting backlighting Camera core power
Typical Application Circuit
MAIN BACKLIGHT VBAT Data Clock CBYP 22nF AGND PGND C1BL C2C2 CLDO1 VLDO1 2.5V 3.3V VLDO2 1.5V 1.8V CLDO2 VOUT
SC624A
COUT 2.2F
Enable Control
Patents: 6,504,422; 6,794,926 June 2007 2007 Semtech Corporation
SC624A
Configuration Ordering Information
Device
C1VIN VOUT
Package
MLPQ-UT-20 Evaluation Board
SC624AULTRT(1)(2) SC624AEVB
C2PGND
LDO1 LDO2
VIEW
Notes: Available tape reel only. reel contains 3,000 devices. Available lead-free package only. Device WEEE RoHS compliant.
AGND
MLPQ-UT-20; 3x3, LEAD 35°C/W
Marking Information
yyww Date Code xxxx Semtech
624A yyww xxxx
SC624A
Absolute Maximum Ratings
-0.3 +6.0 VOUT -0.3 +6.0 C1+, -0.3 (VOUT 0.3) Voltage Other Pins -0.3 (VIN 0.3) VOUT Short Circuit Duration Continuous VLDO1, VLDO2 Short Circuit Duration. Continuous Protection Level(1) (kV)
Recommended Operating Conditions
Ambient Temperature Range (°C) VOUT VOUT 5.25 Voltage Difference between LEDs
Thermal Information
Thermal Resistance, Junction Ambient(2) (°C/W) Maximum Junction Temperature (°C) +150 Storage Temperature Range (°C) +150 Peak Reflow Temperature (10s 30s) (°C) +260
Exceeding above specifications result permanent damage device device malfunction. Operation outside parameters specified Electrical Characteristics section recommended. NOTES: Tested according JEDEC standard JESD22-A114-B. Calculated from package still air, mounted 4.5", layer with thermal vias under exposed JESD51 standards.
Electrical Characteristics
Unless otherwise noted, +25°C Typ, +85°C Max, TJ(MAX) 3.0V 4.2V, CIN= 2.2F, COUT 4.7F (ESR 0.03), 1.2V(1)
Parameter
Supply Specifications Shutdown Current
Symbol
Conditions
Units
IQ(OFF)
Shutdown, 4.2V Sleep (LDOs Sleep (LDOs on), VIN, (VLDO 300mV), ILDO 200mA
4.65 5.85 5.85
Total Quiescent Current
Charge pump mode, backlights Charge pump 1.5x mode, backlights Charge pump mode, backlights
Fault Protection Output Short Circuit Current Limit Over-Temperature IOUT(SC) TOTP VOUT shorted
SC624A
Electrical Characteristics (continued)
Parameter
Fault Protection (continued) Charge Pump Over-Voltage Protection VOVP VUVLO Undervoltage Lockout VUVLO-HYS Charge Pump Electrical Specifications Maximum Total Output Current Backlight Current Setting Backlight Current Accuracy Backlight Current Matching Mode 1.5x Mode Falling Transition Voltage 1.5x Mode Mode Hysteresis 1.5x Mode Mode Falling Transition Voltage Mode 1.5x Mode Hysteresis Current Sink Off-State Leakage Current Pump Frequency Electrical Specifications LDO1 Voltage Setting VLDO1 VLDO2 VLDO1, VLDO2 Range nominal settings 100mV increments Range nominal settings 100mV increments 3.7V, ILDO LDO1, ILDO1 1mA, VOUT 2.8V Line Regulation VLINE LDO2, ILDO2 1mA, VOUT 1.8V IOUT(MAX) IBL_ACC IBL-BL TRANS1x VHYST1x TRANS1.5x VHYST1.5x IBLn fPUMP 3.4V, active currents, VOUT(MAX) 4.2V Nominal setting thru 3.7V, 12mA, 25°C 3.7V, 12mA(2) IOUT 40mA, IBLn 10mA, VOUT 3.2V IOUT 40mA, IBLn 10mA, VOUT 3.2V IOUT 40mA, IBLn 10mA, VOUT 4.0V(3) IOUT 40mA, IBLn 10mA, VOUT 4.0V(3) VBLn 4.2V 3.2V -3.5 ±1.5 ±0.5 3.27 +3.5 VOUT open circuit, VOUT VOVP rising threshold Decreasing
Symbol
Conditions
Units
2.92
LDO2 Voltage Setting LDO1, LDO2 Output Voltage Accuracy
-3.5
+3.5
SC624A
Electrical Characteristics (continued)
Parameter Symbol Conditions Units
Electrical Specifications (continued) VLDO1 3.3V, 3.7V, ILDO1 VLDO2 1.8V, 3.7V, ILDO2 ILDO1 100mA 2.5V VLDO1 1kHz, CBYP 22nF, ILDO1 50mA, 3.7V with 0.5VP-P ripple 1kHz, CBYP 22nF, ILDO2 50mA, 3.7V with 0.5VP-P ripple LDO1, 10Hz 100kHz, CBYP 22nF, CLDO ILDO1 3.7V, 2.5V VLDO1 LDO2, 10Hz 100kHz, CBYP 22nF, CLDO ILDO2 3.7V
Load Regulation
VLOAD
Dropout Voltage(4) Current Limit
ILIM PSRRLDO1 PSRRLDO2 en-LDO1
Power Supply Rejection Ratio
VRMS
Output Voltage Noise en-LDO2 Minimum Output Capacitor CLDO(MIN)
Digital Electrical Specifications (EN) Input High Threshold Input Threshold Input High Current Input Current 5.5V 3.0V 5.5V 5.5V
Interface
Interface complies with slave mode interface described Philips specification version dated January, 2000. VB-IL Digital Input Voltage VB-IH Output Level Digital Input Current Hysteresis Schmitt Trigger Inputs Maximum Glitch Pulse Rejection IB-IN VHYS IDIN (SDA) -0.2
SC624A
Electrical Characteristics (continued)
Parameter
Interface (Continued) Capacitance Timing Clock Frequency Period(5) High Period(5) Data Hold Time(5) Data Setup Time(5) Setup Time Repeated START Condition(5) Hold Time Repeated START Condition(5) Setup Time STOP Condition(5) Bus-Free Time Between STOP START(5) Interface Start-up Time(5) fSCL tLOW tHIGH tHD_DAT tSU_DAT tSU_STA tHD_STA tSU_STO tBUF Start-up Time After Pulled High
Symbol
Conditions
Units
Notes: voltage difference between LEDs. Current matching equals [IBL(MAX) IBL(MIN] [IBL(MAX) IBL(MIN)]. Test voltage VOUT 4.0V relatively extreme voltage force transition during test. Typically VOUT 3.2V white LEDs. Dropout defined (VIN VLDO1) when VLDO1 drops 100mV from nominal. Dropout does apply LDO2 since maximum output voltage 1.8V. Guaranteed design
SC624A
Typical Characteristics
Battery Current LEDs) 25mA Each
VOUT=3.66V, IOUT=100mA, 25°C
Battery Current LEDs) 12mA Each
VOUT=3.50V, IOUT=48mA, 25°C
Battery Current (mA)
Battery Current (mA)
Backlight Efficiency LEDs) 25mA Each
VOUT=3.66V, IOUT=100mA, 25°C
Backlight Efficiency LEDs) 12mA Each
VOUT=3.50V, IOUT=48mA, 25°C
Efficiency
Efficiency
Battery Current LEDs) 5.0mA Each
VOUT=3.33V, IOUT=20mA, 25°C
Backlight Efficiency LEDs) 5.0mA Each
VOUT=3.33V, IOUT=20mA, 25°C
Battery Current (mA)
Efficiency
SC624A
Typical Characteristics (continued)
PSRR Frequency (LDO1)
PSRR (dB)
PSRR Frequency (LDO2)
PSRR (dB)
VIN=3.7V 25°C, ILDO1=50mA, VLDO1=2.8V
VIN=3.7V 25°C, ILDO2=50mA, VLDO2=1.8V
Frequency (Hz) 1000 10000
Frequency (Hz)
1000
10000
Noise Load Current (LDO1)
VLDO1=2.8V, VIN=3.7V, 25°C
Noise Load Current (LDO2)
VLDO2=1.8V, VIN=3.7V, 25°C
Noise
Noise
ILDO1 (mA)
ILDO2 (mA)
SC624A
Typical Characteristics (continued)
Load Regulation (LDO1)
VLDO1=3.3V, VIN=3.7V, 25°C
Load Regulation (LDO2)
VLDO2=1.8V, VIN=3.7V, 25°C
Output Voltage Variation (mV)
Output Voltage Variation (mV)
ILDO1(mA)
ILDO2(mA)
Line Regulation (LDO1)
VLDO1=2.8V, ILDO1=1mA, 25°C
Line Regulation (LDO2)
VLDO2=1.8V, ILDO2=1mA, 25°C
Output Voltage Variation (mV)
Output Voltage Variation (mV)
SC624A
Typical Characteristics (continued)
Load Transient Response (LDO1) Rising Edge
VIN=3.7V, VLDO1=2.8V, ILDO1=1 100mA VLDO1 (50mV/div) VLDO2 (50mV/div)
Load Transient Response (LDO2) Rising Edge
VIN=3.7V, VLDO2=1.8V, ILDO2=1 100mA
ILDO1 (100mA/div) Time (20s/div)
ILDO2 (100mA/div) Time (20s/div)
Load Transient Response (LDO1) Falling Edge
VIN=3.7V, VLDO1=2.8V, ILDO1=100
Load Transient Response (LDO2) Falling Edge
VIN=3.7V, VLDO2=1.8V, ILDO2=100
VLDO1 (50mV/div) VLDO2 (50mV/div)
ILDO1 (100mA/div) ILDO2 (100mA/div)
Time (200s/div)
Time (200s/div)
Output Short Circuit Current Limit
VOUT=0V, VIN=4.2V, 25°C VBL1 (500mV/div) VOUT (1V/div) VOUT (2V/div)
Output Open Circuit Protection
VIN=3.7V, 25°C
IOUT (100mA/div)
IBL1 (20mA/div)
Time (1ms/div)
Time (200s/div)
SC624A
Descriptions
Name
C2PGND AGND LDO2 LDO1 VOUT C1THERMAL
Function
Negative connection bucket capacitor requires capacitor connected Ground high current charge pump Unused terminate Current sink output main backlight leave this open unused Current sink output main backlight leave this open unused Current sink output main backlight leave this open unused Current sink output main backlight leave this open unused Analog ground connect ground separate from PGND current clock input Unused terminate bi-directional data used read write operations internal registers (refer Register Interface sections) Chip enable active high state resets registers (see register table) Bypass voltage reference connect with 22nF capacitor AGND Output LDO2 connect with capacitor AGND Output LDO1 connect with capacitor AGND Charge pump output anode pins should connected this requires 2.2F capacitor PGND Positive connection bucket capacitor requires capacitor connected C2Positive connection bucket capacitor requires capacitor connected C1Battery voltage input connect with capacitor PGND Negative connection bucket capacitor requires capacitor connected Thermal heatsinking purposes connect ground plane using multiple vias connected internally
SC624A
Block Diagram
C120
VOUT
mAhXLifeFractional Charge Pump (1x, 1.5x,
VOUT PGND
Compatible Interface Logic Control Oscillator Current Setting
Bandgap Reference
Voltage Setting
LDO1
LDO1
LDO2 AGND
LDO2
SC624A
Applications Information
General Description
This design optimized handheld applications supplied from single Li-Ion cell includes following features: typical application circuit diagram. These capacitors should equal value, with minimum capacitance support charge pump current requirements. device also requires capacitor 2.2F capacitor VOUT minimize noise support output drive requirements. Capacitors with ceramic dielectric strongly recommended their superior temperature voltage characteristics. capacitors should used their temperature coefficients make them unsuitable this application.
high efficiency fractional charge pump that supplies power LEDs Four matched current sinks that control backlighting current, with 0.5mA 25mA adjustable LDOs with outputs ranging from 2.5V 3.3V LDO1 1.5V 1.8V LDO2, adjustable 100mV increments compatible interface that provides control device functions
Backlight Current Sinks
backlight current compatible interface. current regulated values between 0.5mA 25mA. step size varies depending upon current setting. Between 0.5mA 12mA, step size 0.5mA. step size increases settings between 12mA 15mA settings greater than 15mA. This feature allows finer adjustment dimming functions current setting range coarse adjustment higher current settings where small current changes visibly noticeable brightness. backlight current sinks have matched currents, even when there variation forward voltages LEDs. 1.2V supported when input voltage 3.0V. Higher mis-match supported when higher than 3.0V. current sink outputs compared lowest output used setting voltage regulation VOUT pin. This done ensure that sufficient bias exists LEDs. backlight LEDs default state upon powerup. backlight applications using less than four LEDs, unused output must left open unused driver must remain disabled. When writing Backlight Enable Control register, zero must written corresponding unused output.
High Current Fractional Charge Pump
backlight outputs supported high efficiency, high current fractional charge pump output VOUT pin. charge pump multiplies input voltage 1.5, times. charge pump switches fixed frequency 250kHz 1.5x modes disabled mode save power improve efficiency. mode selection circuit automatically selects 1.5x mode based circuit conditions. Circuit conditions such input voltage, high output current, high voltage place higher demand charge pump output. higher numerical mode needed momentarily maintain regulation VOUT during intervals high demand, such droop during supply voltage transient. charge pump responds these momentary high demands, setting charge pump optimum mode (1x, 1.5x 2x), needed deliver output voltage load current while optimizing efficiency. Hysteresis provided prevent mode toggling. charge pump requires bucket capacitors ripple operation. capacitor must connected between pins other must connected between pins shown
SC624A
Applications Information (continued)
Backlight Quiescent Current
quiescent current required operate four backlights reduced 1.5mA when backlight current 4.0mA less. This feature results higher efficiency under light-load conditions. Further reduction quiescent current will result from using fewer than four LEDs.
Sleep Mode
When LEDs off, sleep mode activated. This reduced current mode that helps minimize overall current consumption turning clock charge pump while continuing monitor serial interface commands. Both LDOs powered while sleep mode.
Fade-In Fade-Out
Backlight brightness automatically fade-in when current increase fade-out when current decrease. When enabled with current setting, current will step through each incremental setting between values. result visually smooth change brightness with rate fade that step.
Compatible Interface Functions
device functions controlled compatible interface. interface described detail Serial Interface section datasheet.
Protection Features
SC624A provides several protection features safeguard device from catastrophic failures. These features include:
Programmable Outputs
dropout (LDO) regulators provided camera module core power. Each least 100mA available load current with ±3.5% accuracy. minimum current limit 200mA, outputs greater than 100mA possible somewhat reduced accuracy. capacitor should used bypass capacitor each output reduce noise ensure stability. addition, recommended that minimum 22nF capacitor connected from ground minimize noise achieve optimum power supply rejection. larger capacitor used this function, expense increasing turnon time. Capacitors with ceramic dielectric strongly recommended their superior temperature voltage characteristics. capacitors should used their temperature coefficients make them unsuitable this application.
Output Open Circuit Protection Over-Temperature Protection Charge Pump Output Current Limit Current Limit Float Detection
Output Open Circuit Protection Over-Voltage Protection (OVP) provided VOUT prevent charge pump from producing excessively high output voltage. event open circuit VOUT, charge pump runs open loop voltage rises limit. operation hysteretic, meaning charge pump will momentarily turn until VOUT sufficiently reduced. maximum threshold 6.0V, allowing ceramic output capacitor rated 6.3V with fear over-voltage damage.
Shutdown State
device disabled when low. registers reset default condition when low.
SC624A
Applications Information (continued)
Over-Temperature Protection Over-Temperature (OT) protection circuit helps prevent device from overheating experiencing catastrophic failure. When junction temperature exceeds 160°C, device goes into thermal shutdown with outputs disabled until junction temperature reduced. register information retained during thermal shutdown. Charge Pump Output Current Limit device also limits charge pump current VOUT (typically 300mA). Current Limit device limits output currents LDO1 LDO2 help prevent from overheating protect loads. minimum limit 200mA, load current greater than rated 100mA used with degraded accuracy larger dropout without tripping current limit. Float Detection Float detect fault detection feature current sink outputs. output programmed enabled open circuit fault occurs current sink output, that output will disabled prevent sustained output condition from occurring resulting open loop. Float detect ensures device protection does ensure optimum performance. Unused outputs must disabled prevent open circuit fault from occurring.
SC624A
Applications Information (continued)
Layout Considerations
layout diagram Figure illustrates proper two-layer layout SC624A supporting components. Following fundamental layout rules critical achieving performance specified Electrical Characteristics table. following guidelines recommended when developing layout:
Place bypass decoupling capacitors CIN, COUT, CLDO1, CLDO2, CBYP close device possible. charge pump current passes through VIN, VOUT, bucket capacitor connection pins. Ensure that connections these pins make wide traces that resistive drop each connection minimized. thermal should connected ground plane using multiple vias ensure proper thermal connection optimal heat transfer.
Make ground connections solid ground plane shown example layout (Figure ground layer feasible, following groupings should connected: PGND CIN, COUT AGND Ground Pad, CLDO1, CLDO2, CBYP ground plane available, PGND AGND should routed back negative battery terminal separate signals using thick traces. Joining ground returns terminal prevents large pulsed return currents from mixing with low-noise return currents LDOs. Both output traces should made wide possible minimize resistive losses.
VOUT
VOUT
COUT
CLDO1
LDO1
PGND
LDO2
CLDO2
Figure Layer
SC624A
CBYP
AGND
Figure Recommended Layout
Figure Layer
SC624A
Register
Address Reset Value
0x00
Description
Backlight Current Control Backlight Enable Control Control
0x00
FADE_1
FADE_0
FADE_EN
BL_4
BL_3
BL_2
BL_1
BL_0
0x01 0x03
0(1) 0(1)
0(1) LDO2_2
0(1) LDO2_1
0(1) LDO2_0
BLEN_4 LDO1_3
BLEN_3 LDO1_2
BLEN_2 LDO1_1
BLEN_1 LDO1_0
0x00 0x00
Note: always write these bits
Register Definitions (continued)
Backlight Current Control Register (0x00)
This register used currents backlight current sinks, well enable fade step rate. These current sinks need enabled Backlight Enable Control register active. FADE[1:0] These bits used rise/fall rate between backlight currents follows:
FADE_1
FADE_0
Fade Feature Rise/Fall Rate (ms/step)
operation cancelled resetting fade bit. Clearing fade during ongoing fade operation changes backlight current immediately value BL[4:0]. number counts complete fade operation equals difference between backlight values increment decrement BL[4:0] bits. fade cleared, current level will change immediately without fade delay. rate fade changed dynamically, even while fade operation active, writing values FADE_1 FADE_0 bits. total fade time determined number steps between backlight values, multiplied rate fade ms/step. longest elapsed time full scale fade-out backlight nominally 1.024 seconds when default interval 32ms used.
number steps changing backlight current will equal change binary count bits BL[4:0]. FADE_EN This used enable disable fade feature. When fade function enabled backlight current set, backlight current will change from current value value bits BL[4:0] rate 32ms step. backlight level cannot written during ongoing fade operation, ongoing fade
SC624A
Register Definitions (continued)
BL[4:0] These bits used current backlight current sinks. enabled backlight current sinks will sink same current, shown Table Table Backlight Current Control Bits
BL_4 BL_3 BL_2 BL_1 BL_0
Enable Control Register (0x01)
This register used enable backlight current sinks. BLEN[4:1] These bits used enable current sinks (active high, default low). BLEN_4 Enable backlight BLEN_3 Enable backlight BLEN_2 Enable backlight BLEN_1 Enable backlight When enabled, current sinks will carry current backlight current control bits BL[4:0], shown Table
Backlight Current (mA)
10.5 11.5
SC624A
Register Definitions (continued)
Control Register (0x03) This register used enable LDOs their output voltages.
LDO1_3
Table LDO1 Control Bits
LDO1_2
LDO1_1
LDO1_0
LDO2[2:0] These bits used output voltage LDO2, shown Table Table LDO2 Control Bits
LDO1 Output Voltage
3.3V 3.2V 3.1V 3.0V 2.9V 2.8V 2.7V 2.6V 2.5V
LDO2_2
LDO2_1
LDO2_0
LDO2 Output Voltage
1.8V 1.7V 1.6V 1.5V
through used
LDO1[3:0] These bits output voltage LDO1, shown Table
1010 through 1111 used
SC624A
Serial Interface
General Specification
SC624A read-write slave-mode device complies with Philips standard Version 2.1, dated January 2000. SC624A four user-accessible internal 8-bit registers. interface been designed program flexibility, supporting direct format write operation. Read operations supported both combined format stop separated format. While there auto increment/decrement capability SC624A logic, tight software loop designed randomly access next register independent which register begin accessing. start stop commands frame data-packet repeat start condition allowed necessary.
eighth indicating write. SC624A then acknowledges that being addressed, master responds with data byte consisting register address. slave acknowledges master sends appropriate data byte. Once again slave acknowledges master terminates transfer with stop condition [P]. Combined Format Read After start condition [S], slave address sent, followed eighth indicating write. SC624A then acknowledges that being addressed, master responds with data byte consisting register address. slave acknowledges master sends repeated start condition [Sr]. Once again, slave address sent, followed eighth indicating read. slave responds with acknowledge previously addressed data byte; master then sends non-acknowledge (NACK). Finally, master terminates transfer with stop condition [P]. Stop Separated Reads Stop-separated reads also used. This format allows master register address pointer read return that slave later time read data. this format slave address followed write command sent after start condition. SC624A then acknowledges being addressed, master responds with 8-bit register address. master sends stop restart condition then address another slave. After performing other tasks, master send start restart condition SC624A with read command. device acknowledges this request returns data from register location that previously been
SC624A Limitations Specifications
SC624A only recognizes seven addressing. This means that addressing CBUS communication compatible. device operate either standard mode (100kbit/s) fast mode (400kbit/s).
Slave Address Assignment
seven slave address 0110 111x. eighth data direction bit. 0x6E used write operation, 0x6F used read operation.
Supported Formats
supported formats described following subsections. Direct Format Write simplest format write direct format. After start condition [S], slave address sent, followed
SC624A
Serial Interface (continued)
Direct Format Write
Slave Address Register Address Data
Start Condition Write Acknowledge (sent slave) Stop condition
Slave Address 7-bit Register address 8-bit Data 8-bit
Stop Separated Format Read
Register Address Setup Access Slave Address Register Address
Start Condition Write Read Acknowledge (sent slave) Non-Acknowledge (sent master) Repeated Start condition Stop condition
Master Addresses other Slaves Slave Address S/Sr
Register Read Access Slave Address Data NACK
Slave Address 7-bit Register address 8-bit Data 8-bit
Combined Format Read
Slave Address Register Address Slave Address Data NACK
Start Condition Write Read Acknowledge (sent slave) Non-Acknowledge (sent master) Repeated Start condition Stop condition
Slave Address 7-bit Register address 8-bit Data 8-bit
SC624A
Outline Drawing MLPQ-UT-20
DIMENSIONS INCHES MILLIMETERS
.020 .000 .024 .002 0.50 0.00 0.60 0.05 (.006) .006 .008 .010 .114 .118 .122 .061 .067 .071 .114 .118 .122 .061 .067 .071 .016 .012 .016 .020 .003 .004 (0.1524) 0.15 0.20 0.25 2.90 3.00 3.10 1.55 1.70 1.80 2.90 3.00 3.10 1.55 1.70 1.80 0.40 0.30 0.40 0.50 0.08 0.10
INDICATOR (LASER MARK)
SEATING PLANE
NOTES: CONTROLLING DIMENSIONS MILLIMETERS (ANGLES DEGREES).
COPLANARITY APPLIES EXPOSED WELL TERMINALS 1.90 190mm.
SC624A
Land Pattern MLPQ-UT-20
DIMENSIONS INCHES (.114) .083 .067 .067 .016 .004 .008 .031 .146 MILLIMETERS (2.90) 2.10 1.70 1.70 0.40 0.10 0.20 0.80 3.70
NOTES:
CONTROLLING DIMENSIONS MILLIMETERS (ANGLES DEGREES). THIS LAND PATTERN REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES MET. THERMAL VIAS LAND PATTERN EXPOSED SHALL CONNECTED SYSTEM GROUND PLANE. FAILURE COMPROMISE THERMAL AND/OR FUNCTIONAL PERFORMANCE DEVICE.
Contact Information
Semtech Corporation Power Management Products Division Flynn Road, Camarillo, 93012 Phone: (805) 498-2111 Fax: (805) 498-3804 www.semtech.com

Light Management Unit POWER MANAGEMENT Features Input supply

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