Digital Diagnostic 650nm Transceiver Fast Ethernet (10/100 Mbps) with
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AFBR-5978Z
Digital Diagnostic 650nm Transceiver Fast Ethernet (10/100 Mbps) with SC-RJ connector
AFBR-5978Z transceiver provides system designer with ability implement Fast Ethernet (100 Mbps) Ethernet Mbps) over meter standard bandwidth 0.5±0.05 meter standard bandwidth 0.37±0.04 fiber. connectivity available transceiver SC-RJ. This product lead free compliant with RoHS.
Features
Compatible with electrical optical performance POFAC recommendations Fast Ethernet over Plastic Optical Fiber (POF). Compatible with Electrical Optical performance ProfiNet recommendations Fast Ethernet over Hard-Clad Silica Fiber (HCS). Manufactured 9001 certified facility [Digital Diagnostics Monitoring Interface, SFF-8472 9.3], provides real-time monitoring Temperature Supply voltage Received Optical Power (Alarm/Warning flag) LVPECL Signal Detect Output Temperature range
Transmitter
transmitter contains 650nm with integrated driver. driver operates receives LVPECL compatible electrical input, converts into modulated current driving LED. packaged optical subassembly, part transmitter section. optical subassembly couples output optical power efficiently into fiber.
Receiver
receiver utilizes photodiode. photodiode packaged optical sub-assembly, part receiver section. This optical subassembly couples optical power efficiently from fiber receiving PIN. integrated operates converts photocurrent into LVPECL compatible electrical output.
Applications
Factory automation Fast Ethernet speeds Fast Ethernet networking over Link Distance (See application note 5290 details)
HCS® trademark Corporation AFBR-5978Z compatible with SC-RJ Connecting System from Reichle De-Massari Switzerland
Package
transceiver package consist four basic elements; optical subassemblies, electrical subassembly housing illustrated block diagrams Figure package outline drawing shown Figures
Block diagram
ELECTRICAL SUBASSEMBLY DIFFERENTIAL DATA SINGLE-ENDED SIGNAL DETECT QUANTIZER PREAMP OPTICAL SUBASSEMBLIES DIFFERENTIAL DATA DRIVER SC-RJ RECEPTACLE PHOTODIODE
VIEW Figure Block diagram
optical subassemblies utilize high volume assembly process together with cost lens elements which result cost effective building block. electrical subassembly consists high volume multilayer printed circuit board which chips various surface mounted passive circuit elements attached. housing includes internal shields electrical optical subassemblies insure emissions high immunity external fields. outer housing including duplex SC-RJ connector molded filled non-conductive plastic provide mechanical strength electrical isolation.
profile Avago Technologies transceiver design complies with maximum height allowed duplex SC-RJ connector over entire length package. transceiver attached printed circuit board with twelve signal pins solder posts, which exit bottom housing. solder posts provide primary mechanical strength withstand mechanical loads imposed transceiver mating with SC-RJ connectored fiber cables. solder posts isolated from circuit design transceiver require connection ground plane circuit board
Figure Package outline drawing.
Descriptions
Sda: data line wire serial interface. This data line should pulled with 4.7k-10k resistor host board supply 3.3V ±10%. GND: receiver ground pin. Directly connect this receiver ground plane host board. Vcc: receiver power supply pin. Provide +3.3 receiver power supply filter circuit. Locate power supply filter circuit close possible pin. signal detect pin. optical signal present input receiver, output logic "1". Absence optical signal receiver results logic output. This signal detect output used drive LVPECL input upstream circuit, such Signal Detect input Loss Signal-bar. Proper LVPECL termination should place. figure Rdata-: receiver data bar. This data line 3.3V LVPECL compatible differential line which should properly terminated with pull pull down ground. Rdata+: receiver data out. This data line 3.3V LVPECL compatible differential line which should properly terminated with pull pull down ground. Vcc: transmitter power supply. Provide +3.3V transmitter power supply filter circuit. Locate power supply filter circuit close possible pin. GND: transmitter ground. Directly connect this transmitter ground plane host board. Txdis: transmitter disable input. This input used shut down transmitter light output. internally pulled with resistor. (0-0.8 transmitter Between (0.8-2.0 undefined High (2.0-3.63 transmitter Open transmitter Tdata+: transmitter data This data line coupled differential line which does need termination user SERDES. coupling done inside module therefore required host board. Tdata-: transmitter data bar. This data line coupled differential line which does need termination user SERDES. coupling done inside module therefore required host board. Scl: clock line wire serial interface. This data line should pulled with 4.7k resistor host board supply 3.3V ±10%.
SC-RJ connector
TdataTdata+ Txdis TxGND TxVcc
RxGND RxVcc RdataRdata+
bottom view
Figure diagram
3.3V 10µF 0.1µF
0.1µF
Protocol SERDES
disable 3.3V 10µF 0.1µF
Txdis
10nF
TxVcc
AFBR-5978Z
Tdata+
driver
10nF
Tdata-
RxVcc Rdata+ RdataSd Amplifier Quantisizer
Master Signal Detect
4.7k-10k 4.7k-10k 3.3V 3.3V
EEPROM
Figure Recommended termination circuit.
Board Layout Decoupling Circuit Ground Planes
important take care layout your circuit board achieve optimum performance from transceiver. power supply decoupling circuit recommended filter noise assure optimal product performance. further recommended that contiguous ground plane provided circuit board directly under transceiver provide inductance ground signal return current. This recommendation keeping with good high frequency board layout practices.
Functional Data
LVPECL receiver output Avago Technologies transceiver DC-coupled LVPECL compliant network interface through equivalent transformation. 3.3V power supply LVPECL outputs should pulled with resistor pulled down ground with resistor. Both coupling resistors preferably placed close network interface figure AC-coupling used systems which transceiver connected logic different supply voltages. coupling, coupling capacitor should large enough avoid excessive low-frequency droop when data signal contains long strings consecutive identical digits. LVPECL outputs have pulled down ground first bias output before coupling. Because LVPECL output common-mode voltage fixed 1.3V, DC-biasing resistor selected assuming current. This results bias-resistor value 200. After AC-coupling capacitors, equivalent transformation connects LVPECL compatible network interface, equal used DCcoupling.
Digital Diagnostics Monitoring Interface
AFBR-5978Z transceiver features enhanced digital diagnostic interface, compliant "Digital Diagnostic Monitoring Interface Optical Transceivers" SFF-8472 Multi-source Agreement (MSA). Please refer document access information range options, both hardware software, available host system exploiting available digital diagnostic features. enhanced digital interface allows real-time access device operating parameters, includes optional digital features such soft control monitoring signals. addition, fully incorporates functionality needed implement digital alarms warnings, defined SFF-8472 MSA. With digital diagnostic monitoring interface, user capability performing component monitoring, fault isolation failure prediction their transceiverbased applications.
wire address 1010000X (A0h) Serial Defined bytes) Vendor Specific bytes) wire address 1010001X (A2h) Alarm Warning Thresholds bytes)
Constants bytes)
diagnostic monitoring interface (DMI) byte memory maps EEPROM which accessible over wire interface: serial memory address 1010000X (0xA0) digital diagnostic memory address 1010001X (0xA2). serial memory contains serial identification vendor specific information read only. digital diagnostic memory contains device operating parameters alarm warning flags. operating parameters retrieved through sequential read command ensuring that each parameter "coherent". Furthermore, contains bytes that written user well writable soft control byte. Tables detail memory contents, timing characteristics, soft commands alarm/warning flags.
Time Diagnostic Interface bytes)
Vendor Specific bytes)
Reserved (128 bytes)
User Writable EEPROM (120 bytes)
Vendor Specific bytes)
Figure Digital diagnostic memory specific data field description (from SFF-8472 MSA)
Table Transceiver soft diagnostics Timing characteristics
Parameter
Hardware TX_DISABLE assert time Hardware TX_DISABLE negate time Time initialize Hardware RX_SD assert time Hardware RX_SD de-assert time Software TX_DISABLE assert time Software TX_DISABLE negate time Software RX_SD assert time Software RX_SD de-assert time Analog parameter data ready Serial hardware ready Write cycle time Serial clock rate
Symbol
t_off t_on t_init t_sd_on t_sd_off t_off_soft t_on_soft t_sd_on_soft t_sd_off_soft t_data t_serial t_write f_serial_clock
1000
Unit
Notes
Note Figure Note Figure Note Figure Note Note Note Note Note Note Note Note Note Note
Notes: Time from rising edge TX_DISABLE when optical output falls below nominal. Time from falling edge TX_DISABLE when modulated optical output rises above nominal. Time from Power falling edge TX_DISABLE when modulated optical output rises above nominal. Time from valid optical signal RX_SD assertion. Time from loss optical signal RX_SD de-assertion. Time from two-wire interface assertion TX_DISABLE (A2h, byte 110, when optical output falls below nominal. Measured from falling clock edge after stop write transaction. Time from two-wire interface de-assertion TX_DISABLE (A2h, byte110, when modulated optical output rises above nominal. Time two-wire interface assertion RX_SD (A2h, byte 110, from presence valid optical signal. Time two-wire interface de-assertion RX_SD (A2h, byte 110, from loss optical signal. From power data ready asserted (A2h, byte 110, Data ready indicates analog monitoring circuitry operational. Time from power until module ready data transmission over serial (reads writes over A2h). Time from stop completion byte write command. Contact Avago Technologies applications faster (>400 kHz) Serial clock rates.
Table Transceiver Digital Diagnostic Monitor Characteristics
Parameter
Transceiver internal temperature accuracy Transceiver internal supply voltage accuracy
Symbol
TINT VINT
Min.
Unit
Notes
Temperature measured internal transceiver. Valid from -25°C 85°C case temperature. Supply voltage measured internal transceiver can, with less accuracy, correlated voltage pin. Valid over 3.3V 10%.
2.97 TX_DISABLE Transmitted Signal t_init
2.97 TX_DISABLE Transmitted Signal t_init
t-init: TX_DISABLE NEGATED
t-init: TX_DISABLE ASSERTED
Optical Signal
occurrence loss
TX_DISABLE Transmitted Signal
t_SD_off t_SD_on
t_off
t_on
tx-SD-on tx-SD-off
t-off t-on: DISABLE ASSERTED THEN NEGATED
Figure Transceiver timing diagrams.
Table EEPROM Serial Memory Contents Address
Addr
ASCII
Addr
ASCII
Note Note Note Note
Note Note
Note Note
Notes: wavelength represented unsigned bits. representation (nm) 0x28A. Address 68-83 specify unique module serial number. Address 84-91 specify date code. Address checksum bytes 0-62 address checksum bytes 64-94. They calculated (per SFF-8472) stored prior product shipment. Address 96-127 vendor specific.
Table EEPROM Memory Contents Address
Addr
Temp alarm MSB[1,5] Temp alarm LSB[1,5] Temp alarm MSB[1,5] Temp alarm LSB[1,5] Temp warning MSB[1,5] Temp warning
[1,5]
Addr
[3,4,5] [3,4,5]
Checksum bytes 94[7] Real time temperature MSB[1] Real time temperature LSB[1] Real time MSB[2] Real time LSB[2] Reserved[8] Status control table Reserved[8] Flag table Flag table Reserved[8] Reserved[8] Flag table Flag table Reserved[8] Vendor specific Customer writable Vendor specific
Temp warning MSB[1,5] Temp warning alarm MSB[2,5] alarm
[2,5] [2,5] [1,5]
alarm
alarm LSB[2,5] warning MSB[2,5] warning
[2,5] [2,5]
warning
warning LSB[2,5] Reserved
Margin alarm
Margin warning Reserved[8]
Note
Notes: Temperature (Temp) decoded signed twos complement integer increments 1/256 Supply voltage (Vcc) decoded unsigned integer increments Received optical modulation amplitude margin margin measure reserve Sensitivity. Received margin decoded signed twos compliment integer increments This register read only. write will acknowledged stored. Bytes 56-94 intended with AFBR-5978Z, have been default values SFF-8472. Byte checksum calculated (per SFF-8472) stored prior product shipment. Reserved registers will return "00" when read. write reserved register will acknowledged stored.
Table EEPROM Serial Memory Contents Soft Commands (Address A2h, byte 110)
Status Control name
TX_DISABLE State Soft TX_DISABLE Reserved supported supported supported RX_SD State Data Ready (Bar) Digital state RX_SD output (logic RX_SD asserted) Indicates transceiver powered real time sense data ready ready)
Digital state TX_DISABLE input (logic TX_DISABLE asserted) Read/write changing digital state TX_DISABLE function
Notes
Note Note Note Note Note Note Note Note
Notes: response time soft commands AFBR-5978Z specified SFF-8472. logic OR'd with TX_DISABLED input pin. Either asserted will disable transmitter. Reserved bits will return when read. write reserved will acknowledged stored. read from will return "1". write will acknowledged stored. read/write from/to will acknowledged stored will ignored transceiver. read from will return "0". write will acknowledged stored. AFBR-5978Z meets SFF-8471 data ready timing 1000
Table EEPROM Serial Memory Contents Alarm Warnings (Address A2h, bytes 112, 113, 116, 117)
Byte
Flag name
Temp high alarm Temp alarm high alarm alarm Reserved Reserved Margin alarm Reserved Temp high warning Temp warning high warning warning Reserved Reserved Margin warning Reserved
when transceiver internal temperature exceeds high alarm threshold when transceiver internal temperature exceeds alarm threshold when transceiver internal supply voltage exceeds high alarm threshold when transceiver internal supply voltage exceeds alarm threshold Note Note when received Margin exceeds alarm threshold, Note Note when transceiver internal temperature exceeds high warning threshold when transceiver internal temperature exceeds warning threshold when transceiver internal supply voltage exceeds high warning threshold when transceiver internal supply voltage exceeds warning threshold Note Note when receiver Margin exceeds warning threshold, Note Note
Notes: Reserved bits will return when read. write reserved will acknowledged stored. Received optical modulation amplitude margin margin measure reserve Sensitivity.
Regulatory Compliance Table
Feature
MIL-STD 61000-4-2
Test Method
Method 3015, pulse polarity Typically withstand electrostatic discharge without damage when SC-RJ connector receptacle contacted Human Body Model probe Typically show measurable effect from electric field applied transceiver when mounted circuit board without chassis enclosure. specified 60825-1 version 1.2.
Performance
resistance Human Body Model Level discharge resistance Contact discharge resistance Level Electric field immunity: Class Certificate number R72062581
61000-4-3
EN60825-1
Absolute Maximum Ratings
Stresses excess absolute maximum ratings cause catastrophic damage device. Limits apply each parameter isolation, other parameters having values within recommended operation conditions. should assumed that limiting values more than parameter applied products same time. Exposure absolute maximum ratings extended periods adversely affect device reliability.
Parameter
Storage Temperature Case Operating Temperature Lead Soldering Temperature Lead Soldering Time Supply Voltage Data Input Voltage Differential Input Voltage Output Current PECL ESD-Resistance Human Body Model ESD-Resistance Discharge ESD-Resistance Contact Discharge Electric Field Immunity
Symbol
Tsold tsold IDout VESD VESD VESD VEMI
+100
Unit
Notes
Note Note
-0.5 -0.5
peak peak
Note Note Note 61000-4-3
Notes: transceiver Pb-free wave solderable. Human Body Model: 100pF/1.5k, pulse polarity; MIL-STD.883 Meth. 3015. discharge 61000-4-2 level ESD-Resistance transceiver. Contact discharge 61000-4-2 level Resistance transceiver.
Recommended Operating Conditions
Parameter
Case Operating Temperature Supply Voltage Differential Input Voltage Data Signal Detect Output Load Signalling rate (Fast-Ethernet) Signalling rate (Ethernet) Humidity
Symbol
2.97
0.800
3.63
Unit
Notes
peak peak
4B/5B, Manchester,
Notes: Ethernet Fast Ethernet optical auto-negotiation signals over carrier supported.
Transceiver Electrical Characteristics
Parameter
Supply Current Power Dissipation Power Supply Noise Reduction
Symbol
PDISS PSNI
Unit
Notes
peak peak
Transmitter Electrical Characteristics
Parameter
Data Current Data Current High
Symbol
IDin IDin
Unit
Notes
Transmitter Optical Characteristics
Parameter
Average Launched Power (1mm POF, NA=0.5) Average Launched Power (200um HCS, NA=0.37) Optical Modulation Amplitude (POF) Optical Modulation Amplitude (HCS) Central Wavelength Spectrum Optical Rise Time (10%-90%) Optical Fall Time (10%-90%) Duty Cycle Distortion Contributed Transmitter Random Jitter Contributed Transmitter Overshoot
Notes: Measured meter optical fiber. Central wavelength defined
Symbol
-8.5 -19.5 -6.5 -17.5
-4.5 -13.5
-0.5 -9.5
Unit
Notes
note note peak peak, note peak peak, note note note note note peak peak, note peak peak, note note
Ref: EIA/TIA standard FOTP-127/6.1, 1991
Spectrum defined
Ref: EIA/TIA standard FOTP-127/6.3, 1991
Receiver Electrical Characteristics
Parameter
Data Output Voltage Data Output Voltage High Data Output Voltage Swing Data Output Rise Time Data Output Fall Time Duty Cycle Distortion Data Dependent Jitter (rise/fall) Random Jitter Signal Detect Output Voltage Signal Detect Output Voltage High
Symbol
VOL-Vcc VOH-Vcc |VOH-VOL| VOL-Vcc VOH-Vcc
-1.63 -0.99
Unit
Notes
1.45 0.98 -2.2 -1.2 -1.63 -0.99
2.20 2.20 -1.5 -0.7
single ended
peak peak peak peak peak peak
Receiver Optical Characteristics
Parameter
Unstressed receiver sensitivity, (POF) Unstressed receiver sensitivity, (HCS) Input Optical Power Maximum, (POF) Input Optical Power Maximum, (HCS) Operating Wavelength Signal Detect Asserted Signal Detect De-asserted Signal Detect Hysteresis
Symbol
-22.5 -26.3
-29.3
Unit
Notes
peak-peak, note peak-peak, note peak-peak, note peak-peak, note
note note
Notes: Measured with PRBS 27-1 sequence, 2.5x10-10 Input Optical Power Maximum defined maximum optical modulation amplitude where receiver duty cycle distortion reaches Signal Detect Asserted De-asserted levels indicated below unstressed receiver sensitivity level either HCS.
product information complete list distributors, please site:
www.avagotech.com
Avago, Avago Technologies, logo trademarks Avago Technologies Limited United States other countries. Data subject change. Copyright 2006 Avago Technologies Limited. rights reserved. Obsoletes AV01-0403EN AV01-0507EN October 2006
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