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Desktop Board D820LP Specification Update

Release Date: May 2000 Order Number: A26955-006

Desktop Board D820LP Specification Update
Release Date: May 2000 Order Number: A26955-006
The Intel® Desktop Board D820LP may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are documented in this Specification Update.
CONTENTS
REVISION HISTORY ..................................................................v PREFACE .......................................................................... vi
Specification Update for Intel® Desktop Boards D820LP
GENERAL INFORMATION .............................................................3 SPECIFICATION CHANGES ............................................................5 ERRATA............................................................................8 DOCUMENTATION CHANGES ..........................................................9
D820LP SPECIFICATION UPDATE
REVISION HISTORY
Date of Revision May 2000 August 2000 September 2000 October 2000 April 2001 May 2000 Version -001 -002 -003 -004 -005 -006 Description This document is the first Specification Update for the Intel® Desktop Board D820LP. Added Specification Change 1 and Document Change 1. Added Erratum 1. Added Documentation Change 2. Removed BIOS / Errata cross reference table, Added Documentation Change 3. Added Erratum 1.
D820LP SPECIFICATION UPDATE
PREFACE
Nomenclature
Specification Update for Intel Desktop Boards D820LP
D820LP SPECIFICATION UPDATE
GENERAL INFORMATION
Basic Intel® Desktop Board D820LP Identification Information AA Revision A14723-400 A14723-402 A14723-403 PBA Revision A14724-400 A14724-402 A14724-403 BIOS Revision VC82010A.86A.0023.P09 VC82010A.86A.0031.P11 VC82010A.86A.0035.P15 Notes 1-7 1-7 1-7
NOTES: 1. The PBA number or AA number is found on a small label on the component side of the board. 2. The 82820 Chipset kit used on this PBA revision consists of three components as follows:
Device 82820 MCH 82801AA ICH 82802AB FWH
Stepping B2 A3 A0
S-Spec Numbers SL47D SL3Z2 SB48
The following errata are contained in the Pentium ® III Processor Specification Update (Order Number 244453) for the Pentium III processor and either do not apply to the Desktop Board D820LP or have been worked-around in this PBA and / or BIOS revision: 2. All other errata associated with the processor apply to this PBA revision. The following errata are contained in the Intel ® Celeron Processor Specification Update (Order Number 243748) for the Celeron processor and either do not apply to the Desktop Board D820LP or have been worked-around in this PBA and / or BIOS revision: None. All other errata associated with the processor apply to this PBA revision. The following items are contained in the Intel ® 82820 Memory Controller Hub (MCH) Specification Update (Order Number 290630) and either do not apply to the Desktop Board D820LP or have been worked around in this PBA and / or BIOS revision: None, All other errata associated with the MCH apply to this PBA revision. The following items are contained in the Intel ® 82801 I / O Controller Hub Specification Update (Order Number 290677) and either do not apply to the Desktop Board D820LP or have been worked around in this PBA and / or BIOS revision: None. All other errata associated with the ICH apply to this PBA revision. The following items are contained in the Intel ® 82802 Firmware Hub Specification Update (Order Number TBD) and either do not apply to the Desktop Board D820LP or have been worked around in this PBA and / or BIOS revision: None. All other errata associated with the FWH apply to this PBA revision.
D820LP SPECIFICATION UPDATE
Summary Table of Changes
The following table indicates the Specification Changes, Errata, Specification Clarifications, or Documentation Changes which apply to the D820LP desktop board. Intel intends to fix some of the errata in a future revision of the desktop board, and to account for the other outstanding issues through documentation or specification changes as noted. This table uses the following notations: CODES USED IN SUMMARY TABLE Doc: Fix: Fixed: NoFix: Shaded: NO. 1 NO. 1 2 NO. 1 2 3 PLANS Doc PLANS Fix Fixed PLANS Doc Doc Doc Document change or update that will be implemented. This erratum is intended to be fixed in a future revision of the desktop board, driver, or BIOS. This erratum has been previously fixed. There are no plans to fix this erratum. This erratum is either new or modified from the previous version of the document. SPECIFICATION CHANGES Addition of new feature, fast booting systems with Intel® Rapid BIOS BOOT ERRATA Some SCSI host bus adapters may not boot to the hard disk drive with a bootable CD-ROM drive attached Intel® Pentium® III Processor Erratum E76 DOCUMENTATION CHANGES Change to description of BIOS main menu memory option Change to description of Section 1.6.4, Real-Time Clock, CMOS SRAM, and Battery Change to description of Section 1.5.2, Memory Features
D820LP SPECIFICATION UPDATE
SPECIFICATION CHANGES
The Specification Changes listed in this section apply to the D820LP Motherboard Technical Product Specification (Order Number A15751). All Specification Changes will be incorporated into a future version of that specification.
ADDITION OF NEW FEATURE, FAST BOOTING SYSTEMS WITH INTEL® RAPID BIOS BOOT
Section 3.8, Overview of BIOS Features will be added. All subsequent sections will be renumbered accordingly:
Fast Booting Systems with Intel Rapid BIOS Boot
D820LP SPECIFICATION UPDATE
Intel® Rapid BIOS Boot
There are several BIOS settings, which if adjusted, can reduce the execution time of the POST: · Set the hard disk drive as the first boot device. As a result, the POST will not seek a diskette drive (saving about one second from the POST time) or a CD-ROM drive (saving about two seconds). · Disable Quiet Boot to eliminate the logo splash screen. This could save several seconds of painting complex graphic images and changing video modes. · Make sure the Intel® Rapid BIOS Boot option (in the Boot menu of the BIOS Setup Program) is enabled (this is typically the default setting). This feature bypasses memory count and floppy seek. · Disable the LAN feature PXE (Preboot eXecutable Environment) if it will not be used. Doing so can reduce up to four seconds of option ROM boot time.
It is possible to optimize the boot process to the point where the system boots so quickly that the Intel® Logo Screen (or a custom logo splash screen) will not be seen. Monitors and hard disk drives with minimum initialization times can also contribute to a boot time that might be so fast that necessary logo screens and POST messages cannot be seen. If this should occur, it is possible to introduce a programmable delay ranging from 3 to 30 seconds (using the Hard Disk PreDelay feature of the Advanced menu in the IDE Configuration Submenu of the BIOS Setup Program).
For information about IDE Configuration Submenu in the BIOS Setup Program Refer to Table 61, page 94
Operating System
3.8.3.1 Selection
The Microsoft Windows Millennium Edition (Windows Me) operating system has built-in capabilities for making PCs boot more quickly. For additional information, see the following URL: http://www.microsoft.com / hwdev / newpc / fast-boot.htm
D820LP SPECIFICATION UPDATE
3.8.3.2 Optimization
To speed operating system availability at boot time, limit the number of applications that load into the system tray or the task bar.
The Intel® Rapid BIOS Boot technology is only available with BIOS revision VC82010A.86A.0032.P12 or later.
D820LP SPECIFICATION UPDATE
ERRATA
1. Some SCSI Host Bus Adapters May Not Boot to The Hard Disk Drive With a Bootable CD-ROM Drive Attached
PROBLEM: If a bootable CD-ROM is attached to the SCSI host bus adapter (HBA) and set as bootable in the setup menu of the SCSI HBA without bootable media installed, the system may not boot to the attached hard drive. IMPLICATION: Users who wish to utilize a bootable SCSI CD-ROM in conjunction with a bootable hard drive on an add-in SCSI host bus adapter may not be able to boot to the hard drive if the SCSI adapter is set to recognize the CD-ROM as a bootable device. WORKAROUND: Enable the CD-ROM as a bootable SCSI device only when using bootable media. STATUS: This erratum will be fixed in a future BIOS revision.
Intel® Pentium® III Processor Erratum E76
PROBLEM: For a complete description of the Pentium® III processor erratum E76, see the Pentium III
Specification Update, order number 244453 found at http://developer.intel.com / design / PentiumIII / specupdt / .
IMPLICATION: For a complete description of the Pentium III processor erratum E76, see the Pentium III
Specification Update, order number 244453 found at http://developer.intel.com / design / PentiumIII / specupdt / .
WORKAROUND: Update the D820LP desktop board with BIOS revision VC82010A.86A.0040.P17. STATUS: This erratum was addressed in BIOS revision VC82010A.86A.0040.P17.
D820LP SPECIFICATION UPDATE
DOCUMENTATION CHANGES
The Documentation Changes listed in this section apply to the D820LP Motherboard Technical Product Specification (Order Number A15751). All Documentation Changes will be incorporated into a future version of that specification.
Change to Description of BIOS Main Menu Memory Option
In section 4.3, Table 56, BIOS Main Menu will be changed as follows:
Table 1.
Feature BIOS Version
Main Menu
Options No options No options No options No options No options No options No options · English (US) (default) · German · French · Italian · Spanish Description Displays the version of the BIOS. Displays processor type. Displays processor operating frequency. Displays the of the system front side bus frequency. Displays the size of second-level cache and whether it is ECC-capable. Displays the total amount of RAM. Displays type of RIMM installed in each memory bank. Selects the default language used by the BIOS.
Processor Type Processor Speed System Bus Frequency Cache RAM Total Memory Memory Bank 0 Memory Bank 1 Language
Processor Serial Number Memory Configuration System Time System Date
· Disabled (default) · Enabled · Non-ECC · ECC (default) Hour, minute, and second Month, day, and year
Enables and disables the processor serial number. Allows selection of ECC-mode memory operation if ECC-type memory is installed. Specifies the current time. Specifies the current date.
D820LP SPECIFICATION UPDATE
Change to Description of Section 1.6.4, Real-Time Clock, CMOS SRAM, and Battery
The note in section 1.6.4 will be changed in its entirety as follows:
NOTES
If the battery and AC power fail, custom defaults if previously saved, will be loaded into CMOS RAM at power-on. The recommended method of accessing the date in systems with D820LP boards is indirectly from the Real-Time Clock (RTC) via the BIOS. The BIOS on D820LP boards contains a century checking and maintenance feature. This feature checks the two least significant digits of the year stored in the RTC during each BIOS request (INT 1Ah) to read the date and, if less than 80 (i.e., 1980 is the first year supported by the PC), updates the century byte to 20. This feature enables operating systems and applications using the BIOS date / time services to reliably manipulate the year as a four-digit value.
Change to Description of Section 1.5.2, Memory Features
Section 1.5.2, Memory Features will be changed in its entirety as follows:
1.5.2 Memory Features
The Intel® 82820 Memory Controller Hub (MCH) integrates a single Rambus channel as an electrically pipelined serial bus (16 data bits in width) with uniform impedance of 28 ohms and single-ended termination. This Rambus channel is capable of providing a processor-to-memory bandwidth up to 1.6 GB / sec. The board supports the following memory features: · · · · · ·
Up to two 2.5 V, 184-pin, RIMM modules 512 MB maximum onboard capacity using 128 or 144 Mbit technology Single or double-sided RIMM modules Serial Presence Detect (SPD) memory only Non-ECC memory with 16-bit components (128 Mbit technology) ECC memory with 18-bit components (144 Mbit technology)
D820LP SPECIFICATION UPDATE
For information about The Rambus RIMM Specification The Direct Rambus Serial Presence Detect (SPD) Specification
Refer to Section 1.3, page 16 Section 1.3, page 16