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ISL28286, ISL28486

Data Sheet June 28, 2007 FN6312.1

ISL28286, ISL28486
Data Sheet June 28, 2007 FN6312.1
Dual and Quad Micropower Single Supply Rail-to-Rail Input and Output (RRIO) Precision Op Amp
Features
· Low power 120µA typical supply current (ISL28286) · 600µV maximum offset voltage · 500pA typical input bias current · 400kHz typical gain-bandwidth product · 115dB typical PSRR and CMRR · Single supply operation down to 2.4V · Input is capable of swinging above V+ and to V- (ground sensing) · Rail-to-rail input and output (RRIO) · Pb-free plus anneal available (RoHS compliant)
Applications
· Battery- or solar-powered systems · 4mA to 25mA current loops · Handheld consumer products · Medical devices
Pinouts
ISL28286 (10 LD MSOP) TOP VIEW
· Thermocouple amplifiers · Photodiode pre-amps · pH probe amplifiers
Ordering Information
PART NUMBER (Note) ISL28286FUZ ISL28486FAZ PART MARKING 8286Z 28486 FAZ PACKAGE (Pb-free) PKG. DWG. #
10 Ld MSOP MDP0043 16 Ld QSOP MDP0040
Add "-T7" suffix for tape and reel. Please refer to TB347 for details on reel specifications. ISL28486 (16 LD QSOP) TOP VIEW
ISL28286, ISL28486
Thermal Information
Thermal Resistance JA (°C / W) 10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . 115 16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . . 112 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com / pbfree / Pb-FreeReflow.asp
Electrical Specifications
PARAMETER DC SPECIFICATIONS VOS V OS -------T IOS IB CMIR CMRR PSRR AVOL
Maximum Output Voltage Swing
IS, ON
Supply Current, Enabled
ISL28286, All channels enabled. ISL28486, All channels enabled.
IS, OFF
Supply Current, Disabled
ISL28286, All channels disabled.
FN6312.1 June 28, 2007
ISL28286, ISL28486
Electrical Specifications
PARAMETER ISC+ ISCVSUPPLY VENH VENL IENH IENL
FN6312.1 June 28, 2007
FIGURE 1. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
FIGURE 2. FREQUENCY RESPONSE vs SUPPLY VOLTAGE
120 80 GAIN (dB) 40 0 PHASE -40 -80 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) GAIN
80 40 PHASE (°) 0 -40 -80 -120 10M GAIN (dB)
100 80 PHASE 60 40
200 150 100 50 0 PHASE (°)
-50 -100 -150 1M
FREQUENCY (Hz)
FIGURE 3. AVOL vs FREQUENCY @ 100k LOAD
FIGURE 4. AVOL vs FREQUENCY @ 1k LOAD
100 90 80 70 60 50 40 30 20 10 10 100 1k
FREQUENCY (Hz)
FIGURE 5. PSRR vs FREQUENCY
FIGURE 6. CMRR vs FREQUENCY
FN6312.1 June 28, 2007
10.00 CURRENT NOISE (pA / Hz) VOLTAGE NOISE (nV / Hz)
(Continued)
0.01 1 10 100 1k 10k 100k FREQUENCY (Hz)
1 1 10 100 1k 10k 100k FREQUENCY (Hz)
FIGURE 7. CURRENT NOISE vs FREQUENCY
FIGURE 8. VOLTAGE NOISE vs FREQUENCY
FIGURE 9. 0.1Hz TO 10Hz INPUT VOLTAGE NOISE
FIGURE 10. SMALL SIGNAL TRANSIENT RESPONSE
VOLTS (V)
0 VOUT
0 10µs / DIV
FIGURE 11. LARGE SIGNAL TRANSIENT RESPONSE
FIGURE 12. ENABLE TO OUTPUT DELAY TIME
FN6312.1 June 28, 2007
(Continued)
FIGURE 13. INPUT OFFSET VOLTAGE vs COMMON-MODE INPUT VOLTAGE
FIGURE 14. INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE
155 135 CURRENT (A) 115 95 75 55 35 2.0
SUPPLY CURRENT (µA)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
FIGURE 15. ISL28286 SUPPLY CURRENT vs SUPPLY VOLTAGE
4.8 4.6 4.4 CURRENT (A) 4.2 4.0 3.8 3.6 3.4 3.2 -40
TEMPERATURE (°C)
FN6312.1 June 28, 2007
(Continued)
TEMPERATURE (°C)
3.0 2.5 2.0 1.5 IBIAS - (nA) 1.0 0.5 0.0 -0.5 -1.0 -1.5 -2.0 -2.5 -40
TEMPERATURE (°C)
3.0 2.5 2.0 1.5 IBIAS - (nA)
2.5 2.0 MAX IOS (nA) MEDIAN 1.5 1.0 0.5 0.0 -0.5 -1.0 MIN -1.5 -2.0
MAX MEDIAN
TEMPERATURE (°C)
FN6312.1 June 28, 2007
(Continued)
TEMPERATURE (°C)
CMRR (dB)
TEMPERATURE (°C)
MEDIAN
TEMPERATURE (°C)
FN6312.1 June 28, 2007
(Continued)
TEMPERATURE (°C)
+ OUTPUT SHORT CIRCUIT CURRENT (mA)
TEMPERATURE (°C)
FN6312.1 June 28, 2007
ISL28286, ISL28486 Pin Descriptions
V+ V+ LOGIC PIN VCIRCUIT 2 CIRCUIT 3 OUT VVCIRCUIT 4
V+ IN-
CAPACITIVELY COUPLED ESD CLAMP
IN+ V-
CIRCUIT 1
FN6312.1 June 28, 2007
ISL28286, ISL28486 Applications Information
Introduction
Enable / Disable Feature
Rail-to-Rail Input
Using Only One Channel
The ISL28286 and ISL28486 are dual and quad channel op amps. If the application only requires one channel when using the ISL28286 or less than 4 channels when using the ISL28486, the user must configure the unused channel(s) to prevent them from oscillating. The unused channel(s) will oscillate if the input and output pins are floating. This will result in higher than expected supply currents and possible noise injection into the channel being used. The proper way to prevent this oscillation is to short the output to the negative input and ground the positive input (as shown in Figure 37).
+ 1 / 2 ISL28286 1 / 4 ISL28486
Input Protection
All input terminals have internal ESD protection diodes to positive and negative supply rails, limiting the input voltage to within one diode beyond the supply rails. Both parts have additional back-to-back diodes across the input terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. External series resistors may be used as an external protection to limit excessive external voltage and current from damaging the inputs.
FIGURE 37. PREVENTING OSCILLATIONS IN UNUSED CHANNELS
Proper Layout Maximizes Performance
To achieve the maximum performance of the high input impedance and low offset voltage of the ISL28286 and ISL28486, care should be taken in the circuit board layout. The PC board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. Surface coating of the circuit board will reduce surface moisture and provide a humidity barrier, reducing parasitic resistance on the board. When input leakage current is a concern, the use of guard rings around the amplifier inputs will further reduce leakage currents. Figure 38 shows a guard ring example for a unity gain amplifier that uses the low impedance amplifier output at the same voltage as the high impedance input to eliminate surface leakage. The guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. For further reduction of leakage currents, components can be mounted to the PC board using Teflon standoff insulators.
Input Bias Current Compensation
The ISL28286 and ISL28486 contain an input bias cancellation circuit which reduces the bias currents down to a typical of 500pA while maintaining an excellent bandwidth for a micro-power operational amplifier. The input stage transistors are still biased with adequate current for speed but the canceling circuit sinks most of the base current, leaving a small fraction as input bias current.
Rail-to-Rail Output
A pair of complementary MOSFET devices are used to achieve the rail-to-rail output swing. The NMOS sinks current to swing the output in the negative direction. The PMOS sources current to swing the output in the positive
FN6312.1 June 28, 2007
ISL28286, ISL28486
HIGH IMPEDANCE INPUT IN V+
where: · PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) · PDMAX for each amplifier can be calculated as follows:
FIGURE 38. GUARD RING EXAMPLE FOR UNITY GAIN AMPLIFIER
Current Limiting
The ISL28286 and ISL28486 have no internal currentlimiting circuitry. If the output is shorted, it is possible to exceed the Absolute Maximum Rating for output current or power dissipation, potentially resulting in the destruction of the device.
Power Dissipation
It is possible to exceed the +150°C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related as follows:
FN6312.1 June 28, 2007
ISL28286, ISL28486 Mini SO Package Family (MSOP)
MDP0043
PIN #1 I.D.
e C SEATING PLANE 0.10 C N LEADS b
L1 A c SEE DETAIL "X"
2. Plastic interlead protrusions of 0.25mm maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
A2 GAUGE PLANE L DETAIL X
FN6312.1 June 28, 2007
ISL28286, ISL28486 Quarter Size Outline Plastic Packages Family (QSOP)
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY INCHES SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
PIN #1 I.D. MARK
e C SEATING PLANE 0.004 C 0.007 C A B b
L1 A c SEE DETAIL "X"
NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and / or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 14
FN6312.1 June 28, 2007