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VOS: maximum drift: V/°C maximum Ultrastable time: month maximum noise
Top Searches for this datasheetUltralow Offset Voltage Operational Amplifier OP07 VOS: maximum drift: V/°C maximum Ultrastable time: month maximum noise: maximum Wide input voltage range: typical Wide supply voltage range: 125°C temperature-tested dice CONFIGURATION TRIM OP07 TRIM 00316-001 CONNECT Figure APPLICATIONS Wireless base station control circuits Optical network control circuits Instrumentation Sensors controls Thermocouples Resistor thermal detectors (RTDs) Strain bridges Shunt current measurements Precision filters GENERAL DESCRIPTION OP07 very input offset voltage maximum OP07E) that obtained trimming wafer stage. These offset voltages generally eliminate need external nulling. OP07 also features input bias current OP07E) high open-loop gain (200 V/mV OP07E). offset high open-loop gain make OP07 particularly useful high gain instrumentation applications. wide input voltage range minimum combined with high CMRR (OP07E) high input impedance provide high accuracy noninverting circuit configuration. Excellent linearity gain accuracy maintained even high closed-loop gains. Stability offsets gain with time variations temperature excellent. accuracy stability OP07, even high gain, combined with freedom from external nulling have made OP07 industry standard instrumentation applications. OP07 available standard performance grades. OP07E specified operation over 70°C range, OP07C specified over -40°C +85°C temperature range. OP07 available epoxy 8-lead PDIP 8-lead narrow SOIC packages. CERDIP TO-99 packages standard microcircuit drawing (SMD) versions, OP77. R2A1 R2B1 (OPTIONAL NULL) NONINVERTING INPUT INVERTING INPUT 00316-002 ELECTRONICALLY ADJUSTED CHIP FACTORY MINIMUM INPUT OFFSET VOLTAGE. Figure Simplified Schematic Rev. Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. Specifications subject change without notice. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective owners. Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2006 Analog Devices, Inc. rights reserved. OP07 TABLE CONTENTS Features Applications. General Description Configuration. Revision History Specifications. OP07E Electrical Characteristics OP07C Electrical Characteristics Absolute Maximum Ratings Thermal Resistance Caution.6 Typical Performance Characteristics Typical Applications. Applications Information. Outline Dimensions Ordering Guide REVISION HISTORY 7/06-Rev. Changes Features. Changes General Description Changes Specifications Section. Changes Table Changes Figure Figure Changes Figure Figure Changes Figure Changes Figure Figure Changes Figure Figure Replaced Figure Changes Applications Information Section. Updated Outline Dimensions Changes Ordering Guide 8/03-Rev. Rev. Changes OP07E Electrical Specifications Changes OP07C Electrical Specifications. Edits Ordering Guide Edits Figure Updated Outline Dimensions 3/03-Rev. Rev. Updated Package Titles.Universal Updated Outline Dimensions. 2/02-Rev. Rev. Edits Features.1 Edits Ordering Guide Edits Connection Drawings Edits Absolute Maximum Ratings Deleted Electrical Characteristics Deleted OP07D Column from Electrical Characteristics. Edits TPCs Edits High-Speed, Composite Amplifier Rev. Page OP07 SPECIFICATIONS OP07E ELECTRICAL CHARACTERISTICS unless otherwise noted. Table Parameter INPUT CHARACTERISTICS 25°C Input Offset Voltage Long-Term Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density Symbol Conditions Unit VOS/Time Input Noise Current Input Noise Current Density Input Resistance, Differential Mode Input Resistance, Common Mode Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain 70°C Input Offset Voltage1 Voltage Drift Without External Trim4 Voltage Drift with External Trim3 Input Offset Current Input Offset Current Drift Input Bias Current Input Bias Current Drift Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain OUTPUT CHARACTERISTICS 25°C Output Voltage Swing RINCM CMRR PSRR ±0.5 ±1.2 0.35 10.3 10.0 0.32 0.14 0.12 ±1.5 ±13.5 ±4.0 18.0 13.0 11.0 0.80 0.23 0.17 V/Month nV/Hz nV/Hz nV/Hz pA/Hz pA/Hz pA/Hz V/mV V/mV V/°C V/°C pA/°C pA/°C V/mV TCVOS TCVOSN TCIOS TCIB CMRR PSRR ±5.5 ±12.5 ±12.0 ±10.5 ±13.0 ±12.8 ±12.0 ±12.6 70°C Output Voltage Swing Rev. Page OP07 Parameter DYNAMIC PERFORMANCE 25°C Slew Rate Closed-Loop Bandwidth Open-Loop Output Resistance Power Consumption Offset Adjustment Range Symbol Conditions Unit AVOL load load Input offset voltage measurements performed automated test equipment approximately seconds after application power. Long-term input offset voltage stability refers averaged trend time time over extended periods after first days operation. Excluding initial hour operation, changes during first operating days typically Refer Typical Performance Characteristics section. Parameter sample tested. Sample tested. Guaranteed design. Guaranteed tested. OP07C ELECTRICAL CHARACTERISTICS unless otherwise noted. Table Parameter INPUT CHARACTERISTICS 25°C Input Offset Voltage Long-Term Stability Input Offset Current Input Bias Current Input Noise Voltage Input Noise Voltage Density Symbol Conditions Unit VOS/Time Input Noise Current Input Noise Current Density Input Resistance, Differential Mode Input Resistance, Common Mode Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain -40°C +85°C Input Offset Voltage1 Voltage Drift Without External Trim4 Voltage Drift with External Trim3 Input Offset Current Input Offset Current Drift Input Bias Current Input Bias Current Drift Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Large Signal Voltage Gain RINCM CMRR PSRR ±0.5 ±1.8 0.38 10.5 10.2 0.35 0.15 0.13 ±2.2 ±13.5 ±7.0 0.65 20.0 13.5 11.5 0.90 0.27 0.18 V/Month nV/Hz nV/Hz nV/Hz pA/Hz pA/Hz pA/Hz V/mV V/mV V/°C V/°C pA/°C pA/°C V/mV TCVOS TCVOSN TCIOS TCIB CMRR PSRR ±9.0 Rev. Page OP07 Parameter OUTPUT CHARACTERISTICS 25°C Output Voltage Swing Symbol Conditions Unit ±12.0 ±11.5 ±13.0 ±12.8 ±12.0 ±12.6 -40°C +85°C Output Voltage Swing DYNAMIC PERFORMANCE 25°C Slew Rate Closed-Loop Bandwidth Open-Loop Output Resistance Power Consumption Offset Adjustment Range AVOL load load Input offset voltage measurements performed automated test equipment approximately seconds after application power. Long-term input offset voltage stability refers averaged trend time time over extended periods after first days operation. Excluding initial hour operation, changes during first operating days typically Refer Typical Performance Characteristics section. Parameter sample tested. Sample tested. Guaranteed design. Guaranteed tested. Rev. Page OP07 ABSOLUTE MAXIMUM RATINGS Table Parameter Supply Voltage (VS) Input Voltage1 Differential Input Voltage Output Short-Circuit Duration Storage Temperature Range Packages Operating Temperature Range OP07E OP07C Junction Temperature Lead Temperature, Soldering sec) Ratings Indefinite -65°C +125°C 70°C -40°C +85°C 150°C 300°C Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum rating conditions extended periods affect device reliability. THERMAL RESISTANCE specified worst-case conditions, that device soldered circuit board surface-mount packages. Table Thermal Resistance Package Type 8-Lead PDIP (P-Suffix) 8-Lead SOIC_N (S-Suffix) Unit °C/W °C/W supply voltages less than absolute maximum input voltage equal supply voltage. CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although this product features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality. Rev. Page OP07 TYPICAL PERFORMANCE CHARACTERISTICS 1000 MAXIMUM ERROR REFERRED INPUT (mV) ±15V ±15V 25°C OPEN-LOOP GAIN (V/mV) 00316-003 OP07C OP07E 100k 00316-006 00316-008 TEMPERATURE (°C) MATCHED UNMATCHED SOURCE RESISTANCE Figure Open-Loop Gain Temperature Figure Maximum Error Source Resistance MAXIMUM ERROR REFERRED INPUT (mV) ±15V 70°C ±15V 25°C, 70°C ABSOLUTE CHANGE INPUT OFFSET VOLTAGE (µV) THERMAL SHOCK RESPONSE BAND OP07C OP07E 100k 00316-007 DEVICE IMMERSED 70°C BATH TIME (Seconds) 00316-004 MATCHED UNMATCHED SOURCE RESISTANCE Figure Offset Voltage Change Thermal Shock NONINVERTING INPUT BIAS CURRENT (nA) Figure Maximum Error Source Resistance |VDIFF| 1.0V, (OP07C) ±15V 25°C ±15V 25°C ABSOLUTE CHANGE INPUT OFFSET VOLTAGE (µV) OP07C OP07E 00316-005 TIME AFTER SUPPLY TURN-ON (Minutes) DIFFERENTIAL INPUT VALUE Figure Warm-Up Drift Figure Input Bias Current Differential Input Voltage Rev. Page OP07 ±15V 1000 200k THERMAL NOISE SOURCE RESISTORS INCLUDED EXCLUDED INPUT BIAS CURRENT (nA) OP07C INPUT NOISE VOLTAGE (nV/ OP07E ±15V 25°C 00316-009 FREQUENCY (Hz) 1000 TEMPERATURE (°C) Figure Input Bias Current Temperature ±15V Figure Total Input Noise Voltage Frequency ±15V 25°C INPUT OFFSET CURRENT (nA) NOISE (µV) OP07C OP07E 00316-010 BANDWIDTH (Hz) 100k TEMPERATURE (°C) Figure Input Offset Current Temperature Figure Input Wideband Noise Bandwidth, Frequency Indicated REFERRED INPUT 5mV/CM OUTPUT VOLTAGE (200nV/DIV) OP07C CMRR (dB) 00316-011 100k TIME (1s/DIV) FREQUENCY (Hz) Figure Frequency Noise Figure CMRR Frequency Rev. Page 00316-014 00316-013 -100 00316-012 OP07 25°C OP07C ±15V 25°C CLOSED-LOOP GAIN (dB) 00316-015 PSRR (dB) 100k FREQUENCY (Hz) FREQUENCY (Hz) Figure PSRR Frequency 1000 25°C Figure Closed-Loop Frequency Response Various Gain Configurations PEAK-TO-PEAK AMPLITUDE ±15V 25°C OPEN-LOOP GAIN (V/mV) 00316-016 100k FREQUENCY (Hz) POWER SUPPLY VOLTAGE Figure Open-Loop Gain Power Supply Voltage ±15V 25°C Figure Maximum Output Swing Frequency ±15V ±10mV 25°C OPEN-LOOP GAIN (dB) MAXIMUM OUTPUT POSITIVE SWING NEGATIVE SWING 00316-017 100k LOAD RESISTANCE GROUND FREQUENCY (Hz) Figure Open-Loop Frequency Response Figure Maximum Output Voltage Load Resistance Rev. Page 00316-020 00316-019 00316-018 OP07 1000 ABSOLUTE VALUE OFFSET VOLTAGE (µV) 25°C 30.0 TRIMMED 25°C NULLING 22.5 OP07C 15.0 OP07C OP07E OP07E POWER CONSUMPTION (mW) 00316-021 TOTAL SUPPLY VOLTAGE, TEMPERATURE (°C) Figure Power Consumption Power Supply OUTPUT SHORT-CIRCUIT CURRENT (mA) ±15V 25°C TOTAL DRIFT WITH TIME (µV) Figure Trimmed Offset Voltage Temperature 0.3µV/MONTH TREND LINE 0.3µV/MONTH TREND LINE 0.3µV/MONTH TREND LINE 0.2µV/MONTH TREND LINE 0.2µV/MONTH TREND LINE (PIN +10mV, -15V 0.2µV/MONTH TREND LINE (PIN -10mV, +15V 00316-022 TIME FROM OUTPUT BEING SHORTED (Minutes) TIME (Months) Figure Output Short-Circuit Current Time 85.00 Figure Offset Voltage Drift Time ABSOLUTE VALUE OFFSET VOLTAGE (µV) ±15V OP07C 63.75 42.50 OP07E 21.25 TEMPERATURE (°C) Figure Untrimmed Offset Voltage Temperature 00316-023 Rev. Page 00316-025 00316-024 -100 OP07 TYPICAL APPLICATIONS MODE BIAS AD7115 AD8510 ±10V OP07C 100k FD333 00316-026 OP07 FD333 OP07 +10V -EIN Figure Typical Offset Voltage Test Circuit Figure Burn-In Circuit MODE BIAS +15V OP07C 100k OP07C OP07C 2.5k 00316-027 -15V NOTES PINOUT SHOWN PACKAGE Figure Typical Frequency Noise Circuit Figure High Speed, Composite Amplifier INPUT +15V OP07 OP07 2.5k 00316-031 00316-028 -15V NOTES PINOUT SHOWN PACKAGE Figure Optional Offset Nulling Circuit Figure Adjustment-Free Precision Summing Amplifier Rev. Page 00316-030 -EIN 00316-029 OP07 SENDING JUNCTION APPLICATIONS INFORMATION OP07 provides stable operation with load capacitance swings; larger capacitances should decoupled with decoupling resistor. REFERENCE JUNCTION OP07 NOTES PINOUT SHOWN PACKAGE Figure High Stability Thermocouple Amplifier ±10V FD333 FD333 00316-033 OP07 OP07 +10V NOTES PINOUT SHOWN PACKAGE Figure Precision Absolute-Value Circuit 00316-032 Stray thermoelectric voltages generated dissimilar metals contacts input terminals degrade drift performance. Therefore, best operation obtained when both input contacts maintained same temperature, preferably close package temperature. Rev. Page OP07 OUTLINE DIMENSIONS 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 6.20 (0.2440) 5.80 (0.2284) 1.27 (0.0500) 0.25 (0.0098) 0.10 (0.0040) COPLANARITY 0.10 SEATING PLANE 1.75 (0.0688) 1.35 (0.0532) 0.50 (0.0196) 0.25 (0.0099) 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.51 (0.0201) 0.31 (0.0122) COMPLIANT JEDEC STANDARDS MS-012-A CONTROLLING DIMENSIONS MILLIMETERS; INCH DIMENSIONS PARENTHESES) ROUNDED-OFF MILLIMETER EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN. Figure 8-Lead Standard Small Outline Package [SOIC_N] Narrow Body S-Suffix (R-8) Dimensions shown millimeters (inches) 0.400 (10.16) 0.365 (9.27) 0.355 (9.02) 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.100 (2.54) 0.210 (5.33) 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.060 (1.52) 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) 0.015 (0.38) SEATING PLANE 0.005 (0.13) 0.015 (0.38) GAUGE PLANE 0.430 (10.92) 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) COMPLIANT JEDEC STANDARDS MS-001 CONTROLLING DIMENSIONS INCHES; MILLIMETER DIMENSIONS PARENTHESES) ROUNDED-OFF INCH EQUIVALENTS REFERENCE ONLY APPROPRIATE DESIGN. CORNER LEADS CONFIGURED WHOLE HALF LEADS. 060506-A Figure 8-Lead Plastic Dual-in-Line Package [PDIP] P-Suffix (N-8) Dimensions shown inches (millimeters) Rev. Page 070606-A OP07 ORDERING GUIDE Model OP07EP OP07EPZ OP07CP OP07CPZ1 OP07CS OP07CS-REEL OP07CS-REEL7 OP07CSZ1 OP07CSZ-REEL1 OP07CSZ-REEL71 Temperature Range 70°C 70°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C -40°C +85°C Package Description 8-Lead PDIP 8-Lead PDIP 8-Lead PDIP 8-Lead PDIP 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N 8-Lead SOIC_N Package Option (P-Suffix) (P-Suffix) (P-Suffix) (P-Suffix) (S-Suffix) (S-Suffix) (S-Suffix) (S-Suffix) (S-Suffix) (S-Suffix) Pb-free part. Rev. Page OP07 NOTES Rev. Page OP07 NOTES ©2006 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners. C00316-0-7/06(D) Rev. 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