IW4011B NAND gates provide system designer with direct implementation

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IW4011B NAND gates provide system designer with direct implementation

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IW4011B
IW4011B NAND gates provide system designer with direct implementation NAND function.
Operating Voltage Range: over full packageMaximum input current temperature range Noise margin (over full package temperature range): supply 10.0 supply 15.0 supply
Package
Logic Diagram
Assignment
BEIJING ESTEK ELECTRONICS CO.,LTD
IW4011B
Absolute Maximum Ratings
Symbol Parameter Supply Voltage (Referenced GND) Input Voltage (Referenced GND) Input Current, Power Dissipation Still Air, Plastic DIP+ SOIC Package+ Tstg Power Dissipation Output Transistor Storage Temperature Lead Temperature, from Case Seconds (Plastic SOIC Package) Maximum Ratings those values beyond which damage device occur. Functional operation should restricted Recommended Operating Conditions. +Derating Plastic DIP: from 125C SOIC Package: from 65to 125C +150 Value -0.5 -0.5 +0.5 Unit
Recommended Operating Conditions
Symbol VIN, VOUT Parameter Supply Voltage (Referenced GND) Input Voltage, Output Voltage (Referenced GND) Operating Temperature, Package Types
Unit
+125
This device contains protection circuitry guard against damage high static voltages electric fields. However, precautions must taken avoid applications voltage higher than maximum rated voltages this high-impedance circuit. proper operation, should constrained range (VIN VOUT) Unused inputs must always tied appropriate logic voltage level (e.g., either CC). Unused outputs must left open.
BEIJING ESTEK ELECTRONICS CO.,LTD
IW4011B
Electrical Characteristics
(Voltages Referenced GND)
Symbol Parameter Test Conditions Guaranteed Limit -55C Minimum High-Level Input Voltage VOUT=0.5 VOUT=1.0 VOUT=1.5 VOUT= 0.5V Maximum -Level Input Voltage VOUT= VOUT= 1.5V VIN=GND Minimum High-Level Output Voltage Maximum Low-Level Output Voltage VIN= Maximum Input Leakage Current Maximum iescent VIN= 0.25 0.25 0.64 0.51 0.36 -2.0 -0.64 -1.6 -4.2 -1.6 -0.51 -1.3 -3.4 -1.15 -0.36 -0.9 -2.4 VIN= 4.95 9.95 14.95 0.05 0.05 0.05 4.95 9.95 14.95 0.05 0.05 0.05 4.95 9.95 14.95 0.05 0.05 0.05 Unit
Supply Current (per Package) Minimum Output VIN= UOL=0.4 (Sink) Current UOL=0.5 UOL=1.5 VIN= Minimum Output High (Source) Current UOH=2.5 UOH=4.6 UOH=9.5 UOH=13.5
BEIJING ESTEK ELECTRONICS CO.,LTD
IW4011B
Electrical Characteristics
=50pF, =200 Input Guaranteed Limit tTLH, tTHL Maximum Output Transition Time, Output (Figure Maximum Input Capacitance -55C 125C Unit
Symbol tPLH, tPHL
Parameter Maximum Propagation Delay, Input Output (Figure
INPUT
tPLH OUTPUT
Figure Switching Waveforms
Expanded Logic Diagram (1/4 Device)
Address
Postalcode:100039 Tel: 86-010-58895780 Http://www.estek.com.cn Email:sales@estek.com.cn
6A06-6A07 6A07,Changyin Office Building ,No.88,Yong Ding Road,Hai Dian District ,Beijing
010-58895793
No:01-060831
BEIJING ESTEK ELECTRONICS CO.,LTD

IW4011B NAND gates provide system designer with direct implementation

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