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IW4049B

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IW4049B
Description
The IW4049B is hex buffers and feature logic-level conversion using only one supply (voltage Vcc).The input- signal high (Vih) can exceed the Vcc supply voltage when these devices are used for logic -level conversions. These devices are intended for use as CMOS to DTL / TTL converters
Features
Operating Voltage Range: 3.0 to 18 V at 18 V over full packageMaximum input current of 1 u A temperature range 100 nA at 18 V and 25 C Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply 16 16 DIP - 16 SOP - 16
Package
Logic Diagram Pin Assignment
A3 GND
Function Table
Inputs A H L Output Y L H
BEIJING ESTEK ELECTRONICS CO., LTD
IW4049B
Absolute Maximum Ratings
Symbol VCC V IN VOUT IIN PD PD Tstg TL Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP Value -0.5 to 20 to +18 V -0.5 to VCC+0.5 + 10 750 500 100 -65 to 150 260 Unit V V V mA mW mW ° C ° C
SOIC Package Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package)
Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. Derating - Plastic DIP: - 10 mW / ° from 65°to 125 ° C C ° from 65° 125 ° C to C SOIC Package The IW4049B has high-to-low level voltage conversion capability but not low-to-high level, thefore it is recommended that Vin Vcc
Recommended Operating Conditions
Symbol VCC VIN VOUT TA Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) Operating Temperature, All Package Types Min 3.0 VCC 0 -55 Max 18 18 VCC 125 Unit V V V ° C
The IW4049B has high-to-low level voltage conversion capability but not low-to-high level, thefore it is recommended that Vcc Vin This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, V IN and V OUT should be constrained to the range GND (VIN or VOUT) VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC Unused outputs must be left open.
BEIJING ESTEK ELECTRONICS CO., LTD
IW4049B
DC Electrical Characteristics
Maximum Low-Level Output Voltage
Maximum Input Leakage Current
ICC Maximum Quiescent Supply Current (per Package) IOL Minimum Output Low (Sink) Current
Minimum Output High (Source) Current
mA -1.18 -3.1
BEIJING ESTEK ELECTRONICS CO., LTD
IW4049B
AC Electrical Characteristics
Unit ns
Maximum Propagation Delay, Input A to Output Y (Figure 1)
Maximum Output Transition Time, Any Output (Figure 1) Maximum Output Transition Time, Any Output (Figure 1) Maximum Input Capacitance
INPUT A tPHL OUTPUT Y
Vcc GND tPLH Vcc
GND Figure 1. Switching Waveforms
BEIJING ESTEK ELECTRONICS CO., LTD
IW4049B
Expanded Logic Diagram (1 / 6 of the Device)
Address :
Postalcode:100039 Tel: 86-010-58895780 / 81 / 82 / 83 / 84 Http: / / www.estek.com.cn Email:sales@estek.com.cn
6A06-6A07 Rm 6A07, Changyin Office Building , No.88, Yong Ding Road, Hai Dian District , Beijing
Fax : 010-58895793
REV No:01-060836
BEIJING ESTEK ELECTRONICS CO., LTD