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Voltage Operation 1.8V 5.5V Ambient Temperature: Organized:


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24C32 24C64
Voltage Operation
1.8V 5.5V
Ambient Temperature: Organized:
24C32, 4096 (32K bits) 24C64, 8192 (64K bits)
(5V), (1.8V, 2.5V, 2.7V) Compatibility Protect Hardware Data Protection Page (32K, 64K) Write Modes Page Writes Allowed Write Cycle max)
Endurance: Million Write Cycles Data Retention: Years
Serial Interface Trigger, Filtered Inputs Noise Suppression Data Transfer Protocol
PDIP, 8-lead 8-lead TSSOP Packages Sales: Wafer Form, Waffle Pack
General Description
24C32/ 24C64 provides 32,768/65,536 bits serial electrically erasable programmable read-only memory 24C32/ 24C64 available
(EEPROM) organized 4096/8192 words bits each. device optimized many industrial commercial applications where low-power low-voltage operation essential. space-saving 8-lead PDIP, 8-lead SOP, 8-lead TSSOP packages accessed two-wire serial interface.
Configuration
8-lead PDIP
8-lead
8-lead TSSOP
Descriptions
Configuration
Designation Type Name Functions
Address Inputs Serial Data Serial Clock Input Write Protect Ground Power Supply
Open-drain
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Block Diagram
START STOP LOGIC SERIAL CONTROL LOGIC LOAD COMP DEVICE ADDRESS COMPARATOR HIGH VOLTAGE PUMP/TIMING
DATA RECOVERY
LOAD
DATA WORD ADDRESS COUNTER
DECODER
EEPROM
DECODER
SERIAL
DOUT/ACKNOWLEDG
DOUT
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Descriptions
DEVICE/PAGE ADDRESSES (A2, A0): pins device address inputs that hard wired 24C32/ 24C64. Eight 32K/64K devices addressed single system (device addressing discussed detail under Device Addressing section). SERIAL DATA (SDA): bi-directional serial data transfer. This open-drain driven wire-ORed with number other open-drain open- collector devices. SERIAL CLOCK (SCL): input used positive edge clock data into each EEPROM device negative edge clock data each device. WRITE PROTECT (WP): 24C32/ 24C64 Write Protect that provides hardware data protection.
Write Protect allows normal read/write operations when connected ground (GND). When Write Protect connected write protection feature enabled operates shown following Table
Write Protect
Status Part Array Protected
24C32 Full (32K) Array Normal Read Write Operations
24C64 Full (64K) Array
Memory Organization
24C32, SERIAL EEPROM: Internally organized with pages bytes each, requires 12-bit data word address random word addressing. 24C64, SERIAL EEPROM: Internally organized with pages bytes each, requires 13-bit data word address random word address
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Device Operation
CLOCK DATA TRANSITIONS: normally pulled high with external device. Data change only during time periods (see Figure page Data changes during high periods will indicate start stop condition defined below. START CONDITION: high-to-low transition with high start condition which must precede other command (see Figure page STOP CONDITION: low-to-high transition with high stop condition. After read sequence, stop command will place EEPROM standby power mode (see Figure page ACKNOWLEDGE: addresses data words serially transmitted from EEPROM 8-bit words. EEPROM sends acknowledge that received each word. This happens during ninth clock cycle. STANDBY MODE: 24C32/ 24C64 features low-power standby mode which enabled: upon power-up
after receipt STOP completion internal operations MEMORY RESET: After interruption protocol, power loss system reset, two-wire part reset following these steps: Clock cycles. Look high each cycle while high. Create start condition.
Data Validity
DATA STABLE DATA CHANGE DATA STABL
Start Stop Definition
START
STOP
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Output Acknowledge
DATA
DATA
START
ACKNOWLEDG
Device Addressing
EEPROM devices require 8-bit device address word following start condition enable chip read write operation (see Figure page device address word consists mandatory "1", sequence first four most significant bits shown. This common Serial EEPROM devices. next bits device address bits 32K/64K EEPROM. These bits must compare their corresponding hardwired input pins. eighth device address read/write operation select bit. read operation initiated this high write operation initiated this low. Upon compare device address, EEPROM will output "0". compare made, chip will return standby state.
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Write Operations
BYTE WRITE: write operation requires 8-bit data word address following device address word acknowledgment. Upon receipt this address, EEPROM will again respond with then clock first 8bit data word. Following receipt 8-bit data word, EEPROM will output addressing device, such microcontroller, must terminate write sequence with stop condition. this time EEPROM enters internally timed write cycle, tWR, nonvolatile memory. inputs disabled during this write cycle EEPROM will respond until write complete (see Figure page PAGE WRITE: 32K/64K EEPROM capable 32-byte page write. page write initiated same byte write, microcontroller does send stop condition after first data word clocked Instead, after EEPROM acknowledges receipt first data word, microcontroller transmit (32K, 64K) more data words. EEPROM will respond with after each data word received. microcontroller must terminate page write sequence with stop condition (see Figure page data word address lower five (32K, 64K) bits internally incremented following receipt each data word. higher data word address bits incremented, retaining memory page location. When word address, internally generated, reaches page boundary, following byte placed beginning same page. more than (32K, 64K) data words transmitted EEPROM, data word address will "roll over" previous data will overwritten. ACKNOWLEDGE POLLING: Once internally timed write cycle started EEPROM inputs disabled, acknowledge polling initiated. This involves sending start condition followed device address word. read/write representative operation desired. Only internal write cycle completed will EEPROM respond with "0", allowing read write sequence continue.
Read Operations
Read operations initiated same write operations with exception that read/write select device address word "1". There three read operations: current address read, random address read sequential read. CURRENT ADDRESS READ: internal data word address counter maintains last address accessed during last read write operation, incremented one. This address stays valid between operations long chip power maintained. address "roll over" during read from last byte last memory page first byte first page. address "roll over" during write from last byte current page first byte same page. Once device address with read/write select clocked acknowledged EEPROM, current address data word serially clocked out. microcontroller does respond with input does generate following stop condition (see Figure page
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Read Operations
RANDOM READ: random read requires "dummy" byte write sequence load data word address. Once device address word data word address clocked acknowledged EEPROM, microcontroller must generate another start condition. microcontroller initiates current address read sending device address with read/write select high. EEPROM acknowledges device address serially clocks data word. microcontroller does respond with does generate following stop condition (see Figure page SEQUENTIAL READ: Sequential reads initiated either current address read random address read. After microcontroller receives data word, responds with acknowledge. long EEPROM receives acknowledge, will continue increment data word address serially clock sequential data words. When memory address limit reached, data word address will "roll over" sequential read will continue. sequential read operation terminated when microcontroller does respond with does generate following stop condition (see Figure page
Device Address
32K/64K
Byte Write
DEVICE ADDRESS LINE FIRST WORD SECOND WORD ADDRESS ADDRESS DATA
Page Write
DEVICE ADDRESS LINE FIRST WORD SECOND WORD ADDRESS ADDRESS DATA( DATA( DATA(
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Current Address Read
DEVICE ADDRESS LINE
DATA
Random Read
DEVICE 1st, WORD ADDRESS ADDRESS(n) LINE DEVICE ADDRESS
DATA(
DUMMY WRIT
Sequential Read
DEVICE ADDRESS LINE
DATA(
DATA(
DATA(
DATA(
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Electrical Characteristics
Maximum Stress Ratings
Supply Voltage .-0.3V +6.5V Input Output Voltage .GND-0.3V VCC+0.3V Operating Ambient Temperature Storage Temperature +150
Stresses above those listed under "Absolute Maximum Ratings" cause permanent damage this device. These stress ratings only. Functional operation this device these other conditions above those indicated operational sections this specification implied intended. Exposure absolute maximum rating conditions extended periods affect device reliability.
Electrical Characteristics
over recommended operating range from:
Parameter Symbol
+1.8V +5.5V (unless otherwise noted)
Typ. Max. Unit Condition
Min.
Supply Voltage Supply Current 5.0V Supply Current 5.0V Standby Current Input Leakage Current Output Leakage Current Input Level Input High Level Output Level =5.0V Output Level =3.0V Output Level =1.8V
ICC1 ICC2 VOL3 VOL2 VOL1
-0.6
0.05
0.15 READ WRITE VOUT
Capacitance
over recommended operating range from
Parameter Symbol
MHz, +1.8V
Typ. Max. Unit Condition
Min.
Input/Output Capacitance (SDA) Input Capacitance (A0, SCL)
CI/O
VI/O
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Electrical Characteristics
over recommended operating range from
(unless otherwise noted)
Parameter Symbol
+1.8V +5.5V, Gate
1.8-volt 5.0-volt Max. Min. Typ. Max.
Min.
Typ.
Units
Clock Frequency, Clock Pulse Width Clock Pulse Width High Noise Suppression Time Clock Data Valid Time must free before transmission start Start Hold Time Start Setup Time Data Hold Time Data Setup Time Inputs Rise Time(1) Inputs Fall Time(1) Stop Setup Time Data Hold Time Write Cycle Time 5.0V, Byte Mode
fSCL tLOW tHIGH tBUF tHD.STA tSU.STA tHD.DAT tSU.DAT tSU.STO
Endurance
0.05
0.05 0.25 0.25 0.25
1000 0.55
Write Cycles
Note
This parameter characterized 100% tested. measurement conditions: (connects VCC): Input rise fall time: (2.5V, 5V), (1.8V)
Input pulse voltages: Input output timing reference voltages: value should concerned according actual loading user's system.
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Timing
SCL: Serial Clock, SDA: Serial Data
tLOW tSU.STA tHD.STA tHD.DAT tSU.DAT tSU.STO tHIGH tLOW
SDA_IN tBUF
SDA_OUT
Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data
tWR(1) STOP CONDITION START CONDITION
Note
write cycle time time from valid stop condition write sequence internal clear/write cycle.
BEIJING ESTEK ELECTRONICS CO.,LTD
24C32 24C64
Ordering Information
Code Number Part Number
1.Prefix 2.Series Name Two-wire (I2C) Interface 3.EEPROM Density C32=32K bits C64=64K bits
8.Plating Technology Blank Standard SnPb plating ECOPACK(RoHS compliant) 9.Operating Voltage S=2.7~5.5 A=1.8~5.5
4.Design Option (Blank) 5.Package Type TSSOP Wafer/die
Temperature Range
Temp(0 C-70
Temp(-40 C-125 7.Pack Type Tube Tape Reel
Temp(-40 C-85
Product Datasheet Change Notice
Datasheet Revision History Version Content Date
Datasheet
Mar., 2007
BEIJING ESTEK ELECTRONICS CO.,LTD

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