LAMINATE fcCSP Packages: Amkor Technology offering Flip Chip (fcC

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LAMINATE fcCSP Packages: Amkor Technology offering Flip Chip (fcC

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fcCSP
LAMINATE
fcCSP Packages: Amkor Technology offering Flip Chip (fcCSP) package flip chip solution package format. This package construction utilizes eutectic tin/lead (63Sn/37Pb) flip chip interconnect technology, either area array peripheral bump layout, replacing standard wirebond interconnect. advantages flip chip interconnect twofold: provides enhanced electrical performance over standard wirebond technology, allows smaller form factor increased routing density, ability area array bumps elimination wirebond loops. Current wafer bump technology flip chip assembly process allows minimum peripheral flip chip bumping, area array bumping. fcCSP based Amkor's proprietary ChipArray® (CABGA) package construction, using cutting edge thin core laminate substrates. package assembled strip format, gang molded singulated manufacturing efficiency cost minimization. Laser ablated solder mask technology, via-in-pad substrate structure, thin core substrate panel processing allow increased routing density enhanced electrical performance, making fcCSP attractive option advanced applications where electrical performance critical factor. fcCSP available both thin core laminate substrate technology, well ceramic substrate technology. Package size ranges from accommodating ball pitches from addition technology, fcCSP also available format, allowing lower minimum package thickness. Ceramic flip chip package provides maximum flexibility designers number layers routing. Current production from 1800 LGA, (solder column interposer) formats, 1.27 pitch. AlSiC lids attached maximum thermal dissipation.
VISIT AMKOR TECHNOLOGY ONLINE LOCATIONS VIEW MOST CURRENT PRODUCT INFORMATION.
Designed high frequency applications 1800 ball counts Target Market Cell Phones, Hand-held Electronics Thin core laminate ceramic package construction Overmolded handling second level reliability Accommodates package sizes from Flip Chip bump pitches min. peripheral array, min. area array Available ball pitch, well interconnect Minimum nominal package thickness 0.80 interconnect, pitch, pitch Turnkey Solution Design, bumping, bumped wafer probe, backgrind, assembly, test Much better signal noise ratio higher frequencies (>1Ghz) inductance flip chip bumps short, direct signal path Flexible customized substrate routing
Thermal Performance:
Theta (°CW) lead package with 1.75 2.27 die, pitch, mold LFPM, layer board Junction ambient thermal resistance 48.1 °C/W body, ball pitch 0.26 2.16 Inductance Capacitance 0.18 0.38 53.9 Resistance
Simulated results
Electrical:
Reliability:
Package Level: Laminate Moisture Sensitivity Ceramic Moisture Sensitivity Temp/Humidity High temp storage Temp cycle Board Level: Thermal cycle Thermal cycle
JEDEC Level °C/60% hours JEDEC Level °C/85% hours °C/100% hours °C/85% 1000 hours 1000 hours °C/+125 1000 cycles °C/+125 cycle/hour, 3000 cycles* °C/+125 cycles/hour, 2500 cycles*
*Data body, lead, 0.33 NSMD size
www.amkor.com
DS577D Date: 07'05
fcCSP
fcBGA (Flip Chip BGA): Moderate routing density, lowest cost flip chip package intermediate ball counts. Bare Single Piece Lid. Qualified with both thin core substrates. Ball Count range 1900 Body Size range Ceramic fcBGA (Ceramic Flip Chip BGA): Alumina HiTCE flip chip packages with BGA, LGA, interconnect format. Capability high layer count enables most flexible format different ground power planes. Available bare die, AISiC Lid, cost Flat Lid. Qualified body sizes HiTCE (BGA), alumina (SCI) alumina (BGA). Applications: fcCSP package targeted high-performance workstations, servers, data communication products, internet routers high frequency packaging applications where electrical performance critical. elimination wirebond loops allows inductance connection die, while increased routing density enables optimized electrical paths critical high frequency signal lines. fcCSP also attractive option portable handheld electronics where, addition performance, package size critical.
LAMINATE
Process Highlights size (max) size Bump pitch (min) size In-line Minimum array Standard Materials Package substrate Hitachi E679 Bump 63/37 Sn/Pb Encapsulant Epoxy mold compound Solder balls Eutectic SnPb Test Services Program generation/conversion Product engineering Wafer sort +165 test available Burn-in Shipping JEDEC trays Tape reel services
Configuration Options:
Package Offering (units
Cross-section fcCSP
Body Size
Pitch
Ball Count
Matrix
Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full Full
Ceramic fcBGA
www.amkor.com
With respect information this document, Amkor makes guarantee warranty accuracy that such information will infringe upon intellectual rights third parties. Amkor shall responsible loss damage whatever nature resulting from reliance upon patent other license implied hereby. This document does extend modify Amkor's warranty product beyond that forth standard terms conditions sale. Amkor reserves right make changes product specifications time without notice.

LAMINATE fcCSP Packages: Amkor Technology offering Flip Chip (fcC

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