PT8214 PT8214 8-bit Converter with operational amplifier output b
|
|
|
Top Searches for this datasheet
8-Bit Converter
PT8214
PT8214 8-bit Converter with operational amplifier output buffers. supports maximum channels provides reference voltages which enable channels used independent channels. Digital data inputted serially controlled Pins making cascading connection between devices. Available pins, LQFP package, PT8214 capable large current drive since each channel operational amplifier output buffer. assignments application circuit optimized easy Layout cost saving advantages.
FEATURES
CMOS technology Very power consumption: Type 1.1mW/channel Max. 2.5MHz serial data input Separate supply voltages digital analog blocks R-2R resistor ladder conversion method On-chip operational amplifier output buffers: Max. +1.0/-1.0mA analog output sink/source current capability Analog data output range: analog output reference voltage Analog data outputted different reference voltages Available pins, LQFP package
APPLICATIONS
Digital equipment ROM/VCD MPEG Sound card Replacement potentiometers
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
BLOCK DIAGRAM
14-Bit Shift Register
Channel Decoder
VDD1
8-Bit Register R-2R Type 8-Bit Converter
8-Bit Register
R-2R Type 8-Bit Converter
AO24
VSS1 VDD2
8-Bit Register R-2R Type 8-Bit Converter
AO25
8-Bit Register R-2R Type 8-Bit Converter
AO30
8-Bit Register
R-2R Type 8-Bit Converter
AO31
8-Bit Register
R-2R Type 8-Bit Converter
AO36
VSS2
Note: *1=14-Bit Shift Register with MSB-First format.
PT8214 V1.0 -2January, 2006
8-Bit Converter
PT8214
CONFIGURATION
AO11 AO10 AO36
VSS1 VDD1
PT8214
AO35 AO34 AO33 AO32 VSS2 VDD2 AO31 AO30 AO29 AO28
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
Name CLK* STB* VSS1 VDD1 AO12 AO24 AO25 AO27 AO28 AO31 VSS2 AO32 AO36 AO11 Description Serial data input Shift clock input Serial data input from inputted internal shift register rising edge signal. Load strobe input When this "High", shift register contents loaded into decoder 8-bit register. Serial data output serial data shift register outputted from this pin. This allows cascade connection. Ground connection converter ground (for AO24 outputs) converter supply voltage (for AO24 outputs) converter output converter output converter output Digital block operational amplifier output buffer supply voltage (for AO25 AO36 outputs) converter ground (for AO25 AO36 outputs) converter output converter output
Note: *=DI, must fixed level when there data transfer.
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
FUNCTION PT8214 8-bit Converter which provides bits shift register digital data storage channel selection. bits shift register shown below. Last First
Converter converter output given table below. Input data Output VREF/256x1+VSS VREF/256x254+VSS VREF/256x255+VSS Note: VREF=VDD-VSS channel selection table given below. Input data Selected channel selected AO30 selected AO31 AO36 selected selected
Channel
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
TIMING GIAGRAM
Output
ANALOG OUTPUT VOLTAGE RANGE
OUTPUT VDD1, VDD2 -AMP VAOH=( VCC)
UTPUT RANG
VAOL
VSS1=VDD1=VDD2 GND=VSS1=VSS2
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Input voltage output voltage Power dissipation Operating temperature Storage temperature Symbol VDD1, VDD2 VOUT Topr Tstg Condition Ta=+25 GND=0V, VDD1VCC, VDD2VCC Ta=+25 GND=0V, should exceed VCC+0.3V Min. -0.3 -0.3 -0.3 -0.3 Typ. Max. VCC+0.3 VCC+0.3 +150 Unit
RECOMMANDED OPERATING CONDITIONS
Parameter Power supply voltage (MCU interface/OP-AMP block) Power supply voltage (Analog block)* Analog output source current Analog output sink current Analog output load capacitance (OSC limit) Symbol VDD1, VDD2 VSS1, VSS2 Condition VCC>VDD VDD1-VSS12.0V VDD2-VSS22.0V Min. Typ. Max. VCC-2.0 -1.0 +1.0 Unit
Note: *=Except Operational Analog Amplifier Output Buffer Block. VDD1 (VSS1), VDD2 (VSS2) independently set.
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
DIGITAL BLOCK ELECTRICAL CHARACTERISTICS
Parameter Active supply current (VCC)* Input leakage current (CLK, STB) level input voltage High level input voltage (CLK, STB) level output voltage (DO) High level output voltage (DO) Symbol IILK IOL=2.5mA IOH=-400µA Condition CLK=1MHz Unloaded VIN=0 Min. 0.5VCC VCC-0.4 Typ. Max. 0.2VCC Unit
Note: *=Supply current operational amplifier block included.
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
ANALOG BLOVK ELECTRICAL CHARACTERISTICS
(D/A CONVERTERS WITH OPERATIOPNAL AMPLIFIER OUTPUT BUFFERS)
Parameter Supply current VDD1, VDD2* Symbol Condition Unloaded total current value output VDD1=VDD2=VCC VSS1=VSS2=GND=0V IAL=0µA Digital data=#00H VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAL=500µA Digital data=#00H VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAH=500µA Digital data=#00H VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAL=1.0mA Digital data=#00H VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAH=1.0mA Digital data=#00H VDD1=VDD2=VCC VSS1=VSS2=GND=0V IAL=0µA Digital data=#FFH VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAL=500µA Digital data=#FFH Min. Typ. Max. Unit
Minimum analog output voltage (AOn) Minimum analog output voltage (AOn) Minimum analog output voltage (AOn) Minimum analog output voltage (AOn) Minimum analog output voltage (AOn) Maximum analog output voltage (AOn) Maximum analog output voltage (AOn)
VAOL1
VSS1 VSS2 VSS1-0.2 VSS2-0.2 VSS1 VSS2 VSS1-0.3 VSS2-0.3 VSS1 VSS2 VSS1-0.1 VSS2-0.1 VSS1-0.2 VSS2-0.2
VSS1+0.1 VSS2+0.1 VSS1+0.2 VSS2+0.2 VSS1+0.2 VSS2+0.2 VSS1+0.3 VSS2+0.3 VSS1+0.3 VSS2+0.3 VDD1 VDD2 VDD1 VDD2
VAOL2
VSS1 VSS2
VAOL3
VAOL4
VSS1 VSS2
VAOL5
VAOH1
VAOH2
PT8214 V1.0
January, 2006
8-Bit Converter
Parameter Maximum analog output voltage (AOn) Maximum analog output voltage (AOn) Maximum analog output voltage (AOn) Resolution (AOn) Linearity error (AOn) Different linearity (AOn) Symbol VAOH3 Condition VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAH=500µA Digital data=#FFH VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAL=1.0mA Digital data=#FFH VDD1=VDD2=VCC=5.0V VSS1=VSS2=GND=0V IAH=1.0mA Digital data=#FFH Unloaded VDDVCC-0.1V VSS0.1V Unloaded Min. VSS1-0.2 VSS2-0.2 VSS1-0.3 VSS2-0.3 VSS1-0.3 VSS2-0.3 -1.5 -1.0 Typ. VDD1 VDD2 Max. VSS1+0.2 VSS2+0.2 VDD1 VDD2 VSS1+0.3 VSS2+0.3
PT8214
Unit
VAOH4
VAOH5
VDD1 VDD2
Note: *=Supply current operational amplifier block included.
Ta=+25°C (Source current) (Sink current)
VDD1 VDD2 VSS1 VSS2
Pattern Inputs
AO36
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
CHARACTERISTICS
(Unless otherwise specified, recommended operation conditions prevail) Parameter Symbol Condition Clock time tCLK Clock high time tCKH Clock rise time Clock fall time Data setup time tDCH Data hold time tCHD Load strobe high time tSTBH Load strobe setup time tCHL Load strobe hold time tSTBC RAL=10K, CAL=50pF (note output setting time tSTBD CL=20pF(min.), 100pF (max.) Data output delay time (note Min. Max. Unit
NONLINEARITY ERROR DEFINITION
Analog utput voltage point
VAOH* Linearity error
VAOL**
#000
#FFF
Digital data
Note: *=VAOH always equal VDD. **=VAOL always equal VSS.
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
TEST CONDITIONS
OUTPUT SETTING TIME
Device being tested Test point
OUTPUT DELAY TIME
Device being tested Test point
INPUT/OUTPUT TIMING
0.2V tCKL
0.8Vcc 0.2Vcc
tCKH
0.2V
0.8V
0.8V
0.2V
0.2V
0.8Vcc 0.2Vcc
tDCH
tCHD tCHL 0.8V 0.2V
tSTBH 0.8V
tSTBC
0.2V
tSTBD
VIOUS DATA Vcc-0.4 0.4V
VIOUS DATA
0.9V VALID DATA 0.1V
VALID DATA
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
ORDER INFORMATION
Valid Part PT8214 PT8214 Package Type pins, LQFP pins, LQFP Code PT8214 PT8214
Notes: (L), Lead Free Lead Free mark front date code.
PT8214 V1.0
January, 2006
8-Bit Converter
PT8214
PINS, LQFP (BODY SIZE: 7MM, PITCH SIZE: 0.50, BODY: 1.40MM)
SEATING PLANE
-HR2 GAUGE PLANE
0.25mm
PT8214 V1.0
January, 2006
8-Bit Converter
Symbol Notes: Min. 0.05 1.35 0.17 Typ. 1.40 0.22 9.00 7.00 0.50 9.00 7.00 3.5° 0.60 1.00 REF. 0.08 1.60 0.15 1.45 0.27
PT8214
0.09 0.45 0.08 0.08 0.20
0.20 0.75 0.20
Dimensioning tolerancing ASME Y14.5M-1994 package body size smaller than bottom package size much 0.15mm. Datum determined datum plane Dimensions include mold protrusions. Allowable protrusion 0.25 side. maximum plastic body size dimensions including mold mismatch. Controlling Dimension: MILLIMETER Dimension does include dambar protrusion. Allowable dambar protrusion shall cause lead width exceed maximum dimension more than 0.08mm. Dambar cannot located lower radius foot. Minimum space between protrusion adjacent lead 0.07mm 0.4mm 0.5mm PITCH Package. These dimensions apply flat section lead between 0.10mm 0.25mm from lead tip. defined distance from seating plane lowest point package body. Details identifier optional must located within zone identified. Dimension show minimum allowed optional exposed heat slug. maximum allowed equal package body size E1). However, size exposed heat slug variable depending device function (die size). users should verify actual size either bottom exposed thermal specific device application. Refer JEDEC MS-026 Variation BBC. JEDEC registered trademark JEDEC SOLID STATE TECHNOLOGY ASSOCIATION.
PT8214 V1.0
January, 2006
Other recent searches
TZ9203 - TZ9203 TZ9203 Datasheet
SV4972US - SV4972US SV4972US Datasheet
SGL60N90DG3 - SGL60N90DG3 SGL60N90DG3 Datasheet
PL008 - PL008 PL008 Datasheet
LD-0019 - LD-0019 LD-0019 Datasheet
CD4028B-Series - CD4028B-Series CD4028B-Series Datasheet
BS34M - BS34M BS34M Datasheet
ASM5I961P - ASM5I961P ASM5I961P Datasheet
1N3821AUR-1 - 1N3821AUR-1 1N3821AUR-1 Datasheet
1N3828AUR-1 - 1N3828AUR-1 1N3828AUR-1 Datasheet
Privacy Policy | Disclaimer
© 2012 Datasheet Archive
