LC87F2832A CMOS FROM byte, 1024 byte on-chip 8-bit 1-chip Mi
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Ordering number ENA0478
LC87F2832A
CMOS FROM byte, 1024 byte on-chip
8-bit 1-chip Microcontroller
SANYO LC87F2832A 8-bit microcomputer that, centered around running minimum cycle time 83.3ns, integrates single chip number hardware features such 32K-byte flash (onboard programmable), 1024-byte RAM, on-chip debugger, sophisticated 16-bit timers/counters (may divided into 8-bit timers), 16-bit timer/counter (may divided into 8-bit timers/counters 8-bit PWMs), four 8-bit timers with prescaler, base timer serving time-of-day clock, high-speed clock counter, synchronous interface (with automatic block transmission/reception capabilities), asynchronous/synchronous interface, UART interface (full duplex), 8-bit 11-channel converter, 12-bit channels, system clock frequency divider, frequency variable oscillation circuit 25-source 10-vector interrupt feature.
Features
Flash Capable on-board-programing with wide range, 5.5V, voltage source. Block-erasable 128-byte units Writable 2-byte units 32768 bits (LC87F2832A) 1024 bits (LC87F2832A) Minimum Cycle 83.3ns (12MHz) VDD=3.0 5.5V 125ns (8MHz) VDD=2.5 5.5V 250ns (4MHz) VDD=2.2 5.5V Note: cycle time here refers read speed.
This product licensed from Silicon Storage Technology, Inc. (USA), manufactured sold SANYO Semiconductor Co., Ltd.
SANYO Semiconductor Co.,Ltd. products described contained herein are, with regard "standard application", intended general electronics equipment (home appliances, equipment, communication device, office equipment, industrial equipment etc.). products mentioned herein shall intended "special application" (medical equipment whose purpose sustain life, aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level reliability directly threaten human lives case failure malfunction product cause harm human bodies, shall they grant guarantee thereof. should intend products applications outside standard applications customer considering such and/or outside scope intended standard applications, please consult with prior intended use. there consultation inquiry before intended use, customer shall solely responsible use. Specifications SANYO Semiconductor Co.,Ltd. products described contained herein stipulate performance, characteristics, functions described products independent state, guarantees performance, characteristics, functions described products mounted customer' products equipment. verify symptoms states that cannot evaluated independent device, customer should always evaluate test devices mounted customer' products equipment.
Ver.1.00
N1506HKIM 20060629-S00005 No.A0478-1/27
LC87F2832A
Minimum Instruction Cycle Time 250ns (12MHz) VDD=3.0 5.5V 375ns (8MHz) VDD=2.5 5.5V 750ns (4MHz) VDD=2.2 5.5V Ports Normal withstand voltage ports Ports whose direction designated 1-bit units
(P1n, P2n, P33, P73, P86, PBn, PCn, PWM2, PWM3, XT2) (Ports available package only.) Ports whose direction designated units (P0n) Normal withstand voltage input port (XT1) Dedicated oscillator ports (CF1, CF2) Reset pins (RES) Power pins (VSS1 VDD1
Timers Timer 16-bit timer/counter with capture registers. Mode 8-bit timer with 8-bit programmable prescaler (with 8-bit capture register) channels Mode 8-bit timer with 8-bit programmable prescaler (with 8-bit capture register) 8-bit counter (with 8-bit capture register) Mode 16-bit timer with 8-bit programmable prescaler (with 16-bit capture register) Mode 16-bit counter (with 16-bit capture register) Timer 16-bit timer/counter that supports PWM/toggle outputs Mode 8-bit timer with 8-bit prescaler (with toggle outputs) 8-bit timer/counter with 8-bit prescaler (with toggle outputs) Mode 8-bit with 8-bit prescaler channels Mode 16-bit timer/counter with 8-bit prescaler (with toggle outputs) (toggle outputs also possible from lower-order bits) Mode 16-bit timer with 8-bit prescaler (with toggle outputs) (The lower-order bits used PWM.) Timer 8-bit timer with 6-bit prescaler Timer 8-bit timer with 6-bit prescaler Timer 8-bit timer with 6-bit prescaler (with toggle output) Timer 8-bit timer with 6-bit prescaler (with toggle output) Base timer clock selectable from subclock (32.768kHz crystal oscillation), system clock, timer prescaler output. Interrupts programmable different time schemes High-speed Clock Counter count clocks with maximum clock rate 20MHz main clock 10MHz) generate output real-time SIO0: 8-bit synchronous serial interface first/MSB first mode selectable Built-in 8-bit baudrate generator (maximum transfer clock cycle tCYC) Automatic continuous data transmission bits, specifiable 1-bit units, suspension resumption data transmission possible 1-byte units) SIO1: 8-bit asynchronous/synchronous serial interface Mode Synchronous 8-bit serial 3-wire configuration, tCYC transfer clocks) Mode Asynchronous serial (half-duplex, 8-data bits, 1-stop bit, 2048 tCYC baudrates) Mode mode (start bit, 8-data bits, tCYC transfer clocks) Mode mode (start detect, 8-data bits, stop detect)
No.A0478-2/27
LC87F2832A
UART Full duplex 7/8/9 data bits selectable stop (2-bit continuous data transmission) Built-in baudrate generator Converter: bits channels PWM: Multifrequency 12-bit channels Remote Control Receiver Circuit (sharing pins with P73, INT3, T0IN) Noise rejection function (noise filter time constant selectable from tCYC, tCYC, tCYC) Watchdog Timer External watchdog timer Interrupt reset signals selectable Clock Output Function Able output selected oscillation clock 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 system clock. Able output oscillation clock clock. Interrupts sources, vector addresses Provides three levels (low (L), high (H), highest (X)) multiplex interrupt control. interrupt requests level equal lower than current interrupt accepted. When interrupt requests more vector addresses occur same time, interrupt highest level takes precedence over other interrupts. interrupts same level, interrupt into smallest vector address takes precedence.
Vector Address 00003H 0000BH 00013H 0001BH 00023H 0002BH 00033H 0003BH 00043H 0004BH Level INT0 INT1 INT2/T0L/INT4 INT3/INT5/base timer0/ base timer1 T0H/INT6 T1L/T1H/INT7 SIO0/UART1 receive SIO1/UART1 transmit ADC/T6/T7 Port 0/T4/T5/PWM2, PWM3 Interrupt Source
Priority levels interrupts same level, with smallest vector address takes precedence. IFLG (List interrupt source flag function) Shows list interrupt source flags that caused branching particular vector address (shown diagram above). Subroutine Stack Levels: levels (the stack allocated RAM) High-speed Multiplication/Division Instructions bits bits tCYC execution time) bits bits tCYC execution time) bits bits tCYC execution time) bits bits tCYC execution time)
No.A0478-3/27
LC87F2832A
Oscillation Circuits oscillation circuit (internal): system clock oscillation circuit: system clock, with internal Crystal oscillation circuit: low-speed system clock, with internal Frequency variable oscillation circuit (internal): system clock Adjustable (typ) step from selected center frequency. Measures oscillation clock using input signal from reference. System Clock Divider Function current. minimum instruction cycle selectable from 300ns, 600ns, 1.2µs, 2.4µs, 4.8µs, 9.6µs, 19.2µs, 38.4µs, 76.8µs main clock rate 10MHz). Standby Function HALT mode: Halts instruction execution while allowing peripheral circuits continue operation. Oscillation halted automatically. Canceled system reset occurrence interrupt HOLD mode: Suspends instruction execution operation peripheral circuits. X'tal, frequency variable oscillators automatically stop operation. There three ways resetting HOLD mode. Setting reset level. Setting least INT0, INT1, INT2, INT4, INT5 pins specified level Having interrupt source established port X'tal HOLD mode: Suspends instruction execution operation peripheral circuits except base timer. frequency variable oscillators automatically stop operation. state crystal oscillation established when X'tal HOLD mode entered retained. There four ways resetting X'tal HOLD mode. Setting reset level Setting least INT0, INT1, INT2, INT4, INT5 pins specified level Having interrupt source established port Having interrupt source established base timer circuit On-chip Debugger Supports software debugging with mounted target board (LC87D2832A). LC87F2832A On-chip debugger function limited. Package Form TQFP64J Lead-free type FLGA68K (6.0 6.0): Lead-free type FLGA64 (5.0 5.0): Lead-free type Development Tools On-chip debugger: TCB87- TypeB LC87D2832A Programming Boards
Package TQFP64J FLGA68K FLGA64 W87F58256TQ7 W87F58256FL6 This board Built Order. take about month deliver. W87F59256FL5 This board Built Order. take about month deliver. Programming boards
Flash Programmer
Maker Flash Support Group, Inc. (Formerly Ando Electric Co., Ltd.) SANYO Model AF9708/AF9709/ AF9709B (SANYO FWS) Supported version (Note) After 02.57 Application Version: After 1.03 Chip Data Version: After 2.03 Device LC87F2832A LC87F2832A
Note: Please check latest version.
No.A0478-4/27
LC87F2832A
Package Dimension
unit (typ) 3289
(0.5) 0.16
0.125
1.2max
(1.0)
SANYO TQFP64J(7X7)
Package Dimensions
unit (typ) 3326
VIEW BOTTOM VIEW
(0.45)
(0.45)
0.0NOM
0.85MAX
SIDE VIEW
SANYO FLGA68K(6.0X6.0)
No.A0478-5/27
LC87F2832A
Package Dimensions
unit (typ) 3328
0.75 0.0NOM 0.75
SANYO FLGA64(5.0X5.0)
No.A0478-6/27
LC87F2832A
Assignments
P83/AN3 P84/AN4 P85/AN5 P86/AN6 VDD3 VSS3
P70/INT0/T0LCP/AN8 P71/INT1/T0HCP/AN9 P72/INT2/T0IN P73/INT3/T0IN XT1/AN10 XT2/AN11 VSS1 VDD1 P80/AN0 P81/AN1 P82/AN2 P10/SO0 P11/SI0/SB0 P12/SCK0 P13/SO1 P14/SI1/SB1 P15/SCK1 P16/T1PWML P17/T1PWMH/BUZ PWM2 PWM3 P05/CKO VDD2 VSS2 P27/INT5/T1IN/INT7/T0HCP1 P26/INT5/T1IN/INT6/T0LCP1 P25/INT5/T1IN P24/INT5/T1IN P23/INT4/T1IN P22/INT4/T1IN P21/URX/INT4/T1IN P20/UTX/INT4/T1IN P07/T7O P06/T6O
LC87F2832A
view
Note: Port P30, p31, p32, available above package. SANYO: TQFP64J(7 "Lead-free Type"
No.A0478-7/27
LC87F2832A
LC87F2832A
view
Name P12/SCK0 P13/SO1 P14/SI1/SB1 P15/SCK1 P16/T1PWML P17/T1PWMH/BUZ PWM2 PWM3 VDD2 VSS2 P05/CKO
P06/T6O P07/T7O
Name
Name VSS3 VDD3 P86/AN6 P85/AN5 P84/AN4 P83/AN3
Name P70/INT0/T0LCP/AN8 P71/INT1/T0HCP/AN9 P72/INT2/T0IN P73/INT3/T0IN XT1/AN10 XT2/AN11 VSS1 VDD1 P80/AN0 P81/AN1 P82/AN2 P10/SO0 P11/SI0/SB0
P20/UTX/INT4/T1IN P21/URX/INT4/T1IN P22/INT4/T1IN P23/INT4/T1IN P24/INT5/T1IN P25/INT5/T1IN P26/INT5/T1IN/INT6/TOLCP1 P27/INT5/T1IN/INT7/T0HCP1
NOTE: A11, dummy terminals package. These terminals need bonded with foot pattern secure bonding package. SANYO: FLGA68K(6.0 6.0) "Lead-free Type"
No.A0478-8/27
LC87F2832A
LC87F2832A
view
Name P12/SCK0 P13/SO1 P14/SI1/SB1 P15/SCK1 P16/T1PWML P17/T1PWMH/BUZ PWM2 PWM3 VDD2 VSS2 P05/CKO
P06/T6O P07/T7O
Name
Name VSS3 VDD3 P86/AN6 P85/AN5 P84/AN4 P83/AN3
Name P70/INT0/T0LCP/AN8 P71/INT1/T0HCP/AN9 P72/INT2/T0IN P73/INT3/T0IN XT1/AN10 XT2/AN11 VSS1 VDD1 P80/AN0 P81/AN1 P82/AN2 P10/SO0 P11/SI0/SB0
P20/UTX/INT4/T1IN P21/URX/INT4/T1IN P22/INT4/T1IN P23/INT4/T1IN P24/INT5/T1IN P25/INT5/T1IN P26/INT5/T1IN/INT6/T0LCP1 P27/INT5/T1IN/INT7/T0HCP1
Note: Port P30, p31, p32, available above package. SANYO: FLGA64(5.0 5.0) "Lead-free Type"
No.A0478-9/27
LC87F2832A
System Block Diagram
Interrupt control
Standby control
X'tal Clock generator
Flash
SIO0 interface
SIO1
Port
Timer
Port
register
Timer
Port
register
Timer
Port
Timer
Port
Timer
Timer
INT0 Noise filter
Base timer
Port
PWM2/3
Port
Stack pointer
UART1
Watchdog timer
On-chip debugger
No.A0478-10/27
LC87F2832A
Description
Name VSS1 VSS2 VSS3 VDD1 VDD2 VDD3 Port 8-bit port specifiable 4-bit units Pull-up resistors turned 4-bit units. HOLD reset input Port interrupt input Shared pins P05: Clock output (system clock/can selected from clock) P06: Timer toggle output P07: Timer toggle output Port 8-bit port specifiable 1-bit units Pull-up resistors turned 1-bit units. Shared pins P10: SIO0 data output P11: SIO0 data input/bus P12: SIO0 clock P13: SIO1 data output P14: SIO1 data input/bus P15: SIO1 clock P16: Timer 1PWML output P17: Timer 1PWMH output/beeper output Port 8-bit port specifiable 1-bit units Pull-up resistors turned 1-bit units. Shared pins P20: UART transmit P21: UART receive P26: INT6 input/timer capture input P27: INT7 input/timer capture input P23: INT4 input/HOLD reset input/timer event input/timer capture input/ timer capture input P27: INT5 input/HOLD reset input/timer event input/timer capture input/ timer capture input Interrupt acknowledge type Rising INT4 INT5 INT6 INT7 enable enable enable enable Falling enable enable enable enable Rising Falling enable enable enable enable level disable disable disable disable level disable disable disable disable +power supply -power supply Description Option
Port
4-bit port (these ports available package only.) specifiable 1-bit units Pull-up resistors turned 1-bit units.
Continued next page.
No.A0478-11/27
LC87F2832A
Continued from preceding page.
Name Port 4-bit port specifiable 1-bit units Pull-up resistors turned 1-bit units. Shared pins P70: INT0 input/HOLD reset input/timer capture input/watchdog timer output P71: INT1 input/HOLD reset input/timer capture input P72: INT2 input/HOLD reset input/timer event input/timer capture input/ High speed clock counter input P73: INT3 input (with noise filter)/timer event input/timer capture input converter input port: (P70), (P71) Interrupt acknowledge type Rising INT0 INT1 INT2 INT3 enable enable enable enable Falling enable enable enable enable Rising Falling disable disable enable enable level enable enable disable disable level enable enable disable disable Description Option
Port
7-bit port specifiable 1-bit units Shared pins converter input port: (P80) (P86)
PWM2 PWM3 Port Port
PWM2 PWM3 output ports General-purpose available 8-bit port specifiable 1-bit units Pull-up resistors turned units.
8-bit port specifiable 1-bit units Pull-up resistors turned 1-bit units. Shared pins On-chip debugger pins: DBGP0 DBGP2 (PC5 PC7)
Input Input
Reset 32.768kHz crystal oscillator input Shared pins General-purpose input port converter input port: AN10 Must connected VDD1 used. 32.768kHz crystal oscillator output Shared pins General-purpose port converter input port: AN11 Must oscillation kept open used.
Input Output
Ceramic resonator input Ceramic resonator output
No.A0478-12/27
LC87F2832A
Port Output Types
table below lists types port outputs presence/absence pull-up resistor. Data read into input port even output mode.
Port Name Option selected units Option type PWM2, PWM3 CMOS Nch-open drain CMOS Nch-open drain CMOS Nch-open drain CMOS Nch-open drain Nch-open drain CMOS Nch-open drain CMOS CMOS Nch-open drain CMOS Nch-open drain Input 32.768kHz crystal oscillator (Input only) Output 32.768kHz crystal oscillator (Nch-open drain when general-purpose output mode) Output type Pull-up resistor Programmable (Note Programmable Programmable Programmable Programmable Programmable Programmable Programmable Programmable Programmable Programmable Programmable Programmable
Note Programmable pull-up resistors port controlled 4-bit units (P00 07). Connect shown below minimize noise input VDD1 pin. sure electrically short VSS1, VSS2, VSS3 pins.
VDD1 Power supply
backup
VDD2
VDD3
VSS1
VSS2
VSS3
internal memory sustained VDD1. none VDD2 VDD3 backed high level output ports unstable HOLD backup mode, allowing through current flow into input buffer thus shortening backup time. Make sure that port outputs held level HOLD backup mode.
No.A0478-13/27
LC87F2832A
Absolute Maximum Ratings 25°C, VSS1 VSS2 VSS3
Parameter Maximum supply voltage Input voltage Input/output voltage Peak output current IOPH(2) IOPH(3) Mean output High level output current current (Note 1-1) IOMH(2) IOMH(3) Total output current IOAH(1) IOAH(2) IOAH(3) IOAH(4) IOAH(5) IOAH(6) IOAH(7) Peak output current IOPL(2) IOPL(3) Mean output current (Note 1-1) IOML(2) level output current IOML(3) Total output current IOAL(2) IOAL(3) IOAL(4) IOAL(5) IOAL(6) IOAL(1) IOML(1) IOPL(1) IOMH(1) IOPH(1) VI(1) VIO(1) XT1, Ports Ports PWM2, PWM3, Ports Ports PWM2, PWM3 Ports Ports PWM2, PWM3 P73, Port PWM2, PWM3 Ports Ports P30, PWM2, PWM3, Port Port Ports Ports PWM2, PWM3 P00, Ports Ports PWM2, PWM3 P00, Ports Port P86, Ports Port PWM2, PWM3 Ports Ports P30, PWM2, PWM3 IOAL(7) IOAL(8) IOAL(9) Port Port Ports Total applicable pins Total applicable pins Total applicable pins Total applicable pins Total applicable pins Total applicable pins Total applicable pins Total applicable pins Total applicable pins applicable applicable applicable applicable applicable Total applicable pins Total applicable pins Total applicable pins applicable Total applicable pins Total applicable pins CMOS output select applicable applicable applicable CMOS output select applicable applicable applicable Total applicable pins Total applicable pins -7.5 -0.3 VDD+0.3 Symbol Pin/Remarks VDD1, VDD2, VDD3 Conditions VDD[V] VDD1=VDD2=VDD3 -0.3 -0.3 Specification +6.5 VDD+0.3 unit
Note 1-1: mean output current mean value measured over 100ms.
Continued next page.
No.A0478-14/27
LC87F2832A
Continued from preceding page.
Parameter Power dissipation Symbol Pin/Remarks Operating ambient temperature Storage ambient temperature Tstg Topr Conditions VDD[V] Ta=-30 +70°C Specification unit
+125
Allowable Operating Range -30°C +70°C, VSS1 VSS2 VSS3
Parameter Operating supply voltage (Note 2-1) Memory sustaining supply voltage High level input voltage VIH(1) Ports port input/ interrupt side VIH(2) VIH(3) VIH(4) level input voltage VIL(1) Ports PWM2, PWM3 Port watchdog timer side XT1, XT2, CF1, Ports port input/ interrupt side VIL(2) Ports PWM2, PWM3 VIL(3) VIL(4) Instruction cycle time (Note 2-2) External system clock frequency FEXCF(1) open System clock frequency division ratio=1/1 External system clock duty= 50±5% open System clock frequency division ratio=1/2 24.4 tCYC Port watchdog timer side XT1, XT2, CF1, 0.3VDD +0.7 0.9VDD 0.75VDD 0.245 0.367 0.681 0.1VDD +0.4 0.2VDD 0.15VDD +0.4 0.2VDD 0.8VDD -1.0 0.25VDD 0.3VDD +0.7 VDD1=VDD2=VDD3 Symbol VDD(1) Pin/Remarks VDD1=VDD2=VDD3 Conditions VDD[V] 0.245µs tCYC 200µs 0.367µs tCYC 200µs 0.681µs tCYC 200µs register contents sustained HOLD mode. Specification unit
Note 2-1: must held greater than equal 3.0V flash onboard programming mode. Note 2-2: Relationship between tCYC oscillation frequency 3/FmCF division ratio 6/FmCF division ratio 1/2.
Continued next page.
No.A0478-15/27
LC87F2832A
Continued from preceding page.
Parameter Oscillation frequency range (Note 2-3) FmCF(3) FmRC FmVMRC(1) CF1, FmCF(2) CF1, Symbol FmCF(1) Pin/Remarks CF1, Conditions VDD[V] 12MHz ceramic oscillation Fig. 8MHz ceramic oscillation Fig. 4MHz ceramic oscillation Fig. Internal oscillation Frequency variable source oscillation When VMRAJ2 0=4, VMFAJ2 0=0, VMSL4M=0 FmVMRC(2) Frequency variable source oscillation When VMRAJ2 0=4, VMFAJ2 0=0, VMSL4M=1 FsX'tal Frequency variable oscillation usable range Frequency variable oscillation adjustment range VmADJ(2) VmADJ(1) Each step VMRAJn (Wide range) Each step VMFAJn (Small range) OpVMRC(1) OpVMRC(2) XT1, 32.768kHz crystal oscillation Fig. When VMSL4M=0 When VMSL4M=1 32.768 Specification unit
Note 2-3: Tables oscillation constants.
No.A0478-16/27
LC87F2832A
Electrical Characteristics -30°C +70°C, VSS1 VSS2 VSS3
Parameter High level input current Symbol IIH(1) Pin/Remarks Ports Ports Ports PWM2, PWM3 IIH(2) IIH(3) level input current IIL(1) XT1, Ports Ports Ports PWM2, PWM3 IIL(2) IIL(3) High level output voltage VOH(1) VOH(2) VOH(3) VOH(4) VOH(5) VOH(6) VOH(7) VOH(8) level output voltage VOL(1) VOL(2) VOL(3) VOL(4) VOL(5) VOL(6) VOL(7) VOL(8) Pull-up resistance Rpu(1) Rpu(2) Hysteresis voltage capacitance VHYS Ports Ports Ports pins pins other than that under test: VIN=VSS f=1MHz Ta=25°C Ports Ports PWM2, PWM3 Ports P00, PWM2, PWM3 XT1, Conditions VDD[V] Output disabled Pull-up resistor VIN=VDD (Including output Tr's leakage current) input port specification VIN=VDD VIN=VDD Output disabled Pull-up resistor VIN=VSS (Including output Tr's leakage current) input port specification VIN=VSS Ports Ports VIN=VSS IOH=-1mA IOH=-0.4mA IOH=-0.2mA IOH=-0.4mA IOH=-0.2mA IOH=-10mA IOH=-1.6mA IOH=-1mA IOL=10mA IOL=1.6mA IOL=1mA IOL=1.6mA IOL=1mA IOL=30mA IOL=5mA IOL=2.5mA VOH=0.9VDD 0.1VDD VDD-1 VDD-0.4 VDD-0.4 VDD-0.4 VDD-0.4 VDD-1.5 VDD-0.4 VDD-0.4 Specification unit
No.A0478-17/27
LC87F2832A
Serial Input/Output Characteristics -30°C +70°C, VSS1 VSS2 VSS3
SIO0 Serial Characteristics (Note 4-1-1)
Parameter Frequency level Input clock pulse width High level pulse width tSCKH(1) tSCKHA(1) Continuous data transmission/reception mode Serial clock Fig. (Note 4-1-2) Frequency level Output clock pulse width High level pulse width tSCKHA(2) Continuous data transmission/reception mode CMOS output selected Fig. Data setup time Serial input tsDI(1) SB0(P11), SI0(P11) Data hold time thDI(1) Must specified with respect rising edge SIOCLK. Fig. Output delay Input clock time tdD0(2) tdD0(1) SO0(P10), SB0(P11) Continuous data transmission/reception mode (Note 4-1-3) Synchronous 8-bit mode (Note 4-1-3) tdD0(3) (Note 4-1-3) (1/3)tCYC +0.15 0.03 0.03 tSCKH(2) +2tCYC tSCKH(2) tSCK(2) tSCKL(2) SCK0(P12) CMOS output selected Fig. tSCK tSCKH(2) +(10/3) tCYC tCYC Symbol tSCK(1) tSCKL(1) Pin/Remarks SCK0(P12) Conditions VDD[V] Fig. tCYC Specification unit
(1/3)tCYC +0.05 1tCYC +0.05
Serial output
Note 4-1-1: These specifications theoretical values. margin depending use. Note 4-1-2: serial-clock-input continuous trans/rec mode, time from SI0RUN being when serial clock first negative edge serial clock must longer than tSCKHA. Note 4-1-3: Must specified with respect falling edge SIOCLK. Must specified time beginning output state change open drain output mode. Fig.
Output clock
No.A0478-18/27
LC87F2832A
SIO1 Serial Characteristics (Note 4-2-1)
Parameter Frequency Input clock level pulse width High level pulse width Frequency Output clock level pulse width High level pulse width Data setup time Serial input tsDI(2) SB1(P14), SI1(P14) Data hold time thDI(2) Must specified with respect rising edge SIOCLK. Fig. Output delay time Serial output tdD0(4) SO1(P13), SB1(P14) Must specified with respect falling edge SIOCLK. Must specified time beginning output state change open drain output mode. Fig. (1/3)tCYC +0.05 0.03 0.03 tSCKH(4) tSCK(4) tSCKL(4) SCK1(P15) CMOS output selected Fig. tSCKH(3) Symbol tSCK(3) tSCKL(3) Pin/Remarks SCK1(P15) Fig. Conditions VDD[V] tCYC tSCK Specification unit
Serial clock
Note 4-2-1: These specifications theoretical values. margin depending use.
No.A0478-19/27
LC87F2832A
Pulse Input Conditions -30°C +70°C, VSS1 VSS2 VSS3
Parameter High/low level pulse width Symbol tPIH(1) tPIL(1) Pin/Remarks INT0(P70), INT1(P71), INT2(P72), INT4(P20 P23), INT5(P24 P27), INT6(P26), INT7(P27) tPIH(2) tPIL(2) tPIH(3) tPIL(3) tPIH(4) tPIL(4) tPIL(5) INT3(P73) when noise filter time constant INT3(P73) when noise filter time constant 1/32 INT3(P73) when noise filter time constant 1/128 Interrupt source flag set. Event inputs timer enabled. Interrupt source flag set. Event inputs timer enabled. Interrupt source flag set. Event inputs timer enabled. Resetting enabled. tCYC Conditions VDD[V] Interrupt source flag set. Event inputs timer enabled. Specification unit
Converter Characteristics -30°C +70°C, VSS1 VSS2 VSS3
Parameter Resolution Absolute accuracy Conversion time tCAD Symbol Pin/Remarks AN0(P80) AN6(P86), AN8(P70), AN9(P71), AN10(XT1), AN11(XT2) conversion (when ADCR2=0) (Note 6-2) 15.68 (tCYC= 0.49µs) 21.8 conversion (when ADCR2=1) (Note 6-2) (tCYC= 0.681µs) 18.82 (tCYC= 0.294µs) 43.6 Analog input voltage range Analog port input current IAINH IAINL VAIN=VDD VAIN=VSS VAIN (tCYC= 0.681µs) (Note 6-1) Conditions VDD[V] Specification unit
±1.5
97.92 (tCYC= 3.06µs) 97.92 (tCYC= 3.06µs) 97.92 (tCYC= 1.53µs) 97.92 (tCYC= 1.53µs)
Note 6-1: quantization error (±1/2LSB) excluded from absolute accuracy value. Note 6-2: conversion time refers interval from time instruction starting converter issued till time complete digital value corresponding analog input value loaded required register.
No.A0478-20/27
LC87F2832A
Consumption Current Characteristics -30°C +70°C, VSS1 VSS2 VSS3
Parameter Normal mode consumption current (Note 7-1) IDDOP(3) IDDOP(4) IDDOP(5) IDDOP(6) IDDOP(7) IDDOP(8) IDDOP(9) IDDOP(10) IDDOP(11) IDDOP(12) IDDOP(2) Symbol IDDOP(1) Pin/ Remarks VDD1 =VDD2 =VDD3 Conditions VDD[V] FmCF=12MHz ceramic oscillation mode FsX'tal=32.768kHz crystal oscillation mode System clock 12MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio FmCF=8MHz ceramic oscillation mode FsX'tal=32.768kHz crystal oscillation mode System clock 8MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio FmCF=4MHz ceramic oscillation mode FsX'tal=32.768kHz crystal oscillation mode System clock 4MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio FmCF=0Hz (oscillation stopped) FsX'tal=32.768kHz crystal oscillation mode System clock internal oscillation Frequency variable oscillation stopped. frequency division ratio FmCF=0Hz (oscillation stopped) FsX'tal=32.768kHz crystal oscillation mode Internal oscillation stopped. IDDOP(13) System clock 10MHz wifh frequency variable oscillation frequency division ratio IDDOP(14) IDDOP(15) IDDOP(16) IDDOP(17) IDDOP(18) IDDOP(19) FmCF=0Hz (oscillation stopped) FsX'tal=32.768kHz crystal oscillation mode Internal oscillation stopped. System clock 4MHz wifh frequency variable oscillation frequency division ratio FmCF=0Hz (oscillation stopped) FsX'tal=32.768kHz crystal oscillation mode System clock 32.768kHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio 11.5 0.28 1.35 0.75 16.5 12.5 Specification unit
Note 7-1: consumption current value includes none currents that flow into output internal pull-up resistors.
Continued next page.
No.A0478-21/27
LC87F2832A
Continued from preceding page.
Parameter HALT mode consumption current (Note 7-1) IDDHALT(2) Symbol IDDHALT(1) Pin/ Remarks VDD1 =VDD2 =VDD3 HALT mode FmCF=12MHz ceramic oscillation mode FsX'tal=32.768kHz crystal oscillation mode System clock 12MHz side Internal oscillation stopped. Frequency variable oscillation stopped. frequency division ratio IDDHALT(3) HALT mode FmCF=8MHz ceramic oscillation mode IDDHALT(4) FsX'tal=32.768kHz crystal oscillation mode System clock 8MHz side Internal oscillation stopped. IDDHALT(5) Frequency variable oscillation stopped. frequency division ratio IDDHALT(6) HALT mode FmCF=4MHz ceramic oscillation mode IDDHALT(7) FsX'tal=32.768kHz crystal oscillation mode System clock 4MHz side Internal oscillation stopped. IDDHALT(8) Frequency variable oscillation stopped. frequency division ratio IDDHALT(9) IDDHALT(10) IDDHALT(11) IDDHALT(12) HALT mode FmCF=0Hz (oscillation stopped) FsX'tal=32.768kHz crystal oscillation mode System clock internal oscillation Frequency variable oscillation stopped. frequency division ratio HALT mode FmCF=0Hz (oscillation stopped) FsX'tal=32.768kHz crystal oscillation mode IDDHALT(13) Internal oscillation stopped. System clock 10MHz wifh frequency variable oscillation frequency division ratio IDDHALT(14) HALT mode FmCF=0Hz (oscillation stopped) IDDHALT(15) FsX'tal=32.768kHz crystal oscillation mode Internal oscillation stopped. System clock 4MHz wifh frequency IDDHALT(16) variable oscillation frequency division ratio IDDHALT(17) HALT mode FmCF=0Hz (oscillation stopped) IDDHALT(18) FsX'tal=32.768kHz crystal oscillation mode System clock 32.768kHz side Internal oscillation stopped. IDDHALT(19) Frequency variable oscillation stopped. frequency division ratio HOLD mode consumption current Timer HOLD mode consumption current IDDHOLD(1) IDDHOLD(2) IDDHOLD(3) IDDHOLD(4) IDDHOLD(5) IDDHOLD(6) Timer HOLD mode CF1=VDD open (External clock mode) FsX'tal=32.768kHz crystal oscillation mode VDD1 HOLD mode CF1=VDD open (External clock mode) 0.05 0.03 0.02 18.5 0.13 0.54 0.37 0.75 1.15 2.65 Conditions VDD[V] Specification unit
Note 7-1: consumption current value includes none currents that flow into output internal pull-up resistors.
No.A0478-22/27
LC87F2832A
F-ROM Programming Characteristics -10°C +55°C, VSS1 VSS2 VSS3
Parameter Onboard programming current Programming time tFW(1) tFW(2) Erasing Programming Symbol IDDFW(1) Pin/Remarks VDD1 Conditions VDD[V] Without current Specification unit
UART (Full Duplex) Operating Conditions -30°C +70°C, VSS1 VSS2 VSS3
Parameter Transfer rate Symbol Pin/Remarks P20, Conditions VDD[V] 16/3 Specification 8192/3 unit tCYC
Data length: Stop bits: Parity bits:
bits (LSB first) (2-bit continuous data transmission) None
Example Continuous 8-bit Data Transmission Mode Processing (first transmit data=55H)
Start Start transmission Transmit data (LSB first) Stop transmission
Example Continuous 8-bit Data Reception Mode Processing (first receive data=55H)
Start Start reception Receive data (LSB first) Stop reception
No.A0478-23/27
LC87F2832A
Characteristics Sample Main System Clock Oscillation Circuit
Given below characteristics sample main system clock oscillation circuit that measured using SANYO-designated oscillation characteristics evaluation board external components with circuit constant values with which oscillator vendor confirmed normal stable oscillation. Table Characteristics Sample Main System Clock Oscillator Circuit with Ceramic Oscillator
Nominal Frequency Vendor Name Circuit Constant Oscillator Name [pF] 12MHz MURATA CSTCE12M0G52-R0 CSTCE8M00G52-R0 CSTLS8M00G53-B0 4MHz MURATA CSTCR4M00G53-R0 CSTLS4M00G53-B0 (10) (10) (15) (15) (15) [pF] (10) (10) (15) (15) (15) Open Open Open Open Open 2.2k 3.3k 3.3k Operating Voltage Range Oscillation Stabilization Time [ms] 0.05 0.05 0.05 0.05 0.05 [ms] 0.15 0.15 0.15 0.15 0.15 Internal Internal Internal Remarks
8MHz
MURATA
oscillation stabilization time refers time interval that required oscillation stabilized after goes above operating voltage lower limit (see Figure
Characteristics Sample Subsystem Clock Oscillator Circuit
Given below characteristics sample subsystem clock oscillation circuit that measured using SANYOdesignated oscillation characteristics evaluation board external components with circuit constant values with which oscillator vendor confirmed normal stable oscillation. Table Characteristics Sample Subsystem Clock Oscillator Circuit with Crystal Oscillator
Nominal Frequency Circuit Constant Vendor Name Oscillator Name [pF] 32.768kHz EPSON TOYOCOM MC-306 [pF] Open 560k Operating Voltage Range to.5.5 Oscillation Stabilization Time Applicable value= 12.5pF Remarks
oscillation stabilization time refers time interval that required oscillation stabilized after instruction starting subclock oscillation circuit executed time interval that required oscillation stabilized after HOLD mode reset (see Figure Note: components that involved oscillation should placed close another possible because they vulnerable influences circuit pattern.
X'tal
Figure Oscillator Circuit
Figure Oscillator Circuit
0.5VDD
Figure Timing Measurement Point
No.A0478-24/27
LC87F2832A
Power supply Operating lower limit Reset time
Internal oscillation tmsCF CF1,
tmsX'tal XT1,
Operating mode
Unpredictable
Reset
Instruction execution
Reset Time Oscillation Stabilization Time
HOLD reset signal
HOLD reset signal absent
HOLD reset signal valid
Internal oscillation tmsCF CF1,
tmsX'tal XT1,
State
HOLD
HALT
HOLD Reset Signal Oscillation Stabilization Time
Figure Oscillation Stabilization Times
No.A0478-25/27
LC87F2832A
RRES
CRES
Note: Determine value CRES RRES that reset signal present period 200µs after supply voltage goes beyond lower limit IC's operating voltage.
Figure Reset Circuit
SIOCLK:
DATAIN:
DATAOUT:
Data transfer period (SIO0 only)
tSCK tSCKL SIOCLK: tsDI DATAIN: tdDO DATAOUT: Data transfer period (SIO0 only) tSCKL SIOCLK: tsDI DATAIN: tdDO DATAOUT: thDI tSCKHA thDI tSCKH
Figure Serial Waveforms
tPIL
tPIH
Figure Pulse Input Timing Signal Waveform
No.A0478-26/27
LC87F2832A
SANYO Semiconductor Co.,Ltd. assumes responsibility equipment failures that result from using products values that exceed, even momentarily, rated values (such maximum ratings, operating condition ranges, other parameters) listed products specifications SANYO Semiconductor Co.,Ltd. products described contained herein. SANYO Semiconductor Co.,Ltd. strives supply high-quality high-reliability products, however, semiconductor products fail malfunction with some probability. possible that these probabilistic failures malfunction could give rise accidents events that could endanger human lives, trouble that could give rise smoke fire, accidents that could cause damage other property. When designing equipment, adopt safety measures that these kinds accidents events cannot occur. Such measures include limited protective circuits error prevention circuits safe design, redundant design, structural design. event that SANYO Semiconductor Co.,Ltd. products described contained herein controlled under applicable local export control laws regulations, such products require export license from authorities concerned accordance with above law. part this publication reproduced transmitted form means, electronic mechanical, including photocopying recording, information storage retrieval system, otherwise, without prior written consent SANYO Semiconductor Co.,Ltd. information described contained herein subject change without notice product/technology improvement, etc. When designing equipment, refer "Delivery Specification" SANYO Semiconductor Co.,Ltd. product that intend use. Information (including circuit diagrams circuit parameters) herein example only; guaranteed volume production. Upon using technical information products described herein, neither warranty license shall granted with regard intellectual property rights other rights SANYO Semiconductor Co.,Ltd. third party. SANYO Semiconductor Co.,Ltd. shall liable claim suits with regard third party's intellctual property rights which resulted from technical information products mentioned above.
This catalog provides information November, 2006. Specifications information herein subject change without notice.
No.A0478-27/27
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