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Synchronous-Rectified Buck MOSFET Drivers RT9619/A high frequency
Top Searches for this datasheetRT9619/A Synchronous-Rectified Buck MOSFET Drivers RT9619/A high frequency, dual MOSFET driver specifically designed drive power N-Channel MOSFETs synchronous-rectified buck converter topology. This driver combined with Richtek's series Multi-Phase Buck controller form complete corevoltage regulator solution advanced micro-processors. RT9619/A drives both lower/upper gate synchronous-rectifier bridge with 12V. This drive-voltage flexibility provides advantage optimizing applications involving trade-offs between switching losses conduction losses. RT9619A longer UGATE/LGATE deadtime which drive MOSFETs with large gate value, avoiding shoot-through phenomenon. RT9619 targeted drive gate MOSFETs performs better efficiency. output drivers RT9619/A efficiently switch power MOSFETs frequency 500kHz. Switching frequency above 500kHz take into account thermal dissipation SOP-8 package. RT9619/A capable drive load with 30ns rise time. RT9619/A implements bootstrapping upper gate with external capacitor embedded diode. This reduces implementation complexity allows higher performance, cost effective N-Channel MOSFETs. Adaptive shoot-through protection integrated prevent both MOSFETs from conducting simultaneously. Features Drives N-Channel MOSFETs Adaptive Shoot-Through Protection Embedded Boot Strapped Diode Supports High Switching Frequency Fast Output Rise Time Small SOP-8 Package Tri-State Input Bridge Shutdown Supply Under Voltage Protection Upper MOSFET Direct Shorted Protection RoHS Compliant 100% Lead (Pb)-Free Applications Core Voltage Supplies Desktop, Motherboard High Frequency Profile DC-DC Converters High Current Voltage DC-DC Converters Ordering Information RT9619/A Package Type SOP-8 Operating Temperature Range Free with Commercial Standard Green (Halogen Free with Commercial Standard) Long Dead Time Short Dead Time Note RichTek Pb-free Green products RoHS compliant compatible with current requirements IPC/JEDEC J-STD-020. Suitable SnPb Pb-free soldering processes. 100% matte (Sn) plating. Configurations (TOP VIEW) BOOT UGATE PHASE PGND LGATE SOP-8 DS9619/A-04 March 2007 www.richtek.com www.richtek.com 2.2uH 10uF 1000uF 1000uF 1000uF 10uF 10uF RT9619/A Typical Application Circuit ATX_12V 10uF BOOT ATX_12V UGATE RT9619/A LGATE PGND PHASE 3.3nF VCORE 2200uF 2200uF 10uF 10uF DS9619/A-04 March 2007 RT9619/A Functional Description Name BOOT LGATE PGND PHASE UGATE Function Floating bootstrap supply upper gate drive. Input signal controlling driver. Connection Pin. +12V Supply Voltage. Lower Gate Drive Output. Connected gate low-side power N-Channel MOSFET. Common Ground. Connected this source high-side MOSFET drain low-side MOSFET. Upper Gate Drive Output. Connected gate high-side power N-Channel MOSFET. Function Block Diagram Internal Turn Detect Shoot-Through Protection LGATE PGND PHASE Tri-State Detect Shoot-Through Protection BOOT UGATE Timing Diagram LGATE tpdlLGATE tpdlUGATE UGATE tpdhUGATE tpdhLGATE DS9619/A-04 March 2007 www.richtek.com RT9619/A Absolute Maximum Ratings (Note -0.3V -0.3V -0.3V -0.3V -10V 0.3V 0.3V 0.3V VPHASE 0.3V VBOOT 0.3V VPHASE VBOOT 0.3V 0.3V 0.625W 160°C/W 260°C -40°C 150°C 200V Supply Voltage, -BOOT PHASE -BOOT 200ns -PHASE 200ns -LGATE 200ns -UGATE 200ns -PWM Input Voltage -Power Dissipation, 25°C SOP-8 -Package Thermal Resistance (Note SOP-8, -Lead Temperature (Soldering, sec.) -Storage Temperature Range -ESD Susceptibility (Note (Human Body Mode) (Machine Mode) Recommended Operating Conditions (Note Supply Voltage, ±10% Junction Temperature Range 125°C Ambient Temperature Range 70°C Electrical Characteristics (Recommended Operating Conditions, 25°C unless otherwise specified) Parameter Supply Voltage Power Supply Voltage Supply Current Power Supply Current Power-On Reset Threshold Hysteresis Symbol Test Conditions Units IVCC VBOOT 12V, 13.5 VVCCrth VVCChys Rising continued www.richtek.com DS9619/A-04 March 2007 RT9619/A Parameter Input Maximum Input Current Floating Voltage Rising Threshold Falling Threshold Timing UGATE Rise Time UGATE Fall Time LGATE Rise Time LGATE Fall Time RT9619 RT9619A Propagation Delay RT9619/A tpdlUGATE tpdhLGATE tpdlLGATE Shutdown Window Output UGATE Drive Source UGATE Drive Sink LGATE Drive Source LGATE Drive Sink RUGATEsr RUGATEsk RLGATEsr RLGATEsk VBOOT VPHASE VBOOT VPHASE -1.9 Timing Diagram trUGATE tfUGATE trLGATE tfLGATE tpdhUGATE 12V, load 12V, load 12V, load 12V, load VBOOT VPHASE Timing Diagram -1.5 -3.2 IPWM VPWMfl VPWMrth VPWMfth -3.2 -3.9 Symbol Test Conditions Units Note Stresses listed above "Absolute Maximum Ratings" cause permanent damage device. These stress ratings. Functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods remain possibility affect device reliability. Note Devices sensitive. Handling precaution recommended. Note device guaranteed function outside operating conditions. Note measured natural convection 25°C effective thermal conductivity test board JEDEC 51-3 thermal measurement standard. DS9619/A-04 March 2007 www.richtek.com RT9619/A Typical Operating Characteristics Drive Waveform (5V/Div) UGATE (20V/Div) LGATE (10V/Div) PHASE (10V/Div) Time (25ns/Div) Drive Waveform (5V/Div) UGATE (20V/Div) LGATE (10V/Div) PHASE (10V/Div) Load Load Time (25ns/Div) Dead Time Full Load Full Load Dead Time UGATE UGATE PHASE PHASE (5V/Div) LGATE (5V/Div) LGATE Time (20ns/Div) Time (20ns/Div) Dead Time Load Load Dead Time UGATE UGATE PHASE PHASE (5V/Div) LGATE (5V/Div) LGATE Time (20ns/Div) Time (20ns/Div) www.richtek.com DS9619/A-04 March 2007 RT9619/A Short Pulse IOUT 119A 0.06 0.05 Internal Diode Curve UGATE LGATE PHASE Current 0.04 0.03 0.02 0.01 0.00 (5V/Div) Time (20ns/Div) Voltage DS9619/A-04 March 2007 www.richtek.com RT9619/A Application Information RT9619/A designed drive both high side side N-Channel MOSFET through externally input control signal. power-on protection function which held UGATE LGATE before across rising threshold voltage. After initialization, signal takes control. rising signal first forces LGATE signal turns then UGATE signal allowed high just after non-overlapping time avoid shootthrough current. falling signal first forces UGATE low. When UGATE PHASE signal reach predetermined level, LGATE signal allowed turn high. signal acted "High" above rising threshold acted "Low" below falling threshold. signal level enters remains within shutdown window considered "tri-state", output drivers disabled both MOSFET gates pulled held low. left signal floating, will kept around 2.4V internal divider provide controller with recognizable level. RT9619/A typically operates frequency 200kHz 500kHz. shall noted that place 1N4148 schottky diode between BOOT shown typical application circuit ligher efficiency. Non-overlap Control prevent overlap gate drives during UGATE turn LGATE turn high, non-overlap circuit monitors voltages PHASE node high side gate drive (UGATE-PHASE). When input signal goes low, UGATE begins turn (after propagation delay). Before LGATE turn high, non-overlap protection circuit ensures that monitored voltages have gone below 1.2V. Once monitored voltages fall below 1.2V, LGATE begins turn high. short pulse condtion, PHASE gone high after LGATE turns low, LGATE wait 200ns before turn high. waiting voltages PHASE high side gate drive fall below 1.2V, non-overlap protection circuit ensures that UGATE before LGATE turns high. VPHASE +12V Also prevent overlap gate drives during LGATE turn UGATE turn high, non-overlap circuit monitors LGATE voltage. When LGATE below 1.2V, UGATE allowed high. Driving Power MOSFETs input impedance power MOSFET extremely high. When 5V), gate draws current only nano-amperes. Thus once gate been driven "ON" level, current could negligible. However, capacitance gate source terminal should considered. requires relatively large currents drive gate down rapidly. also required switch drain current with required speed. required gate drive currents calculated follows. Cgd1 Igs1 Igd2 Igs2 Cgs2 Cgs1 Cgd2 VOUT Igd1 Figure Equivalent Circuit Associated Waveforms Figure current required move gate 12V. operation consists charging Cgs. Cgs1 Cgs2 capacitances from gate source high side side power MOSFETs, respectively. general data sheets, referred "Ciss" which input capacitance. Cgd1 Cgd2 capacitances from gate drain high side www.richtek.com DS9619/A-04 March 2007 RT9619/A side power MOSFETs, respectively referred data sheets "Crss" reverse transfer capacitance. example, rising time high side side power MOSFETs respectively, required current Igs1 Igs2 showed below total current required from gate driving source Igs1 Igd1 (1.428 0.326) 1.754 Igs2 Igd2 (0.88 0.4) 1.28 (10) Igs1 Igs2 dVg1 dVg2 similar calculation, also sink current required from turned MOSFET. Select Bootstrap Capacitor Figure shows part bootstrap circuit RT9619/A. (the voltage difference between BOOT PHASE RT9619/A) provides voltage gate high side power MOSFET. This supply needs ensured that MOSFET driven. this, capacitance selected properly. determined following constraints. Before driving gate high side MOSFET 5V), side MOSFET off; high side MOSFET turned before side turned From Figure body diode "D2" been turned before high side MOSFETs turned Igd1 1N4148 Before side MOSFET turned Cgd2 have been charged VIN. Thus, Cgd2 reverses polarity charged 12V, required current BOOT UGATE Igd2 Cgd2 Cgd2 PHASE helpful calculate these currents typical case. Assume synchronous rectified buck converter, input voltage 12V, 12V. high side MOSFET PHB83N03LT whose Ciss 1660pF, Crss 380pF, 14ns. side MOSFET PHB95N03LT whose Ciss 2200pF, Crss 500pF 30ns, from equation obtain Igs1 1660 1.428 Igs2 2200 0.88 LGATE PGND Figure Part Bootstrap Circuit RT9619/A practice, value capacitor will lead overcharging that could damage Therefore minimize risk overcharging reducing ripple VCB, bootstrap capacitor should smaller than 0.1F, larger better. general design, using provide better performance. least low-ESR capacitor should used provide good local de-coupling. Here, adopt either ceramic tantalum capacitor suitable. Power Dissipation from equation. Igd1 0.326 Igd2 exceeding maximum allowable power dissipation drive beyond maximum recommended operating junction temperature 125°C, necessary calculate power dissipation appro-priately. DS9619/A-04 March 2007 www.richtek.com RT9619/A This dissipation function switching frequency total gate charge selected MOSFET. Figure shows power dissipation test circuit. UGATE LGATE load capacitors, respectively. bootstrap capacitor value +12V BOOT RT9619/A PHASE 2N7002 LGATE PGND UGATE 2N7002 1N4148 (160°C/W 100mW) 25°C 41°C where ambient temperature 25°C. (11) CBOOT +12V method improve thermal transfer increase copper area around RT9619/A first. Then, adding ground under transfer heat peripheral board. Over-Voltage Protection Function Power-On unique feature RT9619/A driver addition over-voltage protection event upper MOSFET direct shorted before power-on. RT9619/Adetects fault condition during initial start-up, internal power-on sense circuitry will rapidly drive output lower MOSFET before multi-phase controller takes control. Figure shows measured waveforms with high side MOSFET directly shorted 12V. Figure Test Circuit Figure shows power dissipation RT9619/A function frequency load capacitance. value same frequency varied from 100kHz 1MHz. (2V/Div) (2V/Div) Power Dissipation Frequency 1000 PHASE CU=CL=3nF (2V/Div) Power Dissipation (mW) 1000 LGATE (2V/Div) CORE CU=CL=2nF Time (50ms/Div) CU=CL=1nF Figure Waveforms High Side MOSFET Shorted Please note that trigger point RT9619/A clamped level PHASE about 2.4V. Obviously since PHASE voltage increases during initial start-up, VCORE increases correspondingly, would quickly drop-off followed LGATE decreased. Layout Consideration Figure shows schematic circuit two-phase synchronous buck converter implement RT9619/A. converter operates from VIN. Frequency (kHz) Figure Power Dissipation Frequency operating junction temperature calculated from power dissipation curves (Figure Assume VCC=12V, operating frequency 200kHz CU=CL=1nF which emulate input capacitances high side side power MOSFETs. From Figure power dissipation 100mW. RT9619/A, package thermal resistance 160°C/W, operating junction temperature calculated www.richtek.com DS9619/A-04 March 2007 RT9619/A 1.2uH 1000uF VCORE PHB83N03LT BOOT UGATE PHASE 1500uF PHB95N03LT RT9619/A LGATE PGND Figure Two-Phase Synchronous Buck Converter Circuit When layout PCB, should very careful. powercircuit section most critical one. configured properly, will generate large amount EMI. junction should very close. Next, trace from UGATE, LGATE should also short decrease noise driver output signals. PHASE signals from junction power MOSFET, carrying large gate drive current pulses, should heavy gate drive trace. bypass capacitor should connected PGND directly. Furthermore, bootstrap capacitors (CB) should always placed close pins possible. DS9619/A-04 March 2007 www.richtek.com RT9619/A Outline Dimension Dimensions Millimeters Symbol 4.801 3.810 1.346 0.330 1.194 0.170 0.050 5.791 0.400 5.004 3.988 1.753 0.508 1.346 0.254 0.254 6.200 1.270 Dimensions Inches 0.189 0.150 0.053 0.013 0.047 0.007 0.002 0.228 0.016 0.197 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050 8-Lead Plastic Package Richtek Technology Corporation Headquarter Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Richtek Technology Corporation Taipei Office (Marketing) 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com www.richtek.com DS9619/A-04 March 2007 Other recent searchesuPD16454A - uPD16454A uPD16454A Datasheet UC1907 - UC1907 UC1907 Datasheet UC2907 - UC2907 UC2907 Datasheet UC3907 - UC3907 UC3907 Datasheet SSA149 - SSA149 SSA149 Datasheet HR34B - HR34B HR34B Datasheet GL8tt4 - GL8tt4 GL8tt4 Datasheet FSS32 - FSS32 FSS32 Datasheet FSS36 - FSS36 FSS36 Datasheet EC13HS - EC13HS EC13HS Datasheet DS04-22420-1E - DS04-22420-1E DS04-22420-1E Datasheet
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