Synchronous Buck DC-DC Linear Power Controller RT9259A dual-chann
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RT9259A
Synchronous Buck DC-DC Linear Power Controller
RT9259A dual-channel DC/DC controller specifically designed deliver high quality power where power source available. This part consists synchronous buck controller controller. synchronous buck controller integrates MOSFET drivers that support 12V+12V bootstrapped voltage high efficiency power conversion. bootstrap diode builtin simplify circuit design minimize external part count. controller drives external N-MOSFET lower power requirement. Other features include adjustable operation frequency, internal soft start, under voltage protection, over current protection shut down function. With above functions, this part provides customers compact, high efficiency, well-protected cost-effective solution. This part comes SOP-14 package.
Features
Single Bias Supply Support Dual Channel Power Conversion Synchronous Rectified Buck Controller Linear Controller Both Controllers Drive Cost N-Channel MOSFETs Adjustable Frequency from 150kHz 1MHz Free-Run Frequency 230kHz Small External Component Count Output Voltage Regulation Controller Accuracy Controller Accuracy Internal VREF Power Support Lower 0.8V Adjustable External Compensation Linear Controller Drives N-Channel MOSFET Pass Transistor Fully-Adjustable Outputs Under Voltage Protection Both Outputs Adjustable Over Current Protection RoHS Compliant 100% Lead (Pb)-Free
Ordering Information
RT9259A Package Type SOP-14 Operating Temperature Range Free with Commercial Standard Green (Halogen Free with Commercial Standard)
Applications
Graphic Card GPU, Memory Core Power Graphic Card Interface Power Motherboard, Desktop Servers Chipset Memory Core Power Equipments Telecomm Equipments High Power DC-DC Regulators
Note RichTek Pb-free Green products RoHS compliant compatible with current requirements IPC/JEDEC J-STD-020. Suitable SnPb Pb-free soldering processes. 100% matte (Sn) plating.
Configurations
(TOP VIEW)
BOOT RT_DIS COMP UGATE PHASE PGND LGATE OCSET VREF VCC12
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RT9259A
Typical Application Circuit
+12V VIN1 +3.3V/+5V/+12V
RT9259A
VIN2 +12V
LOUT1 VOUT1 COUT
BOOT VCC12 RT_DIS
UGATE PHASE LGATE PGND
VOUT2 COUT2
VREF OCSET
COMP
ROCSET
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DS9259A-02 March 2007
RT9259A
Functional Description
BOOT (Pin Bootstrap supply upper gate driver. Connect bootstrap capacitor between BOOT PHASE pin. bootstrap capacitor provides charge turn upper MOSFET. RT_DIS (Pin Connect resistor from RT_DIS frequency. addition, this pulled down towards GND, will disable both regulator outputs until released. COMP (Pin Buck converter external compensation. This used compensate control loop buck converter. LGATE (Pin (Pin Buck converter feedback voltage. This inverting input error amplifier. senses switcher output through external resistor divider network. (Pin Connect this gate external MOSFET. This provides drive linear regulator' pass MOSFET. (Pin Linear regulator feedback voltage. This inverting input error amplifier protection monitor. Connect this external resistor divider network linear regulator. (Pin Signal ground voltages levels measured with respect this pin. VCC12 (Pin Connect this well-decoupled bias supply. also positive supply lower gate driver, LGATE. Lower gate driver output. Connect gate lowside power N-Channel MOSFET. This monitored adaptive shoot-through protection circuitry determine when lower MOSFET turn off. PGND (Pin Power ground return lower gate driver. PHASE (Pin Connect this source upper MOSFET drain lower MOSFET. This monitored adaptive shoot-through protection circuitry determine when upper MOSFET turned off. UGATE (Pin Upper gate driver output. Connect gate high-side power N-Channel MOSFET. This monitored adaptive shoot-through protection circuitry determine when upper MOSFET turned off. VREF (Pin 0.8V reference voltage output. OCSET (Pin Connecting resistor (ROCSET) from this source upper MOSFET drain lower MOSFET sets over-current trip point. ROCSET, internal current source, lower MOSFET resistance, RDS(ON), converter over-current trip point (IOCSET) according following Equation
OCSET 40uA OCSET 0.4V
DS(ON) lower MOSFET
DS9259A-02 March 2007
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RT9259A
Function Block Diagram
VCC12
Voltage Reference VREF VCC12 Inhibit VREF2 REF_OUT 0.8V VREF1 0.4V
Bias
Power Reset
Regulator
5VDD
Soft-Start Fault Logic 0.4V
40uA OCSET
PH_M
1.5V BOOT
Shutdown Inhibit Driver Logic
UGATE PHASE
RT_DIS
Oscillator
LGATE PGND
COMP
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DS9259A-02 March 2007
RT9259A
Absolute Maximum Ratings
(Note Supply Voltage, PHASE 200ns -10V BOOT PHASE BOOT -0.3V VCC+15V 200ns -0.3V UGATE VPHASE 0.3V VBOOT 0.3V LGATE 0.3V 0.3V 0.3V 0.3V Input, Output Voltage 0.3V Power Dissipation, 25°C SOP-14 1.000W Package Thermal Resistance (Note SOP-14, 100°C/W Junction Temperature 150°C Lead Temperature (Soldering, sec.) 260°C Storage Temperature Range -40°C 150°C Susceptibility (Note (Human Body Mode) (Machine Mode) 200V
Recommended Operating Conditions
(Note
Supply Voltage, Junction Temperature Range -40°C 125°C Ambient Temperature Range -40°C 85°C
Electrical Characteristics
(VCC 12V, 25°C unless otherwise specified)
Parameter Supply Input Power Supply Voltage Power Reset Power Reset Hysteresis Power Supply Current Oscillator Free Running Frequency Ramp Amplitude
Symbol
Test Conditions
Units
VVCCRTH VVCCHYS IVCC UGATE, LGATE Open Rising
-8.8
0.78
10.4
fOSC
110k
continued
DS9259A-02 March 2007
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RT9259A
Parameter Reference Voltage Error Amplifier Reference Linear Driver Reference VREF Buffer Source Current Error Amplifier Gain Gain-Bandwidth Product Slew Rate Gate Driver Upper Drive Source Upper Drive Sink Lower Drive Source Lower Drive Sink Protection Under Voltage Protection Soft-Start Time Interval Over Current Threshold RT_DIS Shutdown Threshold Linear Regulator Output High Voltage Output Voltage Source Current Sink Current VDRV VDRV IDRVSR IDRVSC 10.3 VUVP ROCSET 0.36 -0.35 -400 0.45 RUGATE RUGATE RLGATE RLGATE VBOOT VPHASE 12V, VBOOT VUGATE VUGATE VLGATE VLGATE CLOAD V/us VREF1 VREF2 0.792 0.784 -0.808 0.816 Symbol Test Conditions Units
Note Stresses listed above "Absolute Maximum Ratings" cause permanent damage device. These stress ratings. Functional operation device these other conditions beyond those indicated operational sections specifications implied. Exposure absolute maximum rating conditions extended periods remain possibility affect device reliability. Note device guaranteed function outside operating conditions. Note measured natural convection 25°C effective thermal conductivity test board JEDEC 51-3 thermal measurement standard. Note measured natural convection 25°C high effective 4-layers 2S2P thermal conductivity test board JEDEC 51-7 thermal measurement standard.
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DS9259A-02 March 2007
RT9259A
Typical Operating Characteristics
Dead Time
Load, Falling UGATE UGATE VIN1 PHASE PHASE VIN1 Load, Rising
Dead Time
(5V/Div)
LGATE
(5V/Div)
LGATE
Time (25ns/Div)
Time (25ns/Div)
Power
Load UGATE
OUT1
(2V/Div)
(10V/Div)
(10V/Div)
LGATE
(0.5A/Div) (10A/Div) (200mV/Div)
Time (2.5ms/Div)
Time (5s/Div)
Shut Down
Full Load UGATE Load VIN1
Start
(20V/Div) (5V/Div)
LGATE RT_Dis
(10V/Div)
OUT1
(500mV/Div)
PHASE RT_Dis
(500mV/Div) (10V/Div) (1V/Div) (500mV/Div)
OUT1
Time (5s/Div)
Time (1ms/Div)
DS9259A-02 March 2007
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RT9259A
Start
Load ILOAD ILoad
Start
(2.5A/Div)
RT_Dis
(500mV/Div)
OUT1
(500mV/Div)
OUT1
(500mV/Div) Time (1ms/Div)
Time (1ms/Div)
Transient Response
Transient Response
UGATE
(20V/Div) (100mV/Div)
OUT1
(100mV/Div)
(20V/Div)
UGATE
(10A/Div)
VIN1 12V, VOUT1 ILOAD1
(10A/Div)
VIN1 12V, VOUT1 ILOAD1
Time (2.5s/Div)
Time (10s/Div)
Transient Response
VIN2 12V, VOUT2 2.5V ILOAD 100mA LGATE
Under Voltage Protection
VIN2
(2mV/Div)
OUT2
(10V/Div)
UGATE
(20V/Div)
COMP
(500mV/Div) (0.5A/Div) (1V/Div) Time (100s/Div)
OUT2
Time (10ms/Div)
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DS9259A-02 March 2007
RT9259A
Application Information
Introduction RT9259A dual-channel DC/DC controller specifically designed deliver high quality power where power source available. This part consists synchronous buck controller controller. synchronous buck controller integrates internal MOSFET drivers that support 12V+12V bootstrapped voltage high efficiency power conversion. bootstrap diode builtin simplify circuit design minimize external part count. controller drives external N-MOSFET lower power requirement. Internal 5VDD Regulator highly recommended power RT9259A with welldecoupled VCC12 pin. VCC12 powers RT9259A control circuit, side gate driver bootstrap circuit high side gate driver. bootstrap diode embedded facilitates design reduce total cost. external Schottky diode required. RT9259A integrates MOSFET gate drives that powered from VCC12 support driving capability. Converters that consist RT9259A feature high efficiency without special consideration selection MOSFETs. internal linear regulator regulates VCC12 input 5VDD voltage internal control logic circuit. external bypass capacitor required filtering 5VDD voltage. This further facilitates design reduces total cost. Power Reset RT9259A automatically initializes upon applying input power VCC12) pin. power reset function (POR) continually monitors input bias supply voltage VCC12 pin. VCC12V level typically 9.6V VCC12V rising. Frequency Setting Shut Down Connecting resistor from RT_DIS sets operation frequency. relation roughly expressed equation.
fOSC 230kHz 7700 (kHz)
DS9259A-02 March 2007
When open, free running frequency 230kHz typically. Figure shows operation frequency quick reference.
1400 1200 1000
(kHz)
1000
(kohm)
Figure Frequency Shorting RT_DIS with external signallevel MOSFET shuts down device. This allows flexible power sequence control specified application. RT_DIS threshold voltage 0.4V typically. VIN1 Detection RT9259A continuously generates 10kHz pulse train with pulse width turn upper MOSFET detecting existence VIN1 after VCC12V RT_DIS enabled shown Figure PHASE voltage monitored during detection duration. PHASE voltage crosses 1.5V four times, VIN1 existence recognized RT9259A initiates soft start cycle described next section.
VIN1 POR_H PHASE_M
1.5V
PHASE UGATE PHASE waveform Internal Counter will count (VPHASE 1.5V) four times (rising falling) recognize VIN1 ready.
Figure
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RT9259A
Soft Start Synchronous Buck Converter built-in soft-start used prevent surge current from power supply input during power (referring Functional Block Diagram). error amplifier threeinput device. VREF1 whichever smaller dominates behavior non-inverting input. internal soft start voltage linearly ramps about after VIN1 existence recognized with about delay. According, output voltage ramps smoothly target level. rise time output voltage about shown Figure VREF1 takes over behavior when VREF1. also used soft start. input voltage VIN2 MUST ready before starts ramp Otherwise function triggered shut down RT9259A.
UGATE (20V/Div)
VIN1
(500mV/Div)
VOUT (20V/Div) Time (10ms/Div)
Figure triggered
VIN2
LGATE (10V/Div) UGATE (20V/Div)
RT_DIS (500mV/Div) UGATE (20V/Div) VOUT1 (500mV/Div) LGATE (10V/Div)
COMP (500mV/Div) VOUT1 (1V/Div) Time (10ms/Div)
Figure hiccups triggered
Time (1ms/Div)
Over Current Protection Figure Start RT_DIS Under Voltage Protection voltages monitored under voltage protection (UVP) after soft start completed. triggered feedback voltages under (50% VREFX) with 30us delay. shown Figure RT9259A controller shut down when drops lower than threshold. Figure RT9259A shuts down after time hiccups triggered FBL. RT9259A senses current flowing through lower MOSFET over current protection (OCP) sensing PHASE voltage shown Functional Block Diagram. 40uA current source flows through external resistor ROCSET PHASE causes 0.8V voltage drop across resistor. triggered voltage PHASE (drop lower MOSFET VDS) lower than 0.4V when side MOSFET conducting. Accordingly inductor current threshold function conducting resistance lower MOSFET RDS(ON)
IOCSET OCSET 0.4V RDS(ON)
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DS9259A-02 March 2007
RT9259A
MOSFET with RDS(ON) used, threshold current about 25A. Once triggered, RT9259A enters hiccup mode re-soft starts again. RT9259A shuts down after time hiccups. well-designed compensator regulates output voltage reference voltage VREF with fast transient response good stability. order achieve fast transient response accurate output regulation, adequate compensator design necessary. goal compensation network provide adequate phase margin (greater than degrees) highest crossing frequency. also recommended manipulate loop frequency response that gain crosses over slope -20dB/dec.
Inductor Current (20A/Div)
VOSC
Comparator
Driver Driver PHASE COUT COMP
VOUT
Time (2.5ms/Div)
Figure Shorted then Start
(20A/Div)
VOUT
LGATE (5V/Div) UGATE (5V/Div)
COMP
Time (5s/Div)
Figure Shorted then Start (Extended Figure Feedback Compensation RT9259A voltage mode controller. control loop single voltage feedback path including compensator modulator shown Figure modulator consists comparator power stage. comparator compares error amplifier output (COMP) with oscillator (OSC) sawtooth wave provide pulse-width modulated (PWM) with amplitude PHASE node. wave smoothed output filter LOUT COUT. output voltage (VOUT) sensed inverting input error amplifier.
Figure Closed Loop Modulator Frequency Equations modulator transfer function small-signal transfer function VOUT/VCOMP (output voltage over error amplifier output. This transfer function dominated gain, double pole, zero shown Figure gain modulator input voltage (VIN) divided peak peak oscillator voltage VOSC. output filter introduces double pole, 40dB/decade gain slope above corner resonant frequency, total phase degrees. resonant frequency filter expressed
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RT9259A
zero contributed associated with output capacitance. Note that this requires that output capacitor should have enough satisfy stability requirements. zero output capacitor expressed follows
fESR COUT
Loop Gain Gain (dB)
-4040
Compensation Gain
Modulator Gain
Compensation Frequency Equations compensation network consists error amplifier impedance networks shown Figure
VOUT
-6060 10db(vo)
2100l d(op)
Feuny Frequency (Hz)
100k
Figure Bode Plot Thermal Considerations continuous operation, exceed absolute maximum operation junction temperature 125°C. maximum power dissipation depends thermal resistance package, layout, rate surroundings airflow temperature difference between junction ambient. maximum power dissipation calculated following formula PD(MAX) TJ(MAX)
COMP VREF
Figure Compensation Loop
Where J(MAX) maximum operation junction temperature 125°C, ambient temperature junction ambient thermal resistance. junction ambient thermal resistance layout dependent. SOP-14 packages, thermal resistance 100°C/W standard JEDEC 51-7 four-layers thermal test board. maximum power dissipation 25°C calculated following formula PD(MAX) 125°C 25°C) 100°C/W 1.000 SOP-14 packages maximum power dissipation depends operating ambient temperature fixed TJ(MAX) thermal resistance RT9259A packages, Figure derating curves allows designer effect rising ambient temperature maximum power allowed.
Figure shows DC-DC converter's gain frequency. compensation gain uses external impedance networks provide stable, high bandwidth loop. High crossover frequency desirable fast transient response, often jeopardize system stability. order cancel filter poles, place zero before filter resonant frequency. experience, place zero filter resonant frequency. Crossover frequency should higher than zero less than switching frequency. second pole placed half switching frequency.
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RT9259A
Maximum Power Dissipation
4-Layers
SOP-14
power components controller should placed firstly. Place input capacitors, especially high-frequency ceramic decoupling capacitors, close power switches. Place output inductor output capacitors between MOSFETs load. Also locate controller near MOSFETs. multi-layer printed circuit board recommended. Figure shows connections critical components converter. Note that capacitors COUT each them represents numerous physical capacitors. dedicated grounding plane vias ground critical components this layer. Apply another solid layer power plane this plane into smaller islands common voltage levels. power plane should support input power output power nodes. copper filled polygons bottom circuit layers PHASE node, necessary oversize this particular island. Since PHASE node subjected very high dV/dt voltages, stray capacitance formed between these islands surrounding circuitry will tend couple switching noise. remaining printed circuit layers small signal routing. traces between controller gate MOSFET also traces connecting source MOSFETs should sized carry peak currents.
5V/12V
Ambient Temperature (°C)
Figure Derating Curves RT9259A Packages
Layout Considerations MOSFETs switch very fast efficiently. speed with which current transitions from device another causes voltage spikes across interconnecting impedances parasitic circuit elements. voltage spikes degrade efficiency radiate noise, that results over-voltage stress devices. Careful component placement layout printed circuit design minimize voltage spikes induced converter. Consider, example, turn-off transition upper MOSFET prior turn-off, upper MOSFET carrying full load current. During turn-off, current stops flowing upper MOSFET picked side MOSFET schottky diode. inductance switched current path generates large voltage spike during switching interval. Careful component selections, layout critical components, shorter wider traces help minimizing magnitude voltage spikes. There sets critical components DC-DC converter using RT9259A. switching power components most critical because they switch large amounts energy, such, they tend generate equally large amounts noise. critical small signal components those connected sensitive nodes those supplying critical bypass current.
VOUT
LOAD
UGATE
LGATE RT9259A
Figure connections critical components converter
DS9259A-02 March 2007
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RT9259A
Outline Dimension
Symbol
Dimensions Millimeters 8.534 3.810 1.346 0.330 1.194 0.178 0.102 5.791 0.406 8.738 3.988 1.753 0.508 1.346 0.254 0.254 6.198 1.270
Dimensions Inches 0.336 0.150 0.053 0.013 0.047 0.007 0.004 0.228 0.016 0.344 0.157 0.069 0.020 0.053 0.010 0.010 0.244 0.050
Lead Plastic Package
Richtek Technology Corporation
Headquarter Taiyuen Street, Chupei City Hsinchu, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611
Richtek Technology Corporation
Taipei Office (Marketing) 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com
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DS9259A-02 March 2007
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