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High accuracy, high-resolution voltage outputs channel matching 12-bit
Top Searches for this datasheetHigh Performance, 12-Bit, 12-Channel Decimating, DecDriver® AD8387 High accuracy, high-resolution voltage outputs channel matching 12-bit input resolution Laser-trimmed outputs Fast settling, high voltage drive settling time 0.25% into load Slew rate Outputs within supply rails High update rates Fast, clock Programmable video reference (brightness) full-scale (contrast) output levels Flexible logic reverses polarity video signal reverses loading order data selects frame/row column/dot inversion selects single dual data mode Output short-circuit protection logic, analog supplies Available 80-lead, TQFP E-pad DBA(0:11) FUNCTIONAL BLOCK DIAGRAM TWO-STAGE LATCH TWO-STAGE LATCH VID0 DBB(0:11) VID1 BIAS THERMAL SWITCH G-MODE SWITCH TWO-STAGE LATCH TWO-STAGE LATCH VID10 VID11 SEQUENCE CONTROL SCALING CONTROL 05653-001 AD8387 Figure APPLICATIONS microdisplay driver GENERAL DESCRIPTION AD8387 DecDriver provides dual, fast latched, 12-bit decimating input, which drives high voltage outputs. Twelvebit input words loaded into separate high speed, bipolar DACs sequentially. Flexible digital input format allows more than AD8387 used parallel higher resolution displays. output signal adjusted reference, signal inversion, contrast maximum flexibility. AD8387 fabricated ADI's fast bipolar, XFCB process, providing fast input logic, bipolar DACs with trimmed accuracy fast settling, high voltage, precision drive amplifiers same chip. AD8387 dissipates 1.34 nominal static power. AD8387 offered 80-lead TQFP E-pad package operates over commercial temperature range +85°C. CHANNEL MATCHING (mV) CODE NORMAL PROJECTOR OPERATING TEMPERATURE RANGE CODE 2048 CODE 4095 05653-015 INTERNAL AMBIENT TEMPERATURE (°C) Figure Channel Matching Temperature Rev. Information furnished Analog Devices believed accurate reliable. However, responsibility assumed Analog Devices use, infringements patents other rights third parties that result from use. Specifications subject change without notice. license granted implication otherwise under patent patent rights Analog Devices. Trademarks registered trademarks property their respective owners. Technology Way, P.O. 9106, Norwood, 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 2005 Analog Devices, Inc. rights reserved. AD8387 TABLE CONTENTS Features Applications. Functional Block Diagram General Description Revision History Specifications. Absolute Maximum Ratings. Exposed Paddle. Overload Protection. Maximum Power Dissipation Operating Temperature Range Caution. Configuration Function Descriptions. Typical Performance Characteristics Timing Diagrams. Single Data Configuration, Dual Data Configuration, HIGH. Functional Description Reference Control Input Description. Theory Operation Transfer Function Analog Output Voltage. Accuracy Applications. Optimized Reliability with Thermal Switch Initial Power-Up After Assembly Repair. Power-Up During Normal Operation Power Supply Sequencing Power-On Sequence. Power-Off Sequence. Grounded Output Mode During Power-Off Design Optimized Thermal Performance Thermal Design Thermal Structure Design AD8387 Design Recommendations Outline Dimensions Ordering Guide REVISION HISTORY 10/05-Revision Initial Version Rev. Page AD8387 SPECIFICATIONS 25°C, AVCC 15.5 DVCC 0°C, 75°C still air, unless otherwise noted. Table Parameter VIDEO PERFORMANCE VDE-Differential Error Voltage Conditions ,VFS code code 1024 code 2048 code 3072 code 4095 code range 4095 code code 1024 code 2048 code 3072 code 4095 code range 4095 code code 1024 code 2048 code 3072 code 4095 code range 4095 code code 1024 code 2048 code 3072 code 4095 code range 4095 VIDx step, Unit -5.5 -4.4 -3.6 -2.8 -2.1 -6.0 -2.5 -2.5 -2.5 -2.5 -2.5 -3.5 -0.8 -0.5 -0.3 -0.3 +0.2 +5.0 +3.6 +3.3 +2.8 +2.1 +6.0 +2.5 +2.5 +2.5 +2.5 +2.5 +3.5 VCME-Common-Mode Error Voltage -0.3 -0.3 -0.3 -0.3 -0.3 VDE-VDE Channel Matching V-Channel Matching -0.2 VIDEO OUTPUT DYNAMIC PERFORMANCE Data Switching Settling Time 0.25% Data Switching Settling Time Data Switching Slew Rate Data Feedthrough All-Hostile Crosstalk Amplitude Glitch Duration Transition Glitch Energy Invert Switching Settling Time 0.25% Invert Switching Settling Time Invert Switching Slew Rate Invert Switching Overshoot nV-s Code 2047 2048 VIDx step, Rev. Page AD8387 Parameter VIDEO OUTPUT CHARACTERISTICS Output Voltage Swing Output Voltage-Grounded Mode Data Switching Delay: Data Switching Delay Skew: Switching Delay: Switching Delay Skew: Output Current Output Resistance REFERENCE INPUTS Range Range Range1 Input Resistance Input Current Input Current RESOLUTION DIGITAL INPUT CHARACTERISTICS Frequency Data Setup Time: Setup Time: Data Hold Time: Hold Time: High Time: Time: High Time: Time: POWER SUPPLIES DVCC, Operating Range DVCC, Quiescent Current AVCC, Operating Range AVCC, Quiescent Current OPERATING TEMPERATURE Ambient Temperature Range, Ambient Temperature Range, Conditions AVCC VOH, AGND VIDx step VIDx step 0.06 15.7 16.2 0.150 Unit Bits 5.25 AVCC 2.75 2.75 Binary Coding input duty cycle HIGH 0.05 0.05 -0.6 -1.3 -1.2 1.65 HIGH HIGH Still air, airflow, differential error voltage, VCME common-mode error voltage, matching between outputs, maximum deviation between outputs, full-scale output voltage (VRH VRL). Accuracy section. Guaranteed monotonic characterization four sigma limits. Measured outputs differentially DBx(0:11) driven held LOW. Measured outputs differentially others transitioning Measured both states INV. Measured from rising edge output change. Measurement made both states INV. Measured from transition output change. Operation elevated ambient temperature requires thermally optimized additional thermal management, such airflow across surface AD8387. Rev. Page AD8387 ABSOLUTE MAXIMUM RATINGS Table Parameter Supply Voltages AVCCx AGNDx DVCC DGND Input Voltages Maximum Digital Input Voltage Minimum Digital Input Voltage Maximum Analog Input Voltage Minimum Analog Input Voltage Internal Power Dissipation1 TQFP E-Pad 25°C Operating Temperature Range Storage Temperature Range Lead Temperature Range (Soldering sec) Rating DVCC DGND AVCC AGND 4.38 85°C -65°C +125°C 300°C When HIGH, output current limiter, well thermal switch, enabled. thermal switch debiases output amplifier when junction temperature reaches internally trip point. event extended shortcircuit between video output power supply rail, output amplifier current continues switch between typical with period determined thermal time constant hysteresis thermal trip point. thermal switch, when enabled, provides long-term protection from accidental shorts during assembly process limiting average junction temperature safe level. MAXIMUM POWER DISSIPATION maximum power that AD8387 safely dissipate limited junction temperature. maximum safe junction temperature plastic encapsulated devices, determined glass transition temperature plastic, approximately 150°C. Exceeding this limit temporarily cause shift parametric performance change stresses exerted package. Exceeding junction temperature 150°C extended period result device failure. 80-lead TQFP E-Pad: 28.5°C/W (still air) [JEDEC Standard, 4-layer still air] 12.2°C/W 14.6°C/W 12.0°C/W 0.3°C/W. Stresses above those listed under Absolute Maximum Ratings cause permanent damage device. This stress rating only; functional operation device these other conditions above those indicated operational section this specification implied. Exposure absolute maximum ratings extended periods reduce device reliability. OPERATING TEMPERATURE RANGE ensure operation within specified operating temperature range, necessary limit maximum power dissipation follows. 500LFM 200LFM EXPOSED PADDLE ensure optimized thermal performance, exposed paddle must thermally connected external plane, such AVCC GND, described Applications section. MAXIMUM POWER DISSIPATION STILL OVERLOAD PROTECTION AD8387 overload protection circuit consists output current limiter thermal switch. When LOW, thermal switch disabled output current limiter enabled. maximum current output internally limited average. event momentary short-circuit between video output power supply rail (VCC AGND), output current limit sufficiently provide temporary protection. QUIESCENT 05653-002 THERMAL SWITCH ENABLED DISABLED AMBIENT TEMPERATURE (°C) Figure Maximum Power Dissipation Temperature, AD8387 4-Layer JEDEC with Thermally Optimized Landing Pattern Described Applications Section CAUTION (electrostatic discharge) sensitive device. Electrostatic charges high 4000 readily accumulate human body test equipment discharge without detection. Although this product features proprietary protection circuitry, permanent damage occur devices subjected high energy electrostatic discharges. Therefore, proper precautions recommended avoid performance degradation loss functionality. Rev. Page AD8387 CONFIGURATION FUNCTION DESCRIPTIONS AVCC0, AGNDD AGNDD AVCCD AVCCD DGND2 AGND0 DVCC2 DBA4 DBA3 DBA2 BBA1 DBA0 DBA5 DBA6 DBA7 DBA8 DBA9 DBA10 DBA11 DVCC1 VID0 VID1 AGND1, VID2 AVCC2, VID3 AGND3, VID4 AVCC4, VID5 AGND5, VID6 AVCC6, VID7 AGND7, VID8 AVCC8, VID9 AGND9, VID10 AVCC10, AD8387 VIEW (Not Scale) DGND1 DBB11 DBB10 DBB9 DBB8 DBB7 DBB6 DBB5 AGND11 DGND3 DVCC3 AGNDB AGNDB AVCCB AVCCB VID11 DBB4 DBB3 DBB2 DBB1 DBB0 TSTA CONNECT Figure 80-Lead TQFP E-Pad Configuration Rev. Page 05653-004 AD8387 Table 80-Lead TQFP E-Pad Configurations Mnemonic DBA(0:11) DBB(0:11) DVCCx DGNDx AGNDx Function Data Input Data Input Transfer/Start Sequence Digital Power Supplies Digital Ground Clock Data Mode Switch Right/Left Select Invert Mode Switch Invert Output Mode Switch Thermal Switch Analog Ground Description 12-Bit Data Input Even Channels. VID(0, 10), DBA11. 12-Bit Data Input Channels. VID(1, 11), DBB11. Simultaneously initiates data loading sequence transfers data loaded previously, outputs. Digital Power Supplies. These pins normally connected digital ground plane. Clock Input. Selects Single Buss Dual Buss Operating Modes. Selects Left Direction Right Direction Operating Mode. Enables Disables Column Inversion. Changes Polarity Analog Output Signals. Enables Disables Grounded Mode. Enables Disables Long-Term Output Protection. Analog Supply Returns. AVCCx Analog Power Supplies Analog Power Supplies. TSTA VID0 VID11 Bypass Test Analog Outputs capacitor connected between AGND ensures optimum settling time. Connect This AGND. Connect. internal connection. These pins connected directly analog inputs panel. Video Center Reference Full-Scale Reference This Voltage Sets Video Center Voltage. video outputs above this reference while HIGH below this reference while LOW. Twice voltage applied between sets full-scale video output voltage. Rev. Page AD8387 TYPICAL PERFORMANCE CHARACTERISTICS CHANNEL MATCHING (mV) CODE AMBIENT TEMPERATURE (°C) CODE 4095 05653-019 CHANNEL MATCHING (mV) 1024 1536 2048 2560 3072 3584 INPUT CODE 05653-016 CODE 2048 4096 Figure Channel Matching Code 25°C Figure Channel Matching Codes 2048, 4095 (mV) 1024 1536 2048 2560 3072 3584 INPUT CODE 05653-018 VCME (mV) -0.5 -1.5 -2.5 -3.5 1024 1536 2048 2560 3072 3584 INPUT CODE 4096 4096 Figure Code Figure VCME Code (LSB) (LSB) -0.2 -0.4 -0.6 05653-017 -0.2 -0.4 -0.6 -0.8 -1.0 1024 1536 2048 2560 3072 3584 INPUT CODE 05653-020 -0.8 -1.0 1024 1536 2048 2560 3072 3584 INPUT CODE 4096 4096 Figure Code 25°C, Figure Code 25°C, Rev. Page 05653-021 AD8387 TIMING DIAGRAMS SINGLE DATA CONFIGURATION, D(0:11) DBA(0:11) DBB(0:11) VID0 VID1 VID2 12-CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL 05653-005 PIXEL REFERENCES AD8387 VID3 VID4 VID5 VID6 VID7 VID8 VID9 VID10 VID11 IMAGE PROCESSOR CHANNEL Figure AD8387 Single Data System LEFT PIXEL PIXEL RIGHT D(0:11) D(0:11) INPUTS INPUTS VID0 VID1 VID2 VID3 VID4 OUTPUTS OUTPUTS VID0 VID1 VID2 VID3 VID4 VID5 VID5 VID6 VID7 VID8 VID9 VID10 VID11 VID6 VID7 VID8 VID9 VID10 VID11 05653-006 Figure AD8387 Single Data Configuration Scanning Left-to-Right Right-to-Left Rev. Page AD8387 DUAL DATA CONFIGURATION, HIGH DA(0:11) DB(0:11) PIXEL IMAGE PROCESSOR REFERENCES DVCC DBB(0:11) VID0 VID1 VID2 VID3 VID4 VID5 VID6 VID7 VID8 VID9 VID10 VID11 CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL CHANNEL 05653-007 DBA(0:11) 12-CHANNEL AD8387 Figure AD8387 Dual Data System LEFT PIXEL PIXEL RIGHT DBA(0:11) DBB(0:11) INPUTS INPUTS DBA(0:11) DBB(0:11) VID0 VID1 VID2 VID3 VID4 OUTPUTS OUTPUTS VID0 VID1 VID2 VID3 VID4 VID5 VID5 VID6 VID7 VID8 VID9 VID10 VID11 VID6 VID7 VID8 VID9 VID10 VID11 05653-008 Figure AD8387 Dual Data Configuration Scanning Left-to-Right Right-to-Left Rev. Page AD8387 DB(0:11) 05653-009 Figure Input Timing (DSW LOW) DB(0:11) VID(0:11) PIXELS 05653-010 PIXELS -12, -11, -10, VRL-VFS Figure Output Timing (DSW LOW) Table Parameter Data Setup Time: Setup Time: Data Hold Time: Hold Time: High Time: Time: High Time: Time: Data Switching Delay: Data Switching Delay Skew: Invert Switching Delay: Invert Switching Delay Skew: Conditions Unit HIGH HIGH VIDx step 15.7 16.2 Rev. Page AD8387 FUNCTIONAL DESCRIPTION AD8387 system building block designed directly drive columns microdisplays type popularized projection systems. channels precision, 12-bit DACs loaded from dual, high speed, 12-bit wide input. Precision current feedback amplifiers, providing well damped pulse response fast voltage settling into large capacitive loads, buffer outputs. Laser trimming wafer level ensures absolute output errors tight channel-to-channel matching. Tight part-to-part matching high resolution systems guaranteed external voltage references. Right/Left Control-Input Data Loading facilitate image mirroring, direction loading sequence control. loading sequence begins Channel proceeds Channel when control held LOW. begins Channel proceeds Channel when control held HIGH. Control-Thermal Switch Control When this input HIGH, thermal switch enabled. When left unconnected, thermal switch disabled. internal, pull-down resistor disables thermal switch when this left unconnected. REFERENCE CONTROL INPUT DESCRIPTION Data Transfer/Start Sequence Control-Input Data Loading, Data Transfer valid initiated when held HIGH during rising edge. Data transferred outputs loading sequence initiated next rising edge, immediately following valid XFR. During loading sequence, 12-bit words loaded sequentially into internal channels. When AD8387 configured single data (DSW LOW), data loaded both rising falling edges CLK. When configured dual data (DSW HIGH), data loaded rising edges only. Control-Output Mode Switch When this input HIGH, video outputs operate normally. When left open, video outputs forced AGND. This function operates when AVCC power requires DVCC power Control Control-Analog Output Inversion When LOW, analog outputs' transfer function below VRL, while held LOW, above VRL, while held HIGH. With HIGH, analog outputs' transfer function above VID(0, below VID(1, 11), while held HIGH. Conversely, analog outputs' transfer function below VID(0, above VID(1, 11), while held LOW. VRH, Inputs-Full-Scale Video Reference Inputs times difference between (analog input voltages) sets full-scale output voltage. (VRH VRL) Control-Data Mode Switch When this input HIGH, AD8387 dual data mode. Data loaded from both DBA(0:11) DBB(0:11) rising edge simultaneously. does change active edge dual data mode. When LOW, AD8387 single data mode. Data loaded rising edge from DBA(0:11) falling edge from DBB(0:11) when LOW. With HIGH, data loaded falling edge from DBA(0:11) rising edge from DBB(0:11). Rev. Page AD8387 THEORY OPERATION TRANSFER FUNCTION ANALOG OUTPUT VOLTAGE DecDriver regions operation where video output voltages either above below reference voltage VRL. transfer function defines video output voltage function digital input code VOUTN(n) VIDx(n) n/4095), HIGH VOUTP(n) VIDx(n) n/4095), where input code. (VRH VRL) number internal limits define usable range video output voltages, VIDx, shown Figure VIDx VOLTS AVCC (VRL VFS) 1.3V ACCURACY best correlate transfer function errors image artifacts, overall accuracy DecDriver defined three parameters, VCME, VDE. VDE, differential error voltage, measures difference between value channel ideal value that channel. defining expression VOUTN(n) VOUTP(n) VDE(n) 4095 VCME, common-mode error voltage, measures bias channel. defining expression VCME(n) VOUTN VOUTP(n) measures maximum mismatch between channels. defining equation max{VDE(n)(0 11)} min{VDE(n)(0 11)} VOUTN 5.25V AVCC 5.25V measures maximum mismatch between channels. defining expression V(n) max{VN(n), VP(n)} where: VN(n) max{VOUTN(n)(0 11)} min{VOUTN(n)(0 11)} VOUTP 5.25V (AVCC (VRL VFS) AGND INPUT CODE VIDx INPUT CODE 4095 1.3V 05653-011 INTERNAL LIMITS USABLE VOLTAGE RANGES VP(n) max{VOUTP(n)(0 11)} min{VOUTP(n)(0 11)} Figure AD8387 Transfer Function Usable Voltage Ranges Rev. Page AD8387 APPLICATIONS OPTIMIZED RELIABILITY WITH THERMAL SWITCH While internal current limiters provide short-term protection against temporary shorts outputs, thermal switch provides protection against persistent shorts lasting several seconds. optimize reliability with thermal switch, following sequence operations recommended. POWER-OFF SEQUENCE Turn input signals Turn Turn Turn AVCC Turn DVCC INITIAL POWER-UP AFTER ASSEMBLY REPAIR Grounded output mode disabled, thermal switch enabled. Ensure that HIGH that HIGH upon initial power-up that they remain unchanged throughout this procedure. initial power-up sequence follows: Execute initial power-up. Identify shorts outputs. Power down, repair shorts, repeat initial power-up sequence until proper system functionality verified. Disable thermal switch. GROUNDED OUTPUT MODE DURING POWER-OFF Certain applications require that video outputs held near AGND during power-down. following power-off sequence ensures that outputs near ground during power-off that Absolute Maximum Ratings violated. Enable grounded output mode: Turn input signals Turn Turn Turn AVCC Turn DVCC POWER-UP DURING NORMAL OPERATION Grounded output mode disabled, thermal switch disabled. HIGH, outputs into normal operating mode with thermal switch disabled. DESIGN OPTIMIZED THERMAL PERFORMANCE Although maximum safe operating junction temperature higher, AD8387 100% tested junction temperature 125°C. Consequently, maximum guaranteed operating junction temperature 125°C. limit maximum junction temperature below guaranteed maximum, package conjunction with must effectively conduct heat away from junction. AD8387 package designed provide enhanced thermal characteristics through exposed paddle bottom surface package. take full advantage this feature, exposed paddle must direct thermal contact with PCB, which then serves heat sink. thermally effective must incorporate thermal pads thermal structure. thermal surface provides solderable contact surface surface PCB. thermal bottom layer provides surface direct contact with ambient. thermal structure provides thermal path inner bottom layers remove heat. POWER SUPPLY SEQUENCING indicated under Absolute Maximum Ratings, voltage input cannot exceed supply voltage more than Power-on power-off sequencing required comply with absolute maximum ratings. Failure comply with Absolute Maximum Ratings result functional failure damage internal diodes. Damaged diodes cause temporary parametric failures, which result image artifacts. Damaged diodes cannot provide full protection, reducing reliability. POWER-ON SEQUENCE Turn AVCC Turn Turn Turn DVCC Disable thermal switch: Turn input signals Rev. Page AD8387 THERMAL DESIGN minimize thermal performance degradation production PCBs, contact area between thermal should maximized. Therefore, size thermal layer should match exposed paddle. second thermal same size should placed bottom side PCB. least thermal should direct thermal contact with external plane, such AVCC GND. 16mm 6.5mm 6.5mm THERMAL STRUCTURE DESIGN Effective heat transfer from inner bottom layers requires thermal vias incorporated into thermal design. Thermal performance increases logarithmically with number vias. Near optimum thermal performance production PCBs attained only when tightly spaced thermal vias placed full extent thermal pad. 05653-012 16mm Figure Land Pattern-Top Layer 6.5mm 6.5mm Thermal Thermal Connections thermal solder side connected plane. thermal spokes recommended when connecting thermal pads structure plane. Solder Masking Solder masking holes layer plugs holes, inhibiting solder flow into holes. minimize formation solder voids solder flowing into holes (solder wicking), diameter should made small, optional solder mask used. optimize thermal coverage when using solder mask, diameter should more than larger than hole diameter. Pads customer's design rules. Thermal Holes-Circular mask, centered holes. Diameter mask should larger than hole diameter. Figure Land Pattern-Bottom Layer Figure Solder Mask-Top Layer Solder Mask-Bottom Layer This customer's design rules. AD8387 DESIGN RECOMMENDATIONS Table Land Pattern Dimensions Size 0.25 Pitch Thermal Size Thermal Structure 0.25 0.35 holes grid Rev. Page 05653-013 05653-014 AD8387 OUTLINE DIMENSIONS 14.20 14.00 13.80 0.75 0.60 0.45 1.20 12.20 12.00 11.80 VIEW (PINS DOWN) EXPOSED 6.00 1.05 1.00 0.95 BOTTOM VIEW (PINS 0.15 0.05 SEATING PLANE 0.20 0.09 3.5° 0.08 COPLANARITY VIEW 0.50 LEAD PITCH 0.27 0.22 0.17 VIEW ROTATED COMPLIANT JEDEC STANDARDS MS-026-ADD-HD Figure 80-Lead Thin Quad Flat Package, Exposed [TQFP_EP] (SV-80-1) Dimensions shown millimeters ORDERING GUIDE Model AD8387JSVZ AD8387-EB Temperature Range 85°C Package Description 80-Lead TQFP Evaluation Board Package Option SV-80-1 Pb-free part. 2005 Analog Devices, Inc. rights reserved. Trademarks registered trademarks property their respective owners. D05653-0-10/05(0) Rev. Page Other recent searchesTPC6104 - TPC6104 TPC6104 Datasheet TM6171 - TM6171 TM6171 Datasheet PA1919 - PA1919 PA1919 Datasheet P20C - P20C P20C Datasheet H7906 - H7906 H7906 Datasheet
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