AK2510 Voice Switch Hands-Free Phone GENERAL DISCREPTION AK2
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[AK2510]
AK2510
Voice Switch Hands-Free Phone
GENERAL DISCREPTION AK2510 full digital voice switch hands-free phone. AK2510 included interface, input level adjustment transmit path receive path respectively, transmit receive attenuator, background-noise level detector each path. Additionally, AK2510 serial data interface voice switch function control, data mode select, A/µ-Law select, mute, through, selection transmit, receive, idle normal mode. necessary AK2510 external components FEATURES High quality voice switched algorithm Robust against Back Ground Noise Level (max-20dBm0) Applicable Line loss (max-40dB) 3.3V 5.0V power supply I/F: data mode (Short Long Frame), 16bit linear data mode, AK130 B1/B2 data mode A/µ-Law selectable BCLK: 512kHz, 2.048MHz Serial interface Easy optimize parameter; need external component power consumption (Typ. 0.7mA@3.3V, 1.2mA@5.0V)
PACKAGE INFORMATION 16pin TSSOP package 5.0*6.4mm(pin pin) pitch: 0.65mm BLOCK DIAGRAM
BCLK
digital volume
TOUT
interface
Voice Switch Core
interface
ROUT
digital volume
SCLK DATA
interface
Block Descriptions BLOCK Function interface data rate available 512kHz 2.048MHz that synchronizes with BCLK. Several kinds data format (Long Frame, Short Frame, Linear, AK130 AK130 available. interface Interface internal register change volume, voice switch parameters, voice switch parameters data format. digital volume -16+15dB Digital volume adjust signal level transmit path. digital volume -16+15dB Digital volume adjust signal level receive path. Voice Switch Core Core block Hands-Free function. Refer next page. -1AK2510-E-00
VOICE SWITCH CORE BLOCK DIAGRAM
[AK2510]
Attenuator Noise Level Detector Attenuator Control Noise Level Detector Attenuator
Block Descriptions BLOCK Attenuator Control Attenuator Attenuator Noise Level Detector Function This circuit automatically controls gain transmit receive attenuators based signal comes from path (Noise Level Detector). When gain, other minimum attenuation. Both attenuators controlled single output from Attenuator Control which ensure their gain will remain constant typical value. purpose noise level detector distinguish speech from background noise. This block monitors average value back ground noise power this information used Attenuation Control order able operate voice switch function under noisy conversation circumstances. also response receive signal attenuate caused line loss.
Timing Attenuator
TX_Voice_Activity RX_Voice_Activity TX_ATT _gain
Minimum Gain
RX_ATT_gain
Minimum Gain
This diagram shows basic operation AK2510 voice switch functions. When voice come transmit path, Attenuator Control sets Attenuator gain Attenuator minimum gain. When voice come from receive path, Attenuator Control sets Attenuator gain Attenuator minimum gain. When there voice either path, AK2510 transit "watch status" attenuator's gain each path stays nearly half positions. Minimum gain attenuator's gains watch status changed internal register serial interface. During Attenuator transition, Attenuator Control prevents AK2510 from "singing" "motorboating" caused echo. -2AK2510-E-00
[AK2510]
ASSIGNMENT
BCLK ROUT TOUT
TEST1 SCLK TEST2 DATA TXON RXON
CONDITION
(Top View)
type
DOUT TOUT Input Output Input/Try-state Output Try-state Output Power, Ground
Function
name DATA SCLK TOUT ROUT BCLK TXON RXON TEST1 TEST2 type TOUT TOUT DOUT DOUT
load Function Data input/output serial interface 50pF Clock input serial interface Read write enable serial interface data input from CODEC (Transmit Path) data output highway (Transmit 50pF Path) data input from highway (Receive Path) data output CODEC (Receive path) 50pF clock data interface Frame sync data interface state indication 50pF state indication 50pF Reset reset) Test (Please tied level) Test (Please tied level) Ground Positive Supply Voltage: 5.0V/3.3V
must 8kHz clock that synchronized with BCLK.
AK2510-E-00
ABSOLUTE MAXIMUM RATINGS Parameter Power supply Voltage Voltage (Reference Voltage) Digital Input Voltage Input current (except power supply pins) Storage Temperature Symbol Tstg -0.3 -0.3 VDD+0.3
[AK2510]
Unit
Warning: Exceeding maximum ratings cause permanent damage. Normal operation guaranteed these extremes. RECOMMENDED OPEARATION CONDITION Parameter Symbol Power supplies1 Power supplies2 Ambient Operation Temperature Note) voltages reference ground: VSS=0V Unit
ELECTRICAL CHARACTERISTICS Unless otherwise noted, guaranteed VDD=+3.3V±0.3V, Ta=-10~+85°C, FS=8kHz Characteristics Parameter Power Consumption1
Symbol
Condition BCLK=2.048MHz VDD=3.3V±0.3V *Note) BCLK=2.048MHz VDD=5.0V±10% *Note) BCLK=512kHz VDD=3.3V±0.3V *Note) BCLK=512kHz VDD=5.0V±10% *Note)
Unit
Power Consumption2
Power Consumption3
0.18
Power Consumption4
Input Voltage 0.3VDD Input High Voltage 0.75VDD Output Voltage IOL=400A Output High Voltage VDD-0.5 IOH=-400A Input Leakage Current Output Leakage Tri-state mode Current *Note) output pins unloaded. 1020Hz@0dBm0 sine wave input from TIN, RIN. Digi Volume gains 0dB. mode. SCLK supplied.
AK2510-E-00
Characteristics
[AK2510]
Note) Otherwise specified, Ta=-10 ~+70°C, VDD=3.3V±0.3V, VSS=0V, FS=8kHz assumed. timing parameters measured VOH=VDD-0.5V, VOL=0.4V. Interface /A-law (Long Frame ,Short Frame), Linear mode
Items frequency BCLK frequency1 BCLK frequency2 Clock width Falling/Rising time Output delay Name BCLK BCLK BCLK BCLK TIN/RIN TOUT ROUT TOUT ROUT TIN/RIN Hold time TIN/RIN Symbol FBCLK FBCLK TDX1* TDX2* TFSS TDRS TFSH TDRH Conditions Cl=50pF Cl=50pF 2048 Unit
Setup time
AK130 B1ch,AK130 B2ch mode
Items frequency BCLK frequency Clock width Falling/Rising time Output delay Name BCLK BCLK BCLK, TIN/RIN TOUT, ROUT TOUT, ROUT TIN/RIN Hold time TIN/RIN Symbol FBCLK TDX1* TDX2* TFSS TDRS TFSH TDRH Conditions Cl=50pF Cl=50pF Unit
2048
Setup time
*TDX1, Starting point timing measurement rising edge BCLK which later.
AK2510-E-00
u/A-law modeShort Frame Linear mode
TFSH TFSS TFSH TFSS
[AK2510]
BCLK
FBCLK TDX2
TDRS TDRH
modeLong Frame
FWLFS TFSH TFSS TFSH
BCLK
TDX2
TDRS TDRH
AK130 B1ch/B2ch mode
TFSH TFSS TFSH TFSS
BCLK
FBCLK TDX2
TDRS TDRH
AK2510-E-00
Items SCLK pulse width Falling/rising time Output delay Setup time Hold time Name SCLK CSN,SCLK DATA DATA DATA DATA Parm. TDA2 TCSS TDAS TCSH TDAH Conditions CL=15pF CL=15pF Unit
[AK2510]
frequency SCLK SCLK=5.00MHz@50%duty, 4.34MHz@40/60%duty
Data write cycle
TCSH
TCSS
TCSH
TCSS
SCLK
FSCLK
TDAS
TDAH
DATA
Data read cycle
TCSH
TCSS
TDA2
SCLK
FSCLK
TDAS
TDAH
DATA
Instruction code, Address write Data read
AK2510-E-00
[AK2510]
INTERFACE
AK2510 supports data interface modes. A/u-Law data mode( Long Short frame) This mode interface 64kbps data which compressed /extended A-law u-law. Both Long frame short frame format acceptable. data occupies first time slot data which specified frame sync signal. Please refer format diagram. A-law u-law selectable register. Linear data Mode This mode interfaces linear data. CODEC AK2510 operates accuracy. bits fixed data stream. AK130 Mode This mode provides data Interface AK130, transceiver PBX/KTS system. data format 64kbps A-law u-law data. timing between data different from -Law data mode written above. this mode data transmitted/received channel data channel AK130. AK130 Mode This mode provides data interface AK130 channel same manner AK130 Mode. every mode, digital voice data from TIN, RIN, TOUT ROUT respectively clock 8KHz frame sync signal will BCLK must 8kHz clock that synchronized with BCLK. order linear data first. Table Summary interface modes
Mode
A/u-Law data mode 16bit Linear data mode AK130 mode AK130 mode
data format
A/u-Law 16bit Linear A/u-Law A/u-Law
BCLK rate
512k/2.048MHz 512k/2.048MHz 2.048MHz 2.048MHz
frame signal
LF/SF auto select only AK130 signal AK130 signal
Time slot
Time slot First after signal channel AK130 channel AK130
Selection interface mode
These four interface modes selectable through register which specified below. A/u-Law also selectable from same register effective -law interface mode AK130 B1/B2 modes.
Register Name; Path Control Register Type Read Write ALAW PCM_1 PCM_0 MUTE1 MUTE0 Default
VSMOD
VSMOD
PCM_10 interface mode select
PCM_1 PCM_0 Mode A/u-Law data mode 16bit Linear interface mode AK130 mode AK130 mode
ALAW compress/Extend format select ALAW Compress/Extend u-law
A-law -8AK2510-E-00
Timing format interface
u/A-Law data Mode
[AK2510]
bits data accommodated frame( 125us defined 8kHz frame sync signal. Although there time slots maximum 8kHz frame(when BCK=2.048MHz), data AK2510 occupies first time slot indicated figures below. 2-1-a Signals Frame Sync signal (FS) 8kHz reference signal. This signal indicated timing frame position 8kHz interfa Clock (BCLK) BCLK defines data rate. BCLK varied 512kHz 2.048MHz. data output (TOUT, ROUT) TOUT ROUT output signal 64Kbps u/A-law data. data synchronized BCLK which determines data rate. period which data occupied, TOUT, ROUT pins turns Hi-impedance. long frame mode, turns -impedance faster edge either falling edge rising edge BCLK. data input (TIN, RIN) input signal 64Kbps u/A-law data. data clocked falling edge BCLK into interface block. 2-1-b LONG FRAME( SHORT FRAME Automatic selection AK2510 monitors duration level automatically selects interface format.
Period FS="H" More than clocks BCLK clock BCLK
2-1-c Frame format interface Long Frame format
Interface format
BCLK
Short Frame format
BCLK
AK2510-E-00
Linear data mode
[AK2510]
this mode linear data interfaced outside. This mode useful compress/extend data using much higher compress rate algorithm than u/A-law algorithm external DSP. AK2510 operates 14bit accuracy, thus least bits output fixed value. 2-2-a Signals Frame Sync signal (FS) 8kHz reference signal which same u/A-law data mode. pulse level width should clock period same short frame mode. Clock (BCLK) BCLK defines data rate. BCLK varied from 512kHz 2.048MHz which different from u/A-law data mode. data output (TOUT, ROUT) TOUT ROUT output signal 128Kbps linear data. data synchronized BCLK which determines data rate. period which data occupied, TOUT ROUT pins turns Hi-impedance output. data input (TIN, RIN) input signal 128Kbps linear data. data clocked falling edge BCLK into interface block.
16bti Linear Frame format
125us (8KHz)
BCLK Hi-Z First First Hi-Z Hi-Z
AK130 B1/B2 Mode
These modes connecting interface AK130, AKM's TCM( ping-pong transceiver PBX/KTS system. data format A-law u-law which selected register. AK130 mode interfaces data channel, channel which AK130 provides, AK130 mode interfaces data channel. 2-3-a Signals Frame Sync signal (FS) Please feed signal which generated AK130.( pin#3 Clock (BCLK) BCLK defines data rate. Please 2.048MHz clock which generated AK130.( E2o,pin#5 data output (TOUT, ROUT) TOUT ROUT output signal 64Kbps data. Please connect ROUT data input AK130. DSTi,pin#11 data input (TIN, RIN) input signal 64Kbps data. data clocked falling edge BCLK into interface block. Please connect data output AK130. DSTo,pin#6
AK2510-E-00
[AK2510]
AK130 Mode
244ns 125us(8kHz) BCLK
16CLK
8CLK First
First
Hi-Z
Hi-Z
Note)*Don't care
AK130 Mode
244ns 125us(8kHz) BCLK
24CLK
8CLK First
First
Hi-Z
Hi-Z
Note)*Don't care
AK2510-E-00
[AK2510]
INTERFACE internal registers read/written serial interface which consists SCLK, DATA, pin. word consists 16bits. first 3bits instruction code which specifies read write. following 4bits specify address. rest 8bits data stored internal registers. Table1-A ADDRESS/DATA STRUCTURE
Instruction code
Address (4bit)
Data internal registers (8bit)
*)Dummy adjusting timing when reading register.
Table1-B INSTRUCTION CODE
Others
Read/Write Read Write action
Timing Interface
SCLK DATA timing WRITE/READ operation
Input data loaded into internal shift register rising edge SCLK. rising edge SCLK counted after falling edge CSN. When more than SCLK pulses: [WRITE] Data loaded into internal register rising edge SCLK pulse. [READ] DATA becomes input falling edge SCLK pulse.
timing WRITE/READ CANCELLATION
WRITE cancelled when goes before rising edge SCLK pulse. READ cancelled when goes before falling edge SCLK pulse.
SERIAL WRITE/READ ACCESS timing (SERIAL ACCESS MODE)
Serial write read operation will done feeding another SCLK pulse data after write read operation. necessary make high between operation operation.
AK2510-E-00
WRITE Continuous SCLK
SCLK DATA
[AK2510]
Goes anytime after SCLK 16th pulse before 32nd pulse
Instruction Code
Address "0000"
Write data address"000"
WRITE rising edge SCLK 16th pulse
Instruction Code
Write data
Burst SCLK SCLK stoped level level anytime during write cycle. After resuming SCLK, write cycle retrieved normally.
Goes anytime after SCLK 16th pulse 32nd pulse
SCLK DATA
Instruction Code
Address "0000"
Write data address "000"
WRITE rising edge SCLK 16th pulse
CANCELLATION
goes before rising edge 16th SCLK pulse
SCLK DATA
Instruction Code
Address "0000"
Write data address"000"
Write Excuted
DATA pin: Input mode (Hi-Z)
AK2510-E-00
SERIAL ACCESS Serial access done staying during serise write cycle.
SCLK DATA
[AK2510]
Write data
Instruction Code
Address "0000"
Write data Address"000" EXCUTE!
Instruction Code
EXCUTED!
READ Continuous SCLK
going anytime after SCLK 16th pulse before 32nd pulse
SCLK DATA
Read Instruction
Address
Read Data
Read Instruction
Read Data
Data output starts falling edge SCLK pulse
Read period until earlier edge either rising SCLK 16th pulse falling
Burst SCLK
going anytime after SCLK 16th pulse before 32nd pulse
SCLK DATA
Read Data
Read Instruction
Address
Read output starts falling edge SCLK pulse
AK2510-E-00
SERIAL ACCESS Serial access done staying during serise read cycle
[AK2510]
SCLK DATA
Read Instruction
Address "0000"
Read data READ EXCUTED!
Read Instruction READ EXCUTED!
DISCORD INSTRUCTION CODE
SCLK DATA
Address
IInstructions except specified (b=0
WRITE/READ EXCUTED!
DATA pin: Input mode (Hi-Z)
AK2510-E-00
[AK2510]
APPLICATION EXAMPLE This application example AK2510. AK2510 easily conect AKM's CODEC, AK2307/LV AK2308LV.
Speaker
CODEC
AK2307/LV AK2308LV
Voice Switch
ROUT
Handset
AK2510
Highway TOUT
PACKAGE 16pin TSSOP
0.17±0.05
5.00±0.08
4.4±0.1
0.65
0.13
0.22±0.08
1.00±0.05
0.10
0.070.03 0.04
1.070.03 0.07
6.4±0.2
0.5±0.2
AK2510-E-00
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