FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER FEATURES

The Datasheet Archive - 100 Million Datasheets from 7500 Manufacturers.

FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER FEATURES

Datasheet Thumbnail

Top Searches for this datasheet

ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
FEATURES
3.3V differential LVPECL output pairs Using 19.53125MHz 25MHz crystal, output banks independently 625MHz, 312.5MHz, 156.25MHz 125MHz Crystal oscillator interface range: 490MHz 680MHz phase jitter 156.25MHz (1.875MHz 20MHz): 0.47ps (typical) Full 3.3V supply mode 70°C ambient operating temperature Industrial temperature available upon request Available both standard lead-free RoHS-compliant packages
GENERAL DESCRIPTION
ICS843252 differential output LVPECL Synthesizer designed generate Ethernet referHiPerClockSence clock frequencies member HiPerClocksfamily high performance clock solutions from ICS. Using 19.53125MHz 25MHz, 18pF parallel resonant crystal, following frequencies generated based settings frequency select pins (SEL[A1:A0], SEL[B1:B0]): 625MHz, 312.5MHz, 156.25MHz, 125MHz.
banks have their dedicated frequency select pins independently frequencies mentioned above. ICS843252 ICS' generation phase noise technology achieve lower typical phase jitter, easily meeting Ethernet jitter requirements. ICS843252 packaged small 16-pin TSSOP package.
BLOCK DIAGRAM
SELA[0:1} Pullup
(default) (default)
ASSIGNMENT
VCCO SELB1 SELB0 VCCO XTAL_IN XTAL_OUT SELA1 SELA0 FB_SEL
XTAL_IN XTAL_OUT
Phase Detector
490MHz 680MHz
Feedback Divider (default)
ICS843252
16-Lead TSSOP 4.4mm 5.0mm 0.92mm package body Package View
FB_SEL Pulldown SELB[0:1} Pullup
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 843252AG REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Differential clock outputs. LVPECL interface levels. Output supply outputs. Division select pins Bank Default High. LVCMOS/LVTTL interface levels. Output supply output. Differential clock outputs. LVPECL interface levels. Feedback divide select. When (default), feedback divider ÷25. When HIGH, feedback divider ÷32. LVCMOS/LVTTL interface levels. Analog supply pin.
TABLE DESCRIPTIONS
nQB, VCCO_B SELB1, SELB0 VCCO_A FB_SEL VCCA Power Input Power Output Input Power Pulldown Pullup
Output
Power Core supply pin. SELA0, Division select pins Bank Default HIGH. Input Pullup SELA1 LVCMOS/LVTTL interface levels. Power Negative supply pin. XTAL_OUT, ystal oscillator interface. XTAL_IN input, XTAL_OUT output. Input XTAL_IN NOTE: Pullup Pulldown refer internal input resistors. Table Characteristics, typical values.
TABLE CHARACTERISTICS
Symbol RPULLDOWN RPULLUP Parameter Input Capacitance Input Pulldown Resistor Input Pullup Resistor Test Conditions Minimum Typical Maximum Units
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Multiplication Factor 12.5 12.500 8.333 6.25 6.25 6.25 10.667 QA/nQA Output Frequency (MHz) 312.5 187.5 156.25 622.08 311.04 155.52
TABLE BANK FREQUENCY TABLE
Inputs Crystal Frequency (MHz) 22.5 19.44 19.44 15.625 18.75 19.44 18.75 15.625 FB_SEL SELA1 SELA0 Feedback Divider Bank Output Divider
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Multiplication Factor 12.5 12.5 6.25 6.25 6.25 3.125 3.125 3.125 QB/nQB Output Frequency (MHz) 312.5 156.25 78.125 62.5 311.04 155.52 77.76 62.5
TABLE BANK FREQUENCY TABLE
Inputs Crystal Frequency (MHz) 19.44 15.625 19.44 18.75 15.625 15.625 19.44 18.75 15.625 FB_SEL SELB1 SELB0 Feedback Divider Bank Output Divider
TABLE OUTPUT BANK CONFIGURATION SELECT FUNCTION TABLES
Inputs SELA1 SELA0 Outputs (default) SELB1 Inputs SELB0 Outputs (default)
TABLE FEEDBACK DIVIDER CONFIGURATION SELECT FUNCTION TABLE
Inputs FB_SEL Feedback Divide (default)
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
4.6V -0.5V 0.5V 50mA 100mA 89°C/W lfpm) -65°C 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Inputs, Outputs, Continuous Current Surge Current Package Thermal Impedance, Storage Temperature, TSTG
TABLE POWER SUPPLY CHARACTERISTICS, VCCA VCCO_A, VCCO_B 3.3V±5%, 70°C
Symbol VCCA VCCO_A, VCCO_B ICCA Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 3.135 Typical Maximum 3.465 3.465 3.465 Units
TABLE LVCMOS LVTTL CHARACTERISTICS, VCCA VCCO_A VCCO_B 3.3V±5%, 70°C
Symbol Parameter Input High Voltage Input Voltage Input High Current Input Current FB_SEL SELA0, SELA1, SELB0, SELB1 FB_SEL SELA0, SELA1, SELB0, SELB1 3.465V 3.465V 3.465V, 3.465V, -150 Test Conditions Minimum -0.3 Typical Maximum Units
TABLE LVPECL CHARACTERISTICS, VCCA VCCO_A VCCO_B 3.3V±5%, 70°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Test Conditions Minimum VCCO VCCO Typical Maximum VCCO VCCO Units
NOTE Outputs terminated with VCCO_B
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Test Conditions Minimum 19.6 15.313 Typical Fundamental 27.2 21.25 Maximum Units
TABLE CRYSTAL CHARACTERISTICS
Parameter Mode Oscillation Frequency FB_SEL FB_SEL
Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level NOTE: Characterized using 18pF parallel resonant ystal.
TABLE CHARACTERISTICS, VCCA VCCO_A, VCCO_B 3.3V±5%, 70°C
Symbol Parameter Test Conditions Output Divider Output Divider fOUT Output Frequency Range Output Divider Output Divider Output Divider Output Divider sk(o) Output Skew; NOTE Outputs Same Frequency Outputs Different Frequencies 625MHz (1.875MHz 20MHz) Phase Jitter (Random); NOTE Output Rise/Fall Time 312.5MHz (1.875MHz 20MHz) 156.25MHz (1.875MHz 20MHz) 125MHz (1.875MHz 20MHz) Minimum 163.33 122.5 61.25 0.36 0.43 0.47 0.47 Typical Maximum 226.67 Units
Output Duty Cycle NOTE Defined skew between outputs same supply voltages with equal load conditions. Measured output differential cross points. NOTE Please refer Phase Noise Plot. NOTE This parameter defined accordance with JEDEC Standard
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
TYPICAL PHASE NOISE
156.25MHZ
-100 -110 -120 -130 -140 -150 -160 -170 -180 -190 100k 100M
10Gb Ethernet Filter 156.25MHz
Phase Jitter (Random) 1.875Mhz 20MHz 0.47ps (typical)
Phase Noise Data
NOISE POWER
Phase Noise Result adding 10Gb Ethernet Filter data OFFSET FREQUENCY (HZ)
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
PARAMETER MEASUREMENT INFORMATION
VCCA, VCCO_A.
SCOPE
LVPECL
tsk(o)
-1.3V±0.165V
3.3V CORE/3.3V OUTPUT LOAD TEST CIRCUIT
OUTPUT SKEW
Phase Noise Plot
Noise Power
Phase Noise Mask
Clock Outputs
Offset Frequency
Jitter Area Under Masked Phase Noise Plot
PHASE JITTER
OUTPUT RISE/FALL TIME
nQA,
PERIOD
PERIOD
100%
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
high speed analog circuitry, power supply pins vulnerable random noise. ICS843252 provides separate power supplies isolate high switching noise from outputs internal PLL. VCC, VCCA, VCCO_X should individually connected power supply plane through vias, bypass capacitors should used each pin. achieve optimum jitter performance, power supply isolation required. Figure illustrates resistor along with .01F bypass capacitor should connected each VCCA pin.
3.3V .01F VCCA .01F
FIGURE POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
ICS843252 been characterized with 18pF parallel resonant crystals. capacitor values shown Figure below were determined using 19.53125 25MHz, 18pF parallel resonant crystal were chosen minimize error.
XTAL_OUT 18pF Parallel Crystal XTAL_IN
Figure CRYSTAL INPUt INTERFACE
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
RECOMMENDATIONS UNUSED INPUT OUTPUT PINS INPUTS: OUTPUTS:
LVCMOS CONTROL PINS: control pins have internal pull-ups pull-downs; additional resistance required added additional protection. resistor used. LVPECL OUTPUT unused LVPECL outputs left floating. recommend that there trace attached. Both sides differential output pair should either left floating terminated.
TERMINATION
3.3V LVPECL OUTPUT
designed drive transmission lines. Matched impedance techniques should used maximize operating frequency minimize signal distortion. Figures show different layouts which recommended only guidelines. Other suitable clock layouts exist would recommended that board designers simulate guarantee compatibility across printed circuit clock component process variations.
clock layout topology shown below typical termination LVPECL outputs. different layouts mentioned recommended only guidelines. FOUT nFOUT impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors current path ground) current sources must used functionality. These outputs
3.3V
FOUT
FOUT
((VOH VOL) (VCC
FIGURE LVPECL OUTPUT TERMINATION
FIGURE LVPECL OUTPUT TERMINATION
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER POWER CONSIDERATIONS
This section provides information power dissipation junction temperature ICS843252. Equations example calculations also provided. Power Dissipation. total power dissipation ICS843252 core power plus power dissipated load(s). following power dissipation 3.3V 3.465V, which gives worst case results. NOTE: Please refer Section details calculating power dissipated load.
Power (core)MAX VCC_MAX IEE_MAX 3.465V 122mA 422.73mW Power (outputs)MAX 30mW/Loaded Output pair outputs loaded, total power 30mW 60mW
Total Power_MAX (3.465V, with outputs switching) 422.73mW 60mW 482.73mW
Junction Temperature. Junction temperature, temperature junction bond wire bond directly affects reliability device. maximum recommended junction temperature HiPerClockSdevices 125°C. equation follows: Pd_total Junction Temperature Junction-to-Ambient Thermal Resistance Pd_total Total Device Power Dissipation (example calculation section above) Ambient Temperature order calculate junction temperature, appropriate junction-to-ambient thermal resistance must used. Assuming moderate flow linear feet minute multi-layer board, appropriate value 81.8°C/W Table below. Therefore, ambient temperature 70°C with outputs switching 70°C 0.483W 81.8°C/W 109.5°C. This well below limit 125°C. This calculation only example. will obviously vary depending number loaded outputs, supply voltage, flow, type board (single layer multi-layer).
TABLE THERMAL RESISTANCE 16-PIN TSSOP, FORCED CONVECTION
Velocity (Linear Feet Minute)
Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 137.1°C/W 89.0°C/W
118.2°C/W 81.8°C/W
106.8°C/W 78.1°C/W
NOTE: Most modern designs multi-layered boards. data second pertains most designs.
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Calculations Equations. purpose this section derive power dissipated into load. LVPECL output driver circuit termination shown Figure
VOUT
FIGURE LVPECL DRIVER CIRCUIT TERMINATION
calculate worst case power dissipation into load, following equations which assume load, termination voltage
logic high, VOUT
CCO_MAX
OH_MAX
CC_MAX
0.9V
OH_MAX
0.9V 1.7V
logic low, VOUT
CCO_MAX
OL_MAX
CC_MAX
OL_MAX
1.7V
Pd_H power dissipation when output drives high. Pd_L power dissipation when output drives low. Pd_H [(VOH_MAX (VCC_MAX 2V))/R (VCC_MAX VOH_MAX) [(2V _MAX VOH_MAX))/R (VCC_MAX VOH_MAX) [(2V 0.9V)/50] 0.9V 19.8mW
Pd_L
OL_MAX
CC_MAX
2V))/R
CC_MAX
OL_MAX
[(2V
CC_MAX
OL_MAX
))/R
CC_MAX
OL_MAX
[(2V 1.7V)/50] 1.7V 10.2mW Total Power Dissipation output pair Pd_H Pd_L 30mW
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER RELIABILITY INFORMATION
TABLE JAVS. FLOW TABLE LEAD TSSOP
Velocity (Linear Feet Minute)
Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards 137.1°C/W 89.0°C/W
118.2°C/W 81.8°C/W
106.8°C/W 78.1°C/W
NOTE: Most modern designs multi-layered boards. data second pertains most designs.
TRANSISTOR COUNT
transistor count ICS843252 3822
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
LEAD TSSOP
PACKAGE OUTLINE SUFFIX
TABLE PACKAGE DIMENSIONS
SYMBOL 0.45 -4.30 -0.05 0.80 0.19 0.09 4.90 6.40 BASIC 4.50 0.65 BASIC 0.75 0.10 Millimeters Minimum 1.20 0.15 1.05 0.30 0.20 5.10 Maximum
Reference Document: JEDEC Publication MO-153
843252AG
REV. NOVEMBER 2005
ICS843252
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
TABLE ORDERING INFORMATION
Part/Order Number Marking Package Shipping Packaging Temperature ICS843252AG 843252AG Lead TSSOP tube 70°C ICS843252AGT 843252AG Lead TSSOP 2500 tape reel 70°C ICS843252AGLF Lead "Lead-Free" TSSOP tube 70°C ICS843252AGLFT Lead "Lead-Free" TSSOP 2500 tape reel 70°C NOTE: that ordered with "LF" suffix number Pb-Free configuration RoHS compliant.
aforementioned trademarks, HiPerClockSand FemtoClocksare trademark Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial applications. other applications such those requiring extended temperature range, high reliability, other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 843252AG
REV. NOVEMBER 2005

FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER FEATURES

Top Searches for this datasheet

Other recent searches