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Differential LVPECL output Crystal oscillator interface, 18pF parallel


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ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
Differential LVPECL output Crystal oscillator interface, 18pF parallel resonant crystal (23.2MHz 30MHz) Output frequency range: 290MHz 750MHz range: 580MHz 750MHz phase jitter 312.5MHz, using 25MHz crystal (1.875MHz 20MHz): 0.36ps (typical) 3.3V 2.5V operating supply -40°C 85°C ambient operating temperature Available both standard lead-free RoHS-compliant packages
GENERAL DESCRIPTION
ICS843251I-12 10Gb Ethernet Clock Generator member HiPerClocksHiPerClockSfamily high performance devices from ICS. ICS843251I-12 uses 18pF parallel resonant crystal over range 23.2MHz 30MHz. Ethernet applications, 25MHz crystal used. device excellent <1ps phase jitter performance, over 1.875MHz 20MHz integration range. ICS843251I-12 packaged small 8-pin TSSOP, making ideal systems with limited board space.
COMMON CONFIGURATION TABLE
Inputs Crystal Frequency (MHz) FREQ_SEL Multiplication Value 12.5 Output Frequency (MHz) 312.5
BLOCK DIAGRAM
FREQ_SEL
Pullup
ASSIGNMENT
FREQ_SEL
VCCA XTAL_OUT XTAL_IN FREQ_SEL
XTAL_IN
XTAL_OUT
Phase Detector
580MHz 750MHz
ICS843251I-12
8-Lead TSSOP 4.4mm 3.0mm 0.925mm package body Package View
(fixed)
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 843251BGI-12 REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
TABLE DESCRIPTIONS
Number Name VCCA XTAL_OUT, XTAL_IN FREQ_SEL Power Power Input Input Output Power Pullup Type Description Analog supply pin. Negative supply pin. Crystal oscillator interface. XTAL_IN input, XTAL_OUT output. Frequency select pin. LVCMOS/LVTTL interface levels. Differential clock outputs. LVPECL interface levels. Core supply pin.
NOTE: Pullup refers internal input resistors. Table Characteristics, typical values.
TABLE CHARACTERISTICS
Symbol RPULLUP Parameter Input Capacitance Input Pullup Resistor Test Conditions Minimum Typical Maximum Units
843251BGI-12
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ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Inputs, Outputs, Continuous Current Surge Current Package Thermal Impedance, Storage Temperature, TSTG 4.6V -0.5V 0.5V 50mA 100mA 101.7°C/W mps) -65°C 150°C
TABLE POWER SUPPLY CHARACTERISTICS, VCCA 3.3V±5%, -40°C 85°C
Symbol VCCA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Test Conditions Minimum 3.135 3.135 Typical Maximum 3.465 3.465 Units
TABLE POWER SUPPLY CHARACTERISTICS, VCCA 2.5V±5%, -40°C 85°C
Symbol VCCA Parameter Core Supply Voltage Analog Supply Voltage Power Supply Current Test Conditions Minimum 2.375 2.375 Typical Maximum 2.625 2.625 Units
TABLE LVCMOS/LVTTL CHARACTERISTICS, VCCA 3.3V±5% 2.5V±5%, -40°C 85°C
Symbol Parameter Input High Voltage Input Voltage Input High Current Input Current Test Conditions 3.3V 2.5V 3.3V 2.5V 3.465V 2.625V 3.465V 2.625V, -150 Minimum -0.3 -0.3 Typical Maximum Units
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
Minimum Typical Maximum Units
TABLE LVPECL CHARACTERISTICS, VCCA 3.3V±5% 2.5V±5%, -40°C 85°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Test Conditions
NOTE Outputs terminated with
TABLE CRYSTAL CHARACTERISTICS
Parameter Mode Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level 23.2 Test Conditions Minimum Typical Fundamental Maximum Units
TABLE CHARACTERISTICS, VCCA 3.3V±5%, -40°C 85°C
Symbol fOUT Parameter Output Frequency Phase Jitter Random); NOTE Output Rise/Fall Time Test Conditions F_SEL F_SEL 312.5MHz Integration Range: 1.875MHz 20MHz Minimum Typical 312.5 0.36 Maximum Units
Output Duty Cycle NOTE Please refer Phase Noise Plots following this section.
TABLE CHARACTERISTICS, VCCA 2.5V±5%, -40°C 85°C
Symbol fOUT Parameter Output Frequency Phase Jitter Random); NOTE Output Rise/Fall Time Test Conditions F_SEL F_SEL 312.5MHz Integration Range: 1.875MHz 20MHz Minimum Typical 312.5 0.38 Maximum Units
Output Duty Cycle NOTE Please refer Phase Noise Plots following this section.
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
TYPICAL PHASE NOISE
312.5MHZ (3.3V)
10GigE Filter 312.5MHz
Phase Jitter (Random) 1.875Mhz 20MHz 0.36ps (typical)
NOISE POWER
Phase Noise Data
-100 -110 -120 -130 -140 -150
-160 -170 -180 -190
Phase Noise Result adding 10GigE Filter data
100k
100M
OFFSET FREQUENCY
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
VCC, VCCA
SCOPE
VCC, VCCA
SCOPE
LVPECL
LVPECL
-1.3V 0.165V
-0.5V 0.125V
LVPECL 3.3V OUTPUT LOAD TEST CIRCUIT
LVPECL 2.5V OUTPUT LOAD TEST CIRCUIT
Phase Noise Plot
Noise Power
Phase Noise Mask
PERIOD
Offset Frequency
PERIOD
100%
Jitter Area Under Masked Phase Noise Plot
PHASE JITTER
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
Clock Outputs
OUTPUT RISE/FALL TIME
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
high speed analog circuitry, power supply pins vulnerable random noise. ICS843251I-12 provides separate power supplies isolate high switching noise from outputs internal PLL. VCCA should individually connected power supply plane through vias, bypass capacitors should used each pin. achieve optimum jitter performance, power supply isolation required. Figure illustrates resistor along with .01F bypass capacitor should connected each VCCA pin. resistor also replaced ferrite bead.
3.3V 2.5V .01F .01F
FIGURE POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
ICS843251I-12 been characterized with 18pF parallel resonant crystals. capacitor values (TBD), shown Figure below were determined using 25MHz, 18pF parallel resonant crystal were chosen minimize error. optimum values slightly adjusted different board layouts.
XTAL_IN Crystal XTAL_OUT
Figure CRYSTAL INPUt INTERFACE
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
designed drive transmission lines. Matched impedance techniques should used maximize operating frequency minimize signal distortion. Figures show different layouts which recommended only guidelines. Other suitable clock layouts exist would recommended that board designers simulate guarantee compatibility across printed circuit clock component process variations.
TERMINATION
3.3V LVPECL OUTPUT
clock layout topology shown below typical termination LVPECL outputs. different layouts mentioned recommended only guidelines. FOUT nFOUT impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors current path ground) current sources must used functionality. These outputs
3.3V
FOUT
FOUT
((VOH VOL) (VCC
FIGURE LVPECL OUTPUT TERMINATION
FIGURE LVPECL OUTPUT TERMINATION
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
ground level. Figure eliminated termination shown Figure
TERMINATION
2.5V LVPECL OUTPUT
Figure Figure show examples termination 2.5V LVPECL driver. These terminations equivalent terminating 2.5V, very close
2.5V
2.5V 2.5V VCC=2.5V 2,5V LVPECL Driv 62.5 62.5
VCC=2.5V 2,5V LVPECL Driv
FIGURE 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V VCC=2.5V 2,5V LVPECL Driv
FIGURE 2.5V LVPECL TERMINATION EXAMPLE
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
RELIABILITY INFORMATION
TABLE JAVS. FLOW TABLE
LEAD TSSOP
Velocity (Meters Second)
Multi-Layer PCB, JEDEC Standard Test Boards 101.7°C/W
90.5°C/W
89.8°C/W
TRANSISTOR COUNT
transistor count ICS843251I-12 2377
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
PACKAGE OUTLINE SUFFIX
LEAD TSSOP
TABLE PACKAGE DIMENSIONS
SYMBOL 0.45 -4.30 0.65 BASIC 0.75 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication MO-153
843251BGI-12
REV. JANUARY 2006
ICS843251I-12 FEMTOCLOCKSCRYSTAL-TO-3.3V, 2.5V LVPECL CLOCK GENERATOR
Package Shipping Packaging tube 2500 tape reel tube 2500 tape reel Temperature -40°C 85°C -40°C 85°C -40°C 85°C -40°C 85°C
TABLE ORDERING INFORMATION
Part/Order Number ICS843251BGI-12 ICS843251BGI-12T ICS843251BGI-12LF ICS843251BGI-12FT Marking BI12L BI12L Lead TSSOP Lead TSSOP Lead "Lead-Free" TSSOP Lead "Lead-Free" TSSOP
NOTE: that ordered with "LF" suffix number Pb-Free configuration RoHS compliant.
aforementioned trademarks, HiPerClockS FemtoClocks trademarks Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial industrial applications. other applications such those requiring high reliability other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 843251BGI-12
REV. JANUARY 2006

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