FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED F
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
FEATURES
LVPECL outputs Crystal oscillator interface Output frequency range: 53.125MHz 333.3333MHz Crystal input frequency range: 25MHz 33.333MHz phase jitter 125MHz, using 25MHz crystal (1.875MHz 20MHz): 0.41ps (typical) Full 3.3V 3.3V core, 2.5V output supply mode 70°C ambient operating temperature Industrial temperature information available upon request Available both standard lead-free RoHS-compliant packages
Function
GENERAL DESCRIPTION
ICS843246 Crystal-to-3.3V LVPECL Clock Synthesizer/Fanout Buffer designed HiPerClockSFibre Channel Gigabit Ethernet applications member HiperClockSfamily High Performance Clock Solutions from ICS. output frequency using frequency select pins 25MHz crystal Ethernet frequencies, 26.5625MHz crystal Fibre Channel. phase noise characteristics ICS843246 make ideal clock these demanding applications.
SELECT FUNCTION TABLE
Inputs FB_SEL N_SEL1 N_SEL0 Divide Divide
BLOCK DIAGRAM
PLL_BYPASS
Pullup
ASSIGNMENT
VCCO VCCO PLL_BYPASS FB_SEL N_SEL1 N_SEL0 XTAL_OUT XTAL_IN
XTAL_IN XTAL_OUT
Output Divider
Feedback Divider
FB_SEL N_SEL1 N_SEL0
Pulldown Pullup Pullup
ICS843246
24-Lead, 300-MIL SOIC 7.5mm 15.33mm 2.3mm body package Package View 24-Lead TSSOP 4.40mm 7.8mm 0.92mm body package Package View
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 843246AM REV. SEPTEMBER 2005
ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
Type Power Output Output Output Input Power Power Input Input Input Pullup Description Output supply pins. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Selects between crystal inputs input dividers. When LOW, selects PLL. When HIGH, selects XTAL_IN, XTAL_OUT. LVCMOS LVTTL interface levels. Analog supply pin. Core supply pin. Pulldown Feedback frequency select pin. LVCMOS/LVTTL interface levels. Crystal oscillator interface. XTAL_IN input. XTAL_OUT output. Pullup Output frequency select pin. LVCMOS/LVTTL interface levels. Negative supply pin. Output Output Output Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels. Differential output pair. LVPECL interface levels.
TABLE DESCRIPTIONS
Number Name VCCO nQ2, nQ1, nQ0, PLL_BYPASS VCCA FB_SEL XTAL_IN, XTAL_OUT N_SEL0 N_SEL1 nQ5, nQ4, nQ3,
NOTE: Pullup Pulldown refer internal input resistors. Table Characteristics, typical values.
TABLE CHARACTERISTICS
Symbol RPULLUP RPULLDOWN Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor Test Conditions Minimum Typical Maximum Units
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
Function
TABLE CRYSTAL FUNCTION TABLE
Inputs XTAL (MHz) 26.5625 26.5625 26.5625 26.5625 26.5625 31.25 31.25 31.25 31.25 33.3333 33.3333 33.3333 33.3333 FB_SEL N_SEL1 N_SEL0 531.25 637.5 637.5 637.5 637.5 666.6667 666.6667 666.6667 666.6667 (MHz) Output (MHz) 62.5 106.25 212.5 159.375 106.25 53.125 312.5 156.25 78.125 333.3333 166.6667 133.3333 83.3333
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
4.6V -0.5V 0.5V 50mA 100mA 50°C/W lfpm) 70°C/W mps) -65°C 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Inputs, Outputs, Continuous Current Surge Current Package Thermal Impedance, Lead SOIC Lead TSSOP Storage Temperature, TSTG
TABLE POWER SUPPLY CHARACTERISTICS, VCCA VCCO 3.3V±5%, 70°C
Symbol VCCA VCCO ICCA Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 3.135 Typical Maximum 3.465 3.465 3.465 Units
TABLE POWER SUPPLY CHARACTERISTICS, VCCA 3.3V±5%, VCCO 2.5V±5%, 70°C
Symbol VCCA VCCO ICCA Parameter Core Supply Voltage Analog Supply Voltage Output Supply Voltage Power Supply Current Analog Supply Current Test Conditions Minimum 3.135 3.135 2.375 Typical Maximum 3.465 3.465 2.625 Units
TABLE LVCMOS LVTTL CHARACTERISTICS, VCCA 3.3V±5%, VCCO 3.3V±5% 2.5V±5%, 70°C
Symbol Parameter Input High Voltage Input Voltage Input High Current FB_SEL PLL_BYPASS, N_SEL0, N_SEL1 FB_SEL PLL_BYPASS, N_SEL0, N_SEL1 3.465V 3.465V 3.465V, 3.465V, -150 Test Conditions Minimum -0.3 Typical Maximum Units
Input Current
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FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
Test Conditions Minimum VCCO VCCO Typical Maximum VCCO VCCO Units
TABLE LVPECL CHARACTERISTICS, VCCA 3.3V±5%, VCCO 3.3V±5% 2.5V±5%, 70°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing
NOTE Outputs terminated with VCCO
TABLE CRYSTAL CHARACTERISTICS
Parameter Mode Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level NOTE: Characterized using 18pf parallel resonant crystal. Test Conditions Minimum Typical Maximum 33.333 Units Fundamental
TABLE CHARACTERISTICS, VCCA VCCO 3.3V±5%, 70°C
Symbol Parameter FOUT sk(o) Output Frequency Phase Jitter (Random) Output Skew; NOTE Output Rise/Fall Time Output Duty Cycle 125MHz, Integration Range: 1.875MHz 20MHz Test Conditions Minimum 53.125 0.41 Typical Maximum 333.33 Units
Lock Time tLOCK Parameter Measurement Information section. NOTE Defined skew between outputs same supply voltage with equal load conditions. Measured output differential crossing points. NOTE This parameter defined accordance with JEDEC Standard
TABLE CHARACTERISTICS, VCCA 3.3V±5%, VCCO 2.5V±5%, 70°C
Symbol Parameter FOUT sk(o) Output Frequency Phase Jitter (Random) Output Skew; NOTE Output Rise/Fall Time Output Duty Cycle 125MHz, Integration Range: 1.875MHz 20MHz Test Conditions Minimum 53.125 0.41 Typical Maximum 333.33 Units
Lock Time tLOCK Parameter Measurement Information section. NOTE Defined skew between outputs same supply voltage with equal load conditions. Measured output differential crossing points. NOTE This parameter defined accordance with JEDEC Standard
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
TYPICAL PHASE NOISE
125MHZ 3.3V
Ethernet Filter 125MHz
Phase Jitter (Random) 1.875MHz 20MHz 0.41ps (typical)
NOISE POWER
-100 -110 -120 -130 -140 -160 -170 -180 -190 100k 100M -150
Phase Noise Data
Phase Noise Result adding Ethernet Filter data OFFSET FREQUENCY (HZ)
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
PARAMETER MEASUREMENT INFORMATION
2.8V±0.04V
VCC, VCCA, VCCO
SCOPE
VCC, VCCA
VCCO
SCOPE
LVPECL
LVPECL
-1.3V 0.165V
-0.5V 0.125V
3.3V OUTPUT LOAD TEST CIRCUIT
3.3V/2.5V OUTPUT LOAD TEST CIRCUIT
nQ0:nQ5 Q0:Q5
PERIOD
tsk(o)
PERIOD
100%
OUTPUT SKEW
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
Clock Outputs
OUTPUT RISE/FALL TIME
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
high speed analog circuitry, power supply pins vulnerable random noise. ICS843246 provides separate power supplies isolate high switching noise from outputs internal PLL. VCC, VCCA VCCO should individually connected power supply plane through vias, bypass capacitors should used each pin. achieve optimum jitter performance, power supply isolation required. Figure illustrates resistor along with .01F bypass capacitor should connected each pin. resistor also replaced ferrite bead.
3.3V .01F .01F
FIGURE POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
ICS843246 been characterized with 18pF parallel resonant crystals. capacitor values shown Figure below were determined using 18pF parallel resonant crystal were chosen minimize error.
XTAL_OUT 18pF Parallel Crystal XTAL_IN
Figure CRYSTAL INPUt INTERFACE
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FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
RECOMMENDATIONS UNUSED INPUT OUTPUT PINS INPUTS: OUTPUTS:
LVCMOS CONTROL PINS: control pins have internal pull-ups pull-downs; additional resistance required added additional protection. resistor used. LVPECL OUTPUT unused LVPECL outputs left floating. recommend that there trace attached. Both sides differential output pair should either left floating terminated.
TERMINATION 3.3V LVPECL OUTPUT
clock layout topology shown below typical termination LVPECL outputs. different layouts mentioned recommended only guidelines. FOUT nFOUT impedance follower outputs that generate ECL/LVPECL compatible outputs. Therefore, terminating resistors current path ground) current sources must used functionality. These outputs designed drive transmission lines. Matched impedance techniques should used maximize operating frequency minimize signal distortion. Figures show different layouts which recommended only guidelines. Other suitable clock layouts exist would recommended that board designers simulate guarantee compatibility across printed circuit clock component process variations.
3.3V
FOUT
FOUT
((VOH VOL) (VCC
FIGURE LVPECL OUTPUT TERMINATION
FIGURE LVPECL OUTPUT TERMINATION
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FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
close ground level. Figure eliminated termination shown Figure
TERMINATION 2.5V LVPECL OUTPUT
Figure Figure show examples termination 2.5V LVPECL driver. These terminations equivalent terminating 2.5V, very
2.5V 2.5V VCCO=2.5V 2,5V LVPECL Driv 62.5 62.5
2.5V VCCO=2.5V 2,5V LVPECL Driv
FIGURE 2.5V LVPECL DRIVER TERMINATION EXAMPLE
FIGURE 2.5V LVPECL DRIVER TERMINATION EXAMPLE
2.5V VCCO=2.5V 2,5V LVPECL Driv
FIGURE 2.5V LVPECL TERMINATION EXAMPLE
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER POWER CONSIDERATIONS
This section provides information power dissipation junction temperature ICS843246. Equations example calculations also provided. Power Dissipation. total power dissipation ICS843246 core power plus power dissipated load(s). following power dissipation 3.3V 3.465V, which gives worst case results. NOTE: Please refer Section details calculating power dissipated load.
Power (core)MAX VCC_MAX IEE_MAX 3.465V 107mA 370.75mW Power (outputs)MAX 30.2mW/Loaded Output pair outputs loaded, total power 30mW 180mW
Total Power_MAX (3.465V, with outputs switching) 370.75mW 180mW 550.75mW
Junction Temperature. Junction temperature, temperature junction bond wire bond directly affects reliability device. maximum recommended junction temperature HiPerClockSdevices 125°C. equation follows: Pd_total Junction Temperature Junction-to-Ambient Thermal Resistance Pd_total Total Device Power Dissipation (example calculation section above) Ambient Temperature order calculate junction temperature, appropriate junction-to-ambient thermal resistance must used. Assuming moderate flow linear feet minute multi-layer board, appropriate value 43°C/W Table below. Therefore, ambient temperature 70°C with outputs switching 70°C 0.551W 43°C/W 93.7°C. This well below limit 125°C. This calculation only example. will obviously vary depending number loaded outputs, supply voltage, flow, type board (single layer multi-layer).
TABLE THERMAL RESISTANCE 24-PIN SOIC, FORCED CONVECTION
Velocity (Linear Feet Minute)
Multi-Layer PCB, JEDEC Standard Test Boards 50°C/W
43°C/W
38°C/W
NOTE: Most modern designs multi-layered boards. data second pertains most designs.
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Calculations Equations. purpose this section derive power dissipated into load. LVPECL output driver circuit termination shown Figure
VCCO
ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
VOUT VCCO
FIGURE LVPECL DRIVER CIRCUIT TERMINATION
calculate worst case power dissipation into load, following equations which assume load, termination voltage
logic high, VOUT VOH_MAX VCCO_MAX 0.9V
CCO_MAX
OH_MAX
0.9V 1.7V
logic low, VOUT
OL_MAX
CCO_MAX
(VCCO_MAX VOL_MAX) 1.7V
Pd_H power dissipation when output drives high. Pd_L power dissipation when output drives low. Pd_H [(VOH_MAX (VCCO_MAX 2V))/R (VCCO_MAX VOH_MAX) [(2V (VCCO_MAX VOH_MAX))/R (VCCO_MAX VOH_MAX)
[(2V 0.9V)/50] 0.9V 19.8mW Pd_L [(VOL_MAX (VCCO_MAX 2V))/R (VCCO_MAX VOL_MAX) [(2V (VCCO_MAX VOL_MAX))/R (VCCO_MAX VOL_MAX)
[(2V 1.7V)/50] 1.7V 10.2mW Total Power Dissipation output pair Pd_H Pd_L 30mW
843246AM
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER RELIABILITY INFORMATION
TABLE JAVS. FLOW TABLE LEAD SOIC
Velocity (Linear Feet Minute)
Multi-Layer PCB, JEDEC Standard Test Boards 50°C/W
43°C/W
38°C/W
NOTE: Most modern designs multi-layered boards. data second pertains most designs.
TABLE JAVS. FLOW TABLE LEAD TSSOP
Velocity (Meters Second)
Multi-Layer PCB, JEDEC Standard Test Boards 70°C/W
65°C/W
62°C/W
TRANSISTOR COUNT
transistor count ICS843246 3863
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ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
LEAD SOIC PACKAGE OUTLINE SUFFIX
PACKAGE OUTLINE SUFFIX
LEAD TSSOP
TABLE PACKAGE DIMENSIONS
SYMBOL 10.00 0.25 0.40 -0.10 2.05 0.33 0.18 15.20 7.40 1.27 BASIC 10.65 0.75 1.27 Millimeters Minimum 2.65 -2.55 0.51 0.32 15.85 7.60 Maximum
TABLE PACKAGE DIMENSIONS
SYMBOL 0.45 -4.30 0.65 BASIC 0.75 0.10 -0.05 0.80 0.19 0.09 7.70 6.40 BASIC 4.50 Millimeters Minimum 1.20 0.15 1.05 0.30 0.20 7.90 Maximum
Reference Document: JEDEC Publication MS-013, MO-119
Reference Document: JEDEC Publication MO-153
843246AM
REV. SEPTEMBER 2005
ICS843246
FEMTOCLOCKSCRYSTAL-TO-3.3V LVPECL FREQUENCY SYNTHESIZER W/INTEGRATED FANOUT BUFFER
Marking Package Lead SOIC Lead SOIC Lead "Lead-Free" SOIC Lead "Lead-Free" SOIC Lead TSSOP Lead TSSOP Lead "Lead-Free" TSSOP Lead "Lead-Free" TSSOP Shipping Packaging tube 1000 tape reel tube 1000 tape reel tube 2500 tape reel tube 2500 tape reel Temperature 70°C 70°C 70°C 70°C 70°C 70°C 70°C 70°C
TABLE ORDERING INFORMATION
Part/Order Number ICS843246AM ICS843246AMT ICS843246AMLF ICS843246AMLFT ICS843246AG ICS843246AGT ICS843246AGLF ICS843246AGLFT
ICS843246AG ICS843246AG
NOTE: that ordered with "LF" suffix number Pb-Free configuration RoHS compliant.
aforementioned trademarks, HiPerClockS FEMTOCLOCKS trademarks Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial applications. other applications such those requiring extended temperature range, high reliability, other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 843246AM
REV. SEPTEMBER 2005
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