FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR FEATURES di

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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
FEATURES
differential 3.3V LVPECL output Crystal oscillator interface designed 23.4375MHz 26.5625MHz, 18pF parallel resonant crystal Selectable 106.25MHz, 187.5MHz 212.5MHz output frequency range: 560MHz 680MHz phase jitter 106.255MHz, using 26.5625MHz crystal (637kHz 10MHz): 0.60ps (typical) 3.3V operating supply -40°C 85°C ambient operating temperature Available both standard lead-free RoHS-compliant packages
GENERAL DESCRIPTION
ICS843001BI Fibre Channel Clock Generator member HiPerClocksHiPerClockSfamily high performance devices from ICS. ICS843001BI uses either 26.5625MHz 23.4375MHz crystal synthesize 106.25MHz, 187.5MHz 212.5MHz, using FREQ_SEL pin. ICS843001BI excellent <1ps phase jitter performance, over 637kHz 10MHz integration range. ICS843001BI packaged small 8-pin TSSOP VFQFN, making ideal systems with limited board space.
FUNCTION TABLE
Inputs Crystal Frequency 26.5625MHz 26.5625MHz 23.4375MHz FREQ_SEL Output Frequencies 106.25MHz (Default) 212.5MHz 187.5MHz
ASSIGNMENT
XTAL_OUT XTAL_IN
FREQ_SEL
BLOCK DIAGRAM
FREQ_SEL
(Pulldown)
ICS843001BI
XTAL_IN
XTAL_OUT
Phase Detector
637.5MHz 26.5625MHz Ref.
16-Lead VFQFN 0.95 package body Package View
VCCA XTAL_OUT XTAL_IN FREQ_SEL
(fixed)
ICS843001BI
8-Lead TSSOP 4.40mm 3.0mm 0.925mm package body Package View
Preliminary Information presented herein represents product prototyping pre-production. noted characteristics based initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves right change circuitry specifications without notice. 843001BKI REV. OCTOBER 2005
ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
Description Power supply pin. Analog supply pin.
TABLE DESCRIPTIONS
Name VCCA XTAL_OUT, XTAL_IN FREQ_SEL Power Power Power Input Input Output Unused Type
Negative supply pin. ystal oscillator interface. XTAL_IN input, XTAL_OUT output. Pulldown Frequency select pin. LVCMOS/LVTTL interface levels. Differential clock outputs. LVPECL interface levels. connect.
NOTE: Pulldown refers internal input resistors. Table Characteristics, typical values.
TABLE CHARACTERISTICS
Symbol RPULLDOWN Parameter Input Capacitance Input Pulldown Resistor Test Conditions Minimum Typical Maximum Units
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
4.6V -0.5V 0.5V 50mA 100mA 101.7°C/W mps) 51.5°C/W lfpm) -65°C 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings cause permanent damage device. These ratings stress specifications only. Functional operation product these conditions conditions beyond those listed Characteristics Characteristics implied. Exposure absolute maximum rating conditions extended periods affect product reliability.
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, Inputs, Outputs, Continuous Current Surge Current Package Thermal Impedance, Lead TSSOP Lead VFQFN Storage Temperature, TSTG
TABLE POWER SUPPLY CHARACTERISTICS, 3.3V±5%, -40°C 85°C
Symbol VCCA ICCA Parameter Power Supply Voltage Analog Supply Voltage Analog Supply Current Power Supply Current included Test Conditions Minimum 3.135 3.135 Typical Maximum 3.465 3.465 Units
TABLE LVCMOS/LVTTL CHARACTERISTICS, 3.3V±5%, -40°C 85°C
Symbol Parameter Input High Voltage Input Voltage Input High Current Input Current FREQ_SEL FREQ_SEL 3.465V 3.465V, Test Conditions Minimum -0.3 Typical Maximum Units
TABLE LVPECL CHARACTERISTICS, 3.3V±5%, -40°C 85°C
Symbol VSWING Parameter Output High Voltage; NOTE Output Voltage; NOTE Peak-to-Peak Output Voltage Swing Test Conditions Minimum Typical Maximum Units
NOTE Outputs terminated with
TABLE CRYSTAL CHARACTERISTICS
Parameter Mode Oscillation Frequency Equivalent Series Resistance (ESR) Shunt Capacitance Drive Level
843001BKI
Test Conditions
Minimum 23.4375
Typical Fundamental
Maximum 26.5625
Units
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
TABLE CHARACTERISTICS, 3.3V±5%, -40°C 85°C
Symbol fOUT Parameter Output Frequency Phase Jitter, (Random); NOTE Output Rise/Fall Time Output Duty Cycle Test Conditions FREQ_SEL FREQ_SEL 212.5MHz, (637kHz 10MHz) 187.5MHz, (1.875MHz 20MHz) 106.25MHz, (637kHz 10MHz) FSEL FSEL Minimum 186.67 93.33 0.60 0.60 Typical Maximum 226.66 113.33 Units
NOTE Please refer Phase Noise Plot.
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
PARAMETER MEASUREMENT INFORMATION
Phase Noise Plot
Noise Power
SCOPE
LVPECL
Phase Noise Mask
Offset Frequency
-1.3V 0.165V
Jitter Area Under Masked Phase Noise Plot
3.3V OUTPUT LOAD TEST CIRCUIT
PHASE JITTER
Pulse Width
PERIOD
Clock Outputs
PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR APPLICATION INFORMATION
POWER SUPPLY FILTERING TECHNIQUES
high speed analog circuitry, power supply pins vulnerable random noise. ICS843001BI provides separate power supplies isolate high switching noise from outputs internal PLL. VCCA should individually connected power supply plane through vias, bypass capacitors should used each pin. achieve optimum jitter performance, power supply isolation required. Figure illustrates resistor along with .01F bypass capacitor should connected each VCCA pin.
3.3V .01F
.01F
FIGURE POWER SUPPLY FILTERING
CRYSTAL INPUT INTERFACE
ICS843001BI been characterized with 18pF parallel resonant crystals. capacitor values, shown Figure below were determined using 26.5625MHz, 18pF parallel resonant crystal were chosen minimize error. optimum values slightly adjusted different board layouts.
XTAL_OUT 18pF Parallel Crystal XTAL_IN
Figure CRYSTAL INPUt INTERFACE
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
18pF parallel resonant crystal used. 27pF 33pF recommended frequency accuracy. values slightly adjusted optimizing frequency accuracy.
LAYOUT GUIDELINE
Figure shows schematic example ICS843001BI. example LVEPCL termination shown this schematic. Additional LVPECL termination approaches shown LVPECL Termination Application Note. this example,
VCCA 10uF 0.01u VCCA XTAL_OUT XTAL_IN FREQ_SEL
33pF
26.5625MHz 18pF
ICS843001
27pF
0.1u
82.5
82.5
FIGURE ICS843001BI SCHEMATIC EXAMPLE
BOARD LAYOUT EXAMPLE
Figure shows example ICS843001BI P.C. board layout. crystal footprint shown this example allows installation either surface mount HC49S through-hole HC49 package. footprints other components this example listed Table There should least decoupling capacitor power pin. decoupling capacitors should located close possible power pins. layout assumes that board clean analog power ground plane.
TABLE FOOTPRINT TABLE
Reference Size 0402 0805 0603
0603 NOTE: Table lists component sizes shown this layout example.
FIGURE ICS843001BI BOARD LAYOUT EXAMPLE
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR POWER CONSIDERATIONS
This section provides information power dissipation junction temperature ICS843001BI. Equations example calculations also provided. Power Dissipation. total power dissipation ICS843001BI core power plus power dissipated load(s). following power dissipation 3.3V 3.465V, which gives worst case results. NOTE: Please refer Section details calculating power dissipated load.
Power (core)MAX VCC_MAX IEE_MAX 3.465V 60mA 207.9mW Power (outputs)MAX 30mW/Loaded Output pair
Total Power_MAX (3.465V, with outputs switching) 207.9mW 30mW 237.9mW
Junction Temperature. Junction temperature, temperature junction bond wire bond directly affects reliability device. maximum recommended junction temperature HiPerClockSdevices 125°C. equation follows: Pd_total Junction Temperature Junction-to-Ambient Thermal Resistance Pd_total Total Device Power Dissipation (example calculation section above) Ambient Temperature order calculate junction temperature, appropriate junction-to-ambient thermal resistance must used. Assuming moderate flow meter second multi-layer board, appropriate value 90.5°C/W Table below. Therefore, ambient temperature 85°C with outputs switching 85°C 0.238W 90.5°C/W 106.5°C. This below limit 125°C. This calculation only example. will obviously vary depending number loaded outputs, supply voltage, flow, type board (single layer multi-layer).
TABLE THERMAL RESISTANCE
8-PIN TSSOP, FORCED CONVECTION
Velocity (Meters Second)
Multi-Layer PCB, JEDEC Standard Test Boards 101.7°C/W
90.5°C/W
89.8°C/W
TABLE
JAVS. FLOW TABLE LEAD VFQFN
Flow (Linear Feet Minute)
Multi-Layer PCB, JEDEC Standard Test Boards
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51.5°C/W
REV. OCTOBER 2005
Calculations Equations. purpose this section derive power dissipated into load. LVPECL output driver circuit termination shown Figure
ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
VOUT
FIGURE LVPECL DRIVER CIRCUIT
TERMINATION
calculate worst case power dissipation into load, following equations which assume load, termination voltage
logic high, VOUT
CCO_MAX
OH_MAX
CC_MAX
0.9V
OH_MAX
0.9V 1.7V
logic low, VOUT
CCO_MAX
OL_MAX
CC_MAX
OL_MAX
1.7V
Pd_H power dissipation when output drives high. Pd_L power dissipation when output drives low. Pd_H
OH_MAX
CC_MAX
2V))/R
CC_MAX
OH_MAX
[(2V
CC_MAX
OH_MAX
))/R
CC_MAX
OH_MAX
[(2V 0.9V)/50] 0.9V 19.8mW
Pd_L
OL_MAX
CC_MAX
2V))/R
CC_MAX
OL_MAX
[(2V
CC_MAX
OL_MAX
))/R
CC_MAX
OL_MAX
[(2V 1.7V)/50] 1.7V 10.2mW Total Power Dissipation output pair Pd_H Pd_L 30mW
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR RELIABILITY INFORMATION
TABLE JAVS. FLOW TABLE
LEAD TSSOP
Velocity (Meters Second)
Multi-Layer PCB, JEDEC Standard Test Boards 101.7°C/W
90.5°C/W
89.8°C/W
TABLE
JAVS. FLOW TABLE LEAD VFQFN
Flow (Linear Feet Minute)
Multi-Layer PCB, JEDEC Standard Test Boards
51.5°C/W
TRANSISTOR COUNT
transistor count ICS843001BI 2069
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
PACKAGE OUTLINE SUFFIX LEAD TSSOP
TABLE PACKAGE DIMENSIONS
SYMBOL 0.45 -4.30 0.65 BASIC 0.75 0.10 -0.05 0.80 0.19 0.09 2.90 6.40 BASIC 4.50 Millimeters Minimum 1.20 0.15 1.05 0.30 0.20 3.10 Maximum
Reference Document: JEDEC Publication MO-153
843001BKI
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ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
LEAD VFQFN
PACKAGE OUTLINE SUFFIX
TABLE PACKAGE DIMENSIONS
JEDEC VARIATION DIMENSIONS MILLIMETERS SYMBOL 0.25 0.30 0.25 1.25 0.50 0.18 0.50 BASIC 1.25 0.80 0.25 Reference 0.30 MINIMUM 0.05 MAXIMUM
Reference Document: JEDEC Publication MO-220
843001BKI
REV. OCTOBER 2005
ICS843001BI
FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR
Marking Package Lead TSSOP Lead TSSOP Lead "Lead-Free" TSSOP Lead "Lead-Free" TSSOP Lead VFQFN Lead VFQFN Lead "Lead-Free" VFQFN Lead "Lead-Free" VFQFN Shipping Packaging tube 2500 tape reel tube 2500 tape reel tube 2500 tape reel tube 2500 tape reel Temperature -40°C 85°C -40°C 85°C -40°C 85°C -40°C 85°C -40°C 85°C -40°C 85°C -40°C 85°C -40°C 85°C
TABLE ORDERING INFORMATION
Part/Order Number ICS843001BGI ICS843001BGIT ICS843001BGILF ICS843001BGILFT ICS843001BKI ICS843001BKIT ICS843001BKILF ICS843001BKILFT
NOTE: that ordered with "LF" suffix number Pb-Free configuration RoHS compliant.
aforementioned trademarks, HiPerClockS FemtoClocks trademarks Integrated Circuit Systems, Inc. subsidiaries United States and/or other countries. While information presented herein been checked both accuracy reliability, Integrated Circuit Systems, Incorporated (ICS) assumes responsibility either infringement patents other rights third parties, which would result from use. other circuits, patents, licenses implied. This product intended normal commercial industrial applications. other applications such those requiring high reliability other extraordinary environmental requirements recommended without additional processing ICS. reserves right change circuitry specifications without notice. does authorize warrant product life support devices critical medical instruments. 843001BKI
REV. OCTOBER 2005

FEMTOCLOCKSCRYSTAL-TO3.3V LVPECL CLOCK GENERATOR FEATURES di

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