APPLICATION NOTE PMC-980901 ISSUE SPECTRA-155 PROGRAMMER'S REFERENCE

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PM5342 SPECTRA-155
APPLICATION NOTE PMC-980901 ISSUE SPECTRA-155 PROGRAMMER'S REFERENCE
PM5342
SPECTRA-155
SPECTRA-155 PROGRAMMER'S REFERENCE
APPLICATION NOTE
ISSUE MARCH 1999
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REVISION HISTORY Issue Issue Date 1999 Details Change Document created.
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CONTENTS REFERENCES BACKGROUND ALARM, OVERHEAD, PAYLOAD INSERTION. ALARM INSERTION OVERHEAD INSERTION. TELECOM PAYLOAD PROCESSING.
INTERRUPTS INTERRUPT OVERVIEW. 4.1.1 INTERRUPTS INTERRUPT ENABLES 4.1.2 TOP-LEVEL INTERRUPTS 4.1.3 AUXILIARY INTERRUPTS INTERRUPT CROSS-REFERENCE.
SONET CONFIGURATION.
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LIST FIGURES FIGURE INTERRUPT GENERATION LOGIC. FIGURE INTERRUPT CROSS-REFERENCE LEGEND
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LIST TABLES TABLE TABLE TABLE TABLE TABLE TABLE TABLE TABLE TABLE TRANSMIT ALARM INSERTION. DROP ALARM INSERTION ALARM DESCRIPTIONS TRANSMIT OVERHEAD INSERTION. CONSEQUENT RDI-P INSERTION DROP OVERHEAD INSERTION. TRANSMIT PAYLOAD PROCESSING DROP PAYLOAD PROCESSING INTERRUPT CROSS-REFERENCE
TABLE SONET CONFIGURATION VALUES.
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REFERENCES Bell Communications Research, Generic Requirements GR-253-CORE SONET Transport Systems: Common Generic Criteria, Issue December 1995. ITU, Recommendation G.707 Network Node Interface Synchronous Digital Hierarchy, 03/1996. ITU, Recommendation G.783 Characteristics Synchronous Digital Hierarchy (SDH) Equipment Functional Blocks, 04/1997. PMC-Sierra PMC-970133 PM5342 SPECTRA-155 SONET/SDH Payload Extractor Aligner Data Sheet, Issue August 1998.
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BACKGROUND PMC-Sierra's PM5342 SONET/SDH Payload Extractor/Aligner (SPECTRA-155) terminates transport path overhead STS-1 (STM-0/AU-3) STS-3/3c (STM-1/AU-3/AU-4) streams. This document provides convenient programmers reference SPECTRA155. Although most information this document also found SPECTRA datasheet, information distributed between pin, functional, register descriptions. This document presents same information reference form that spans functional blocks quickly answer many software hardware questions. Although every effort been taken ensure that this document consistent with datasheet, some errors occur. Where there discrepancies with this document, datasheet datasheet errata any) will take precedence. this document, term, "SPECTRA," used interchangeably with full product name, "SPECTRA-155."
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ALARM, OVERHEAD, PAYLOAD INSERTION SPECTRA-155 capable modifying outgoing transmitted dropped datastreams many different ways. Alarms, overhead, payload affected register configuration, states, detected conditions such AIS. following sections summarize many ways that transmitted dropped datastreams affected SPECTRA. SPECTRA also capable monitoring reporting status incoming received added datastreams. monitoring reporting functions described following sections. Descriptions alarm, overhead, payload insertion adhere several conventions: word "Default" table indicates that corresponds power-up register configuration SPECTRA. Register names prefixed with "r", names prefixed with "p". example, "rFTPTR" refers FTPTR register 131, 1B1h. space limitations, register addresses cannot listed table must determined from datasheet. intended that this application note will used conjunction with soft copy SPECTRA documentation (available from http://www.pmc-sierra.com) performing text searches register names. Note that SPECTRA datasheet contains multiple instances many names. most cases, duplication replicated functional blocks. example, there instances H4BYP bit: three RTAL blocks (register 128h,.) three TTAL blocks (register 140h,.). appropriate instance must determined from context. replaces numbers replicated register bits. example, "rTPAIS_EN#n" could refer TPAIS_EN#1, TPAIS_EN#2, TPAIS_EN#3, depending STS-1 (AU-3) interest. Logical operations indicated characters "!", "&", "+", which represent logical NOT, AND, respectively. Braces indicate detected condition. example, LOP-P} indicates detection loss-of-pointer receive datastream, while {RCP SENDLAIS} indicates that SENDLAIS ring control port active.
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Abbreviations describe source detected condition: (add bus), (ring control port), (receive line interface). Alarm Insertion following tables describe SPECTRA-155 configured insert alarms transmit drop datastreams (Table Table respectively). Each alarm caused several different conditions. Within SPECTRA, possible causes OR'ed together-satisfying condition sufficient raise alarm. Table lists alarms describes their effect datastream. general, alarms have precedence over overhead insertion from other source. Table
Alarm AIS-L
Transmit Alarm Insertion
Condition rDLOS rLAIS !rRCP pTLAIS {RCP SENDLAIS} rRCP rRINGEN Comments
AIS-P
pDTPAIS rTPAIS_EN#n {ADD AIS-P} rPAISPAIS {ADD LOP-P} rLOPPAIS {ADD AISC-P} rPAISCONPAIS {ADD LOPC-P} rLOPCONPAIS rPAIS {TTAL elastic store error} rESAIS {ADD ISF} rTTCTE Asserted Frames Affected rFISF
AIS-V
{ADD LOM} rLOMTUAIS rITUAIS
AIS-V (DS-3)
pSMODE[2:0]=110 (pDS3TAISn rDS3AISGEN)
Table
Alarm AIS-P (via RLOP)
Drop Alarm Insertion
Condition !rRCP pRLAIS AIS-L} rALLONES Comments
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Alarm AIS-P (cont'd)
Condition TIU-S} rALLONES rRTIUINS rAUTOSTIU1 TIU-S} rALLONES rRTIUINS rAUTOSTIU2 TIM-S} rALLONES rRTIMINS LOS} rALLONES rLOSINS LOF} rALLONES rLOFINS rALLONES rSFINS rALLONES rSDINS
Comments Mode TIU-S Mode TIU-S
AIS-P
pDTPAISn !rTPAIS_EN AIS-P} LOP-P} rLOPPAIS AISC-P} rPAISCONPAIS LOPC-P} rLOPCONPAIS TIM-P} rTIMPAIS TIU-P} rTIUPAIS rAUTOPTIU1#n TIU-P} rTIUPAIS rAUTOPTIU2#n SLM-P} rPSLMPAIS SLU-P} rPSLUAIS rIPAIS {RTAL elastic store error} rESAIS {RX_ISF} rTTCTE Asserted Frames Affected rFISF Default Mode TIU-P Mode TIU-P Default Default Default
AIS-TC AIS-V
rOTCTE rISF LOM} rLOMTUAIS rITUAIS Default
AIS-V (DS3)
pDS3RAIS rDS3AISGEN TIM-P} rTIMDS3AIS TIU-P} rTIUDS3AIS rAUTOPTIU1#n TIU-P} rTIUDS3AIS rAUTOPTIU2#n LOP-P} rLOPDS3AIS SLM-P} rPSLMDS3AIS SLU-P} rPSLUDS3AIS ({RX LOS} LOF} AIS-L}) rALMDS3AIS Mode TIU-P Mode TIU-P
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Table Alarm AIS-L AIS-P AIS-TC
Alarm Descriptions Description Line (MS-AIS). ones line overhead, pointer, path overhead, payload. Path (HP-AIS). ones pointer, path overhead, payload. Tandem connection AIS. ones payload. field byte indicates (1111b). Tandem connection data link remains active. Error-free path inserted byte. Tributary AIS. ones payload (but path overhead). Effectively, this appears tributaries. Tributary AIS. ones payload affected DS-3. This type only applicable when SPECTRA operating DS-3 mode. Loss-of-signal. Transmit zeros.
AIS-V AIS-V (DS-3)
Overhead Insertion SPECTRA capable modifying overhead transmitted dropped datastreams many different ways. following tables describe transport path overhead bytes inserted into transmitted data stream (Table dropped data stream (Table each overhead byte location, tables describe inserted value condition conditions under which that value will inserted. Appendix brief overview overhead byte functions. some overhead bytes, bits allocated specific functions. example, bits path overhead byte allocated REI-P function. Overhead insertion functions that apply only allocated bits indicated separately tables. table does identify allocated bits, then overhead insertion function applies entire overhead byte. Values inserted into overhead bytes take many forms: constants (e.g. "F6h" "110b"); register contents (e.g. "reg 1Ah"); ones zeros, according value single register (e.g. "rUNUSED_V"); default value that been XORed with error mask (e.g. "mask FFh"); streamed from serial overhead interface (e.g. "pTTOH"). Some special bytes have other
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values inserted into them; refer descriptions SPECTRA datasheet more information. Overhead insertion conditions generally listed order increasing priority. bottom-most insertion condition usually will take priority over conditions above example, transmit direction, TTOHEN active then D1-D3 overhead bytes will inserted from TTOH pin, independent state other register bits pins. Some exceptions this rule occur more complicated overhead bytes, such these cases, insertion conditions expanded describe full logical hierarchy insertion values. Some overhead insertion conditions left blank, indicating that value will inserted other insertion conditions false. example, transmit direction, will calculated based previous frame's data register DBIP8 TTOHEN both false. Table
Overhead Byte Bit(s) F6h, 76h, pTTOH section trace buffer pTTOH 02h, pTTOH calculate mask mask pTTOH pTSOW pTOH pTTOH pTSUC pTOH pTTOH D1-D3 rTDLVAL rTOHSEL[2:0]=001 pTTOHEN rTDLSEL rTOHSEL[2:0]=000 pTTOHEN Default rDBIP8 pTTOHEN !rDFP rDFP pTTOHEN !rSTEN rSTEN pTTOHEN !rSTEN !rZ0INS rZ0INS pTTOHEN Default Error Mask Error Mask Default Default Default Default
Transmit Overhead Insertion
Value Condition Comments
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Overhead Byte D1-D3 (cont'd) pointer Bit(s)
Value
Condition
Comments
pTSLD pTTOH calculate justification
!rTDLSEL pTTOHEN
Default
Default rDOPJ1 !rDOPJ0 Force justification every frame.
justification
!rDOPJ1 rDOPJ0
Force justification every frame.
136h, 135h,.
rFTPTR
Pointer substitution without NDF.
136h,.
{TTAL discontinuous pointer change} rNDF
136h,. mask pTTOH pTTOHEN rTMODE[1:0]=11 pTTOHEN
Default Error Mask
Concat
13Fh, 13Eh mask pTTOH insert pTTOH
Error Mask Default
pTTOHEN Default rDB2 pTTOHEN !rTAPSTAP rRCP !rTAPSTAP rAPSREG !rTAPSTAP !rAPSREG rTOHSEL[2:0]=100 Default Error Mask Error Mask filtered
calculate mask mask pTTOH
ring control port 06h, pTOH
pTTOH pTAD RDI-L 110b 110b 110b 110b
!rTAPSTAP pTTOHEN rTAPSTAP rLRDI pTLRDI !rRCP AIS-L} !rRCP rLAISINS TIU-S} !rRCP rRTIUINS rAUTOSTIU1 Default Mode TIU-S
110b
TIU-S} !rRCP rRTIUINS rAUTOSTIU2
Mode TIU-S
110b
TIM-S} !rRCP rRTIMINS
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Overhead Byte (cont'd) Bit(s) RDI-L (cont'd)
Value
Condition
Comments
110b 110b 110b 110b 110b
LOS} !rRCP rLOSINS LOF} !rRCP rLOFINS {RX_SF} !rRCP rSFINS !rRCP rSDINS RCP_SENDLRDI rRCP rRINGEN !rTDLSEL rTDLSEL pTTOHEN
Default Default
D4-D12
pTLD pTSLD pTTOH
Default
pTTOH pTTOHEN !rUNUSED_EN rUNUSED_EN pTTOHEN !rUNUSED_EN rUNUSED_EN pTTOHEN !rAUTOLREI !rRINGEN rRCP rRINGEN rAUTOLREI !rRINGEN !rBLOCKBIPO rAUTOLREI !rRINGEN rBLOCKBIPO pTTOHEN
Default
rUNUSED_V pTTOH
Default
rUNUSED_V pTTOH
Default
M0,M1
REI-L
LREI count pTTOH
Default
pTLOW pTOH pTTOH rTOHSEL[2:0]=010 pTTOHEN !rUNUSED_EN rUNUSED_EN pTTOHEN !rNAT_EN rNAT_EN pTTOHEN !rTDIS !rTPTBnEN !rTDIS rTPTBnEN
Default
Unused (not
rUNUSED_V pTTOH
Default
National (except
rNAT_V pTTOH
Default
137h,. SPTB
Default
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Overhead Byte (cont'd) Bit(s)
Value
Condition
Comments
passthrough rADDUEV pTPOH
rTDISn !rADDUEn rTDISn rADDUEn !rTPTBEN pTPOHEN !rTDISn Default. Affected rEXCFS.
calculated
calculated w.r.t. mask passthrough rADDUEV pTPOH
!rTDISn rTTCTE !rTDISn rDB3 rTDISn !rADDUEn rTDISn rADDUEn rTDIS pTPOHEN
Affected rEXCFS. Error Mask
Corrupts unpredictably.
mask pTPOH 138h,. passthrough rADDUEV pTPOH passthrough rADDUEV pTPOH REI-P 0000b rPREI[3:0]
!rTDIS pTPOHEN !rTDISn rTDISn !rADDUEn rTDISn rADDUEn pTPOHEN rTDISn !rADDUEn rTDISn rADDUEn pTPOHEN
Error Mask Default
Default !rTDISn !pTPOHEN Inserts count next available
count
!rTDISn rRXSEL[1:0]=00 rAUTOPREI !rBLKBIPO
!rTDISn rRXSEL[1:0]=00 rAUTOPREI rBLKBIPO
pTAD passthrough 0000b RDI-P RPOP
!rTDISn rRXSEL[1:0]=01 !rTDISn rRXSEL[1:0]=10 !rTDISn rRXSEL[1:0]=11 rEPRDIEN rEPRDISRC rRXSEL[1:0]=00
pTAD
rEPRDIEN rEPRDISRC rRXSEL[1:0]=01
passthrough
rEPRDIEN rRXSEL[1:0]=10
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Overhead Byte (cont'd) Bit(s) RDI-P (cont'd)
Value
Condition
Comments
000b
rEPRDIEN rEPRDISRC rRXSEL[1:0]=11
pTPOH RDI-P (bit rPRDI
pTPOHEN !rEPRDIEN (!pTPOHEN !rEPRDIEN rRXSEL[1:0]=11) (rEPRDIEN !rEPRDISRC !(rRXSEL[1:0]=10))
rPRDI RPOP
!pTPOHEN !rEPRDIEN rRXSEL[1:0]=00
Default
rPRDI pTAD
!pTPOHEN !rEPRDIEN rRXSEL[1:0]=01
rPRDI passthrough RDI-P (bit RDI-P (bit rG1[0] 13Ah,. passthrough rADDUEV pTPOH TTAL mask passthrough rADDUEV mask pTPOH F3/Z3 13Bh,. passthrough rADDUEV pTPOH K3/Z4 13Ch,. passthrough rADDUEV pTPOH rEPRDI7 rEPRDI6
!pTPOHEN !rEPRDIEN rRXSEL[1:0]=10 (!pTPOHEN !rEPRDIEN) (rEPRDIEN !rEPRDISRC !(rRXSEL[1:0]=10)) (!pTPOHEN !rEPRDIEN) (rEPRDIEN !rEPRDISRC !(rRXSEL[1:0]=10)) !pTPOHEN !rTDISn rTDISn !rADDUEn rTDISn rADDUEn pTPOHEN !rTDISn !rH4BYP !rTDISn rDH4 rTDISn rH4BYP !rADDUEn rTDISn rH4BYP rADDUEn pTPOHEN !rTDISn rTDISn !rADDUEn rTDISn rADDUEn pTPOHEN !rTDISn rTDISn !rADDUEn rTDISn rADDUEn pTPOHEN Default Error Mask Default Default Error Mask Default Default
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Overhead Byte N1/Z5 Bit(s)
Value
Condition
Comments
13Dh,. passthrough rADDUEV TCDL 0000b 0000b pTPOH
!rTDISn rTDISn !rADDUEn rTDISn rADDUEn rTTCTE rTTCTE pTPOHEN
Default
RPOP will source RDI-P values according consequent actions that configured according Table Table
RDI-P Value bits 5-7) 1xxb 1xxb 1xxb 1xxb 1xxb 1xxb 1xxb 1xxb 1xxb 1xxb x10b x10b x10b x01b x01b x10b x01b x01b x10b x01b TIM-P} rTIMPRDI TIU-P} rAUTOPTIU1#n rTIUPRDI TIU-P} rAUTOPTIU2#n rTIUPRDI LOP-P} rLOPPRDI LOPC-P} rLOPCONPRDI SLM-P} rPSLMPRDI AIS-P} rPAISPRDI AISC-P} rPAISCONPRDI UNEQ-P} rUNEQPRDI ({RX LOS} LOF} AIS-L}) rALMPRDI TIM-P} rTIMEPRDI rEPRDI_EN TIU-P} rAUTOPTIU1#n rTIUEPRDI rEPRDI_EN TIU-P} rAUTOPTIU2#n rTIUEPRDI rEPRDI_EN LOP-P} rNOLOPEPRDI rEPRDI_EN LOPC-P} rNOLOPCONEPRDI rEPRDI_EN SLM-P} rPSLMEPRDI rEPRDI_EN AIS-P} rNOPAISEPRDI rEPRDI_EN AISC-P} rNOPAISCONEPRDI rEPRDI_EN UNEQ-P} rUNEQEPRDI rEPRDI_EN ({RX LOS} LOF} AIS-L}) rNOALMEPRDI Mode TIU-P Mode TIU-P Default Mode TIU-P Mode TIU-P Default Default Default Default Default Default
Consequent RDI-P Insertion
Condition Comment
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RDI-P Value bits 5-7)
Condition
Comment
rEPRDI_EN
Notes: When error conditions present, RPOP will generate nonenhanced RDI-P code 0xxb enhanced RDI-P code x01b. assertion time above RDI-P consequent actions affected PERSIST register (reg 130, 170, 1B0h). Hierarchy enhanced RDI-P shown. When multiple enhanced RDI-P conditions occur simultaneously, "x01" indication priority over "x10".
Table
Overhead Byte D1-D3
Drop Overhead Insertion
Value Bit(s) pointer calculate justification rDOPJ1 !rDOPJ0 Default Default Default Default Default Default Default Default Force justification every frame. justification !rDOPJ1 rDOPJ0 Force justification every frame. hold last value 1001b rOTCTE ({RX LOP} AIS}) rDLOP !rSSS rSSS Default Default Default Condition Comments
insert
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Overhead Byte D4-D12 Unused National Bit(s)
Value
Condition
Comments
Default Default Default Default Default Default Default Default Default Default
Default
passthrough passthrough calculated !rTTCTE rTTCTE
Default Default Reflects changes made
passthrough passthrough passthrough passthrough rH4BYP pSMODE[2:0]=[000, 001, 010] rH4BYP pSMODE[2:0]=[011, 100, 101, 110] invert !rH4BYP rDH4 rH4AISB AIS-P}
Default Default Default
Default Force inverted
F3/Z3 K3/Z4 N1/Z5
passthrough passthrough passthrough 0000b count 1111b !rOTCTE !rTTCTE !rOTCTE rTTCTE rOTCTE !rTTCTE rOTCTE !rTTCTE (rISF LOP-P} AIS-P}) ???? rOTCTE rTTCTE
Default Default Default
Illegal
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Overhead Byte Bit(s) TCDL
Value
Condition
Comments
passthrough 0000b 1111b passthrough
!rOTCTE !rTTCTE !rOTCTE rTTCTE rOTCTE !rTTCTE !rTCDLT rOTCTE !rTTCTE rTCDLT rOTCTE rTTCTE pRTCENn
Default
N1/Z5 (cont'd)
TCDL (cont'd)
???? pRTCOHn
Illegal
Telecom Payload Processing telecom mode, SPECTRA-155 limited capability affect payload data. Transmit drop payload processing described Table Table respectively. Table
Payload Location Fixed Stuff
Transmit Payload Processing
Value passthrough Condition rCLRFS !rCLRFS (pSMODE[2:0]=[011, 100] !rTDM_FSEN) (pSMODE[2:0]=101 rGAPFS) data DS-3 data pSMODE[2:0]=[011, 100] rTDM_FSEN pSMODE[2:0]=101 !rGAPFS !rADDUEn rADDUEn Default Comment
STS-1/AU-3 Payload
passthrough rADDUEV
Table
Payload Location Fixed Stuff
Drop Payload Processing
Value passthrough Condition rCLRFS !rCLRFS (pSMODE[2:0]=[011, 100, 101] !rRDMFSEN) (pSMODE[2:0]=110 rGAPFS)) data pSMODE[2:0]=[011, 100, 101] rRDMFSEN Default Comment
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Payload Location Fixed Stuff (cont'd)
Value DS-3 data
Condition pSMODE[2:0]=110 !rGAPFS
Comment
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INTERRUPTS SPECTRA-155 single interrupt (INTB) which reflect status over independent interrupt sources. This section describes interrupt hierarchy then provides quick cross-reference SPECTRA interrupt sources.
Interrupt Overview Figure shows portion interrupt generation logic. This diagram shows contribution loss-of-signal (LOS) alarm interrupt generation. Figure Interrupt Generation Logic
root each interrupt interrupt source. Often, status interrupt source will reflected with value bit, bit. example, LOSV (reg 011h) reflects current status loss-of-signal detector. When detected, LOSV will otherwise, LOSV will bits "real time" latched. Many interrupt sources have bits reported other ways. 4.1.1 Interrupts Interrupt Enables Every interrupt source associated interrupt status bit, bit. latched when interrupt event occurs, will cleared only after processor intervention. Depending bit, interrupt will cleared either after read from register, after write interrupt bit. Figure LOSI (reg 011h) interrupt status associated with detector. When detector changes state (i.e. when LOSV changes value), LOSI will set. LOSI will cleared only after reads from register 011h.
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filter irrelevant interrupts, every associated interrupt enable bit, bit. When set, associated will contribute INTB level interrupt status (more about top-level interrupts later). When cleared, associated will have effect INTB top-level interrupts. Note that does affect behaviour itself. example, LOSE (reg 010h) interrupt enable LOSI. LOSE cleared, LOSI will continue indicate changes LOSV will never contribute INTB interrupt. 4.1.2 Top-Level Interrupts Most interrupts grouped under several top-level interrupt status bits. These level bits represent logical "or" enabled interrupts that group, allow software monitor multiple interrupts with single read. example, LOSI interrupt grouped under RSOPI top-level interrupt (reg 002h) along with other RSOP interrupts. RSOPI will assert whenever LOSI LOSE both OOFI OOFE, level interrupts cannot cleared directly; instead, they will clear when underlying interrupts cleared. Some top-level interrupts status bits have associated enable bit. These bits identical bits other interrupts. That top-level interrupt will only contribute INTB enable set. with other bits, interrupt enable bits level interrupts don't change value itself. Toplevel interrupts without bits always contribute INTB. 4.1.3 Auxiliary Interrupts final type interrupt auxiliary interrupt. Auxiliary interrupts provide second many commonly used interrupts. second useful when SPECTRA-155 used with software architectures that combine polling interrupt service routines. With "clear-on-read" interrupt bits, software inadvertently clear more interrupts reading from register containing bits. auxiliary interrupts provide second "clear-on-write" interrupt that easier deal with software. shown Figure auxiliary interrupts have separate enable from main interrupt. Auxiliary interrupts also cleared independently main interrupt. example, clearing LOFI interrupt (reg 011h) effect auxiliary LOFI interrupt (reg 0E6h). auxiliary interrupts contribute directly INTB, without going through top-level interrupt.
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Interrupt Cross-Reference Table shows entire SPECTRA-155 interrupt hierarchy, including interrupt status bits, auxiliary interrupts, interrupt enables. format Table described Figure Figure Interrupt Cross-Reference Legend
inte rrup status register type =clea r-on-read =cle ar-o rite)
iera
iliary
alue
associa uxiliary interrupt
inte rrup gister terru nable
Table
Interrupt Cross-Reference
Interrupt Hierarchy State Auxiliary
INTB
CRSII (002) CRSIE (001)
DOOLI (040, DOOLE (040) ROOLI (040, ROOLE (040)
DOOLV (040)
RDOOLI (0E6, RDOOLIEN (0F7)
ROOLV (040)
CSPII (002) CSPIE (001) RASEI (002) RASEE (001)
ROOLI (042, ROOLE (042) COAPSI (021, COAPSE (020) PSBFI (021, PSBFE (020) SDBERI (021, SDBERE (020) SFBERI (021, SFBERE (020)
ROOLV (042)
TROOLI (0E6, TROOLIEN (0F7)
PSBFV (021)
SDBERV (021)
SFBERV (021)
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Interrupt Hierarchy
State
Auxiliary
RASEI (cont'd)
Z1/S1I (021, Z1/S1E (020)
RLOPI (002) RLOPE (001)
BIPEI (009, BIPEE (009) LAISI (009, LAISE (009) LRDII (009, LRDIE (009) LREII (009, LREIE (009) LRDIV (008) LAISV (008) LAISI (0E6, LAISIEN (0F7) LRDII (0E6, LRDIIEN (0F7)
RSOPI (002) RSOPE (001)
BIPEI (011, BIPEE (010) LOFI (011, LOFE (010) LOSI (011, LOSE (010) OOFI (011, OOFE (010) OOFV (011) LOSV (011) LOFV (011) LOFI (0E6, LOFIEN (0F7) LOSI (0E6, LOSIEN (0F7) OOFI (0E6, OOFIEN (0F7) RTIMV (039)
SSTBI (002) SSTBE (001)
RTIMI (039, RTIMIE (038) RTIUI (039, RTIUIE (038) SCPIFI[0] (01F, SCPIFE[0] (015) SCPIFI[1] (01F, SCPIFE[1] (015) SCPIRI[0] (01F, SCPIRE[0] (015) SCPIRI[1] (01F, SCPIRE[1] (015) ABUS_SYNCI (07B, ABUS_SYNCE (07A) DBUS_SYNCI (07B, DBUS_SYNCE (079) PTIU2I#1 (0EB, PTIU2IE#1 (0EB) PTIU2I#2 (0EB, PTIU2IE#2 (0EB)
RTIUV (039)
SCPIV[0] (01F)
SCPIV[1] (01F)
SCPIV[0] (01F)
SCPIV[1] (01F)
ABUS_SYNCV (07A)
DBUS_SYNCV (079)
PTIU2V#1 (0EC)
TIU2I#1 (0EA, TIU2I#1EN (0FB)
PTIU2V#2 (0EC)
TIU2I#2 (0EA, TIU2I#2EN (0FB)
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Interrupt Hierarchy
State
Auxiliary
PTIU2I#3 (0EB, PTIU2IE#3 (0EB) STIU2I (0EB, STIU2IE (0EB) D3MA[3:1]I (103) OFLI (095, OFLIEN (096) UFLI (095, UFLIEN (096) OFLI (09D, OFLIEN (09B) UFLI (09D, UFLIEN (09B) OFLI (0A5, OFLIEN (0A6) UFLI (0A5, UFLIEN (0A6) D3MD[3:1]I (103) OFLI (091, OFLIEN (092) UFLI (091, UFLIEN (092) OFLI (099, OFLIEN (09A) UFLI (099, UFLIEN (09A) OFLI (0A1, OFLIEN (0A2) UFLI (0A1, UFLIEN (0A2) TPIP1I (103) NEWPTRI (0B0, NEWPTRE (0B0) BIPEI (0B1, BIPEE (0B3) LOPCONI (0B1, LOPCONE (0B3) LOPI (0B1, LOPE (0B3) PAISCONI (0B1, PAISCONE (0B3) PAISI (0B1, PAISE (0B3)
PTIU2V#3 (0EC)
TIU2I#3 (0EA, TIU2I#3EN (0FB)
STIU2V (0EC)
LOPCONV (0B0)
LOPV (0B0)
PAISCONV (0B0)
PAISV (0B0)
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Interrupt Hierarchy
State
Auxiliary
TPIP1I (cont'd)
PREII (0B1, PREIE (0B3) CONCATI (0B2, CONCATE (0B4) DISCOPAI (0B2, DISCOPAE (0B4) ILLJREQI (0B2, ILLJREQE (0B4) INVNDFI (0B2, INVNDFE (0B4) NDFI (0B2, NDFE (0B4) NSEI (0B2, NSEE (0B4) PSEI (0B2, PSEE (0B4) COMAI (0BC, COMAE (0BC) LOMI (0BC, LOME (0BC) LOMV (0BC)
TPIP2I (103)
NEWPTRI (0C0, NEWPTRE (0C0) BIPEI (0C1, BIPEE (0C3) LOPCONI (0C1, LOPCONE (0C3) LOPI (0C1, LOPE (0C3) PAISCONI (0C1, PAISCONE (0C3) PAISI (0C1, PAISE (0C3) PREII (0C1, PREIE (0C3) CONCATI (0C2, CONCATE (0C4) DISCOPAI (0C2, DISCOPAE (0C4) ILLJREQI (0C2, ILLJREQE (0C4) PAISV (0C0) PAISCONV (0C0) LOPV (0C0) LOPCONV (0C0)
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Interrupt Hierarchy
State
Auxiliary
TPIP2I (cont'd)
INVNDFI (0C2, INVNDFE (0C4) NDFI (0C2, NDFE (0C4) NSEI (0C2, NSEE (0C4) PSEI (0C2, PSEE (0C4) COMAI (0CC, COMAE (0CC) LOMI (0CC, LOME (0CC) LOMV (0CC)
TPIP3I (103)
NEWPTRI (0D0, NEWPTRE (0D0) BIPEI (0D1, BIPEE (0D3) LOPCONI (0D1, LOPCONE (0D3) LOPI (0D1, LOPE (0D3) PAISCONI (0D1, PAISCONE (0D3) PAISI (0D1, PAISE (0D3) PREII (0D1, PREIE (0D3) CONCATI (0D2, CONCATE (0D4) DISCOPAI (0D2, DISCOPAE (0D4) ILLJREQI (0D2, ILLJREQE (0D4) INVNDFI (0D2, INVNDFE (0D4) NDFI (0D2, NDFE (0D4) NSEI (0D2, NSEE (0D4) PSEI (0D2, PSEE (0D4) PAISV (0D0) PAISCONV (0D0) LOPV (0D0) LOPCONV (0D0)
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Interrupt Hierarchy
State
Auxiliary
TPIP3I (cont'd)
COMAI (0DC, COMAE (0DC) LOMI (0DC, LOME (0DC) LOMV (0DC)
RPOP1I (104)
NEWPTRI (110, NEWPTRE (110) BIPEI (111, BIPEE (113) ERDII (111, ERDIE (113) LOPCONI (111, LOPCONE (113) LOPI (111, LOPE (113) PAISCONI (111, PAISCONE (113) PAISI (111, PAISE (113) PRDII (111, PRDIE (113) PREII (111, PREIE (113) CONCATI (112, CONCATE (114) DISCOPAI (112, DISCOPAE (114) ILLJREQI (112, ILLJREQE (114) INVNDFI (112, INVNDFE (114) NDFI (112, NDFE (114) NSEI (112, NSEE (114) PSEI (112, PSEE (114) COMAI (11C, COMAE (11C) LOMI (11C, LOME (11C) LOMV (11C) LOMI (0E7, LOMIEN (0F8) PRDIV (110) PAISV (110) PAISCONV (110) LOPV (110) LOPCONV (110) ERDIV[2:0] (110) EPRDII#1 (0EA, EPRDII#1EN (0FB) LOPCONI (0EA, LOPCONIEN (0FB) LOPI (0E7, LOPIEN (0F8) PAISCONI (0EA, PAISCONIEN (0FB) PAISI (0E7, PAISEN (0F8) PRDII (0E7, PRDIEN (0F8)
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Interrupt Hierarchy
State
Auxiliary
RPOP2I (104)
NEWPTRI (150, NEWPTRE (150) BIPEI (151, BIPEE (153) ERDII (151, ERDIE (153) LOPCONI (151, LOPCONE (153) LOPI (151, LOPE (153) PAISCONI (151, PAISCONE (153) PAISI (151, PAISE (153) PRDII (151, PRDIE (153) PREII (151, PREIE (153) CONCATI (152, CONCATE (154) DISCOPAI (152, DISCOPAE (154) ILLJREQI (152, ILLJREQE (154) INVNDFI (152, INVNDFE (154) NDFI (152, NDFE (154) NSEI (152, NSEE (154) PSEI (152, PSEE (154) COMAI (15C, COMAE (15C) LOMI (15C, LOME (15C) LOMV (15C) LOMI (0E8, LOMIEN (0F9) PRDIV (150) PAISV (150) PAISI (0E8, PAISEN (0F9) PRDII (0E8, PRDIEN (0F9) PAISCONV (150) LOPV (150) LOPI (0E8, LOPIEN (0F9) LOPCONV (150) ERDIV[2:0] (150) EPRDII#2 (0EA, EPRDII#2EN (0FB)
RPOP3I (104)
NEWPTRI (190, NEWPTRE (190) BIPEI (191, BIPEE (193)
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Interrupt Hierarchy
State
Auxiliary
RPOP3I (cont'd)
ERDII (191, ERDIE (193) LOPCONI (191, LOPCONE (193) LOPI (191, LOPE (193) PAISCONI (191, PAISCONE (193) PAISI (191, PAISE (193) PRDII (191, PRDIE (193) PREII (191, PREIE (193) CONCATI (192, CONCATE (194) DISCOPAI (192, DISCOPAE (194) ILLJREQI (192, ILLJREQE (194) INVNDFI (192, INVNDFE (194) NDFI (192, NDFE (194) NSEI (192, NSEE (194) PSEI (192, PSEE (194) COMAI (19C, COMAE (19C) LOMI (19C, LOME (19C)
ERDIV[2:0] (190)
EPRDII#3 (0EA, EPRDII#3EN (0FB)
LOPCONV (190)
LOPV (190)
LOPI (0E9, LOPIEN (0FA)
PAISCONV (190)
PAISV (190)
PAISI (0E9, PAISEN (0FA)
PRDIV (190)
PRDII (0E9, PRDIEN (0FA)
LOMV (19C)
LOMI (0E9, LOMIEN (0FA)
RTAL1I (104)
ESEI (129, ESEE (128) NPJI (129, DPJEE (128) PPJI (129, DPJEE (128) ISFI (12A, ISFE (128) ISFV (12A)
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Interrupt Hierarchy
State
Auxiliary
RTAL2I (104)
ESEI (169, ESEE (168) NPJI (169, DPJEE (168) PPJI (169, DPJEE (168) ISFI (16A, ISFE (168) ISFV (16A)
RTAL3I (104)
ESEI (1A9, ESEE (1A8) NPJI (1A9, DPJEE (1A8) PPJI (1A9, DPJEE (1A8) ISFI (1AA, ISFE (1A8) ISFV (1AA)
SPTB1I (105)
RTIMI (149, RTIMIE (149) RTIUI (149, RTIUIE (149) UNEQI (149, UNEQIE (14D) RPSLMI (14D, RPSLMIE (14D) RPSLUI (14D, RPSLUIE (14D)
RTIMV (149)
TIMI (0E7, TIMIEN (0F8)
RTIUV (149)
TIUI (0E7, TIUIEN (0F8)
UNEQV (149)
RPSLMV (14D)
PSLMI (0E7, PSLMIEN (0F8)
RPSLUV (14D)
PSLUI (0E7, PSLUIEN (0F8)
SPTB2I (105)
RTIMI (189, RTIMIE (189) RTIUI (189, RTIUIE (189) UNEQI (189, UNEQIE (18D) RPSLMI (18D, RPSLMIE (18D) RPSLUI (18D, RPSLUIE (18D)
RTIMV (189)
TIMI (0E8, TIMIEN (0F9)
RTIUV (189)
TIUI (0E8, TIUIEN (0F9)
UNEQV (189)
RPSLMV (18D)
PSLMI (0E8, PSLMIEN (0F9)
RPSLUV (18D)
PSLUI (0E8, PSLUIEN (0F9)
SPTB3I (105)
RTIMI (1C9, RTIMIE (1C9)
RTIMV (1C9)
TIMI (0E9, TIMIEN (0FA)
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Interrupt Hierarchy
State
Auxiliary
SPTB3I (cont'd)
RTIUI (1C9, RTIUIE (1C9) UNEQI (1C9, UNEQIE (1CD) RPSLMI (1CD, RPSLMIE (1CD) RPSLUI (1CD, RPSLUIE (1CD)
RTIUV (1C9)
TIUI (0E9, TIUIEN (0FA)
UNEQV (1C9)
RPSLMV (1CD)
PSLMI (0E9, PSLMIEN (0FA)
RPSLUV (1CD)
PSLUI (0E9, PSLUIEN (0FA)
TTAL1I (105)
ESEI (141, ESEE (140) NPJI (141, PJEE (140) PPJI (141, PJEE (140) ISFI (142, ISFE (140) ISFV (142)
TTAL2I (105)
ESEI (181, ESEE (180) NPJI (181, PJEE (180) PPJI (181, PJEE (180) ISFI (182, ISFE (180) ISFV (182)
TTAL3I (105)
ESEI (1C1, ESEE (1C0) NPJI (1C1, PJEE (1C0) PPJI (1C1, PJEE (1C0) ISFI (1C2, ISFE (1C0) (109, (109) ISFV (1C2)
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SONET CONFIGURATION following table lists major configuration differences SPECTRA-155 SONET applications. This list exhaustive, configuration values should checked ensure they meet current standards requirements. shown table configuration registers that application dependent, like byte. Also shown registers that require real-time processor intervention, such bytes which monitored updated according status. Table SONET Configuration Values
Value SONET Value Standards References G.783 (04/97) 2.2.2.7 GR-253-CORE (Issue R6-184 LAISDET (08) G.783 (04/97) 5.2.2 GR-253-CORE (Issue R6-147 RASE Block datasheet settings LEN16 (38, 148, 188, 1C8) PER5 (38, 148, 188, 1C8) PSL5 (110, 150, 190) datasheet SONET settings G.783 (04/97) 2.2.2.5 GR-253-CORE (Issue 5.3.3 G.783 (04/97) 9.2.2.2 defined G.783 (04/97) 2.2.2.2 GR-253-CORE (Issue R6-119 RDI10 (116, 156, 196) G.783 (04/97) 2.2.2.15 GR-253-CORE (Issue R6-197, R6-198 DISFS (BD, 11D, 15D, 19D) ENSS (BD, 11D, 15D, 19D) (128, 168, 1A8) G.707 (03/96) 9.3.1.2 GR-253-CORE (Issue R3-21 G.783 (04/97) Annex GR-253-CORE (Issue 3.5.1 G.783 (04/97) Annex GR-253-CORE (Issue 3.5.1 PERSIST (130, 170, 1B0) G.783 (04/97) under discussion GR-253-CORE (Issue O6-193 EXCFS (130, 170, 1B0) G.707 (03/96) 9.3.1.2 GR-253-CORE (Issue R3-21
Register (address) LRDIDET (08)
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Register (address) S[1:0] (135, 175, 1B5)
Value
SONET Value (usually 00b)
Standards References G.707 (03/96) 8.1.2 GR-253-CORE (Issue 3.5.1
CONCAT[11:10] (13F)
(usually 10b)
(usually 00b)
G.707 (03/96) 8.1.2 GR-253-CORE (Issue 3.5.1.4
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APPENDIX: OVERHEAD BYTES figure below gives overhead bytes. This shows names given overhead bytes both SONET SDH. Where standards give different names bytes, SONET name shown name bottom. Unused bytes named. Figure SONET Overhead Bytes
Section RSOH
Path
Line MSOH
Transport Overhead Framing. framing bytes contain constant values which allow network equipment determine start frame serial datastream. BIP-8. interleaved parity error monitoring Section (Regenerator Section) level. BIP-mx8. interleaved parity error monitoring Line (Multiplex Section) level. Data Communications Channels. Separated into separate channels: 192kb/s Section (Regenerator Section) consisting D1-D3, 578kb/s Line (Multiplex
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Section) consisting D4-D12. channels normally contain alarm, maintenance, control information using complex message-based protocol contained within HDLC frames. Orderwire. 64kbit/s voice channels (8-bit encoded) craftsperson communications. User Channel. Reserved network provider. Pointer. pointer value bytes locate start (VC-4 VC-3) within frame. Pointer Action. pointer action byte contains payload when negative stuff event occurs, undefined other times. Section Trace/Multiplex Section Trace. older systems, known contained identify first STS-1 (AU-3) within multiplexed datastream. This byte since been redefined contain byte byte SDH) trace identifier message. Automatic Protection Switching (APS) Channel. bytes allocated signalling Line (Multiplex Section) protection schemes. addition, bits byte used convey Line (Multiplex Section) signals. STS-1 (STM-0) REI. defined STS-3 (STM-1) higher rates. Bits provide count far-end errors (formerly known FEBEs). Bits through currently undefined. STS-N (MS-REI). Provides count far-end errors (formerly known FEBEs). National (SDH only). Reserved national use. Synchronization Status Byte. byte provides synchronization status byte. Bits through synchronization status byte identifies synchronization source STS-3c/1 (STM-1) signal. Bits through currently undefined.
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Path Overhead
Section Growth (SONET only). Reserved future growth. Growth (SONET only). Reserved future growth.
Path BIP-8. interleaved parity monitoring Path level. Signal Label. code identifying content status payload. example, value indicates (TUG) structured payload. Path User Channel. Reserved communications between path terminating network equipment. Path User Channel (SDH only). Reserved communications between path terminating network equipment. Path Status. Bits provide count far-end errors. (REI, formerly FEBE). provides remote defect indication (RDI). Bits optionally contribute form enhanced code which type defect communcated. undefined. Position Indicator. Payload-specific position indicator. (TUG) structured payloads, this byte used multiframe phase indicator. Path Trace. byte byte SDH) trace identifier message. Automatic Protection Switching (APS) Channel (SDH only). Allocated signalling Path protection schemes. Network Operator Byte (SDH only). Used Tandem Connection function. Path Growth (SONET only). Reserved future growth.
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CONTACTING PMC-SIERRA, INC. PMC-Sierra, Inc. 105-8555 Baxter Place Burnaby, Canada Tel: Fax: (604) 415-6000 (604) 415-6200 document@pmc-sierra.com info@pmc-sierra.com apps@pmc-sierra.com (604) 415-4533 http://www.pmc-sierra.com
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None information contained this document constitutes express implied warranty PMC-Sierra, Inc. sufficiency, fitness suitability particular purpose such information fitness, suitability particular purpose, merchantability, performance, compatibility with other parts systems, products PMC-Sierra, Inc., portion thereof, referred this document. PMC-Sierra, Inc. expressly disclaims representations warranties kind regarding contents information, including, limited express implied warranties accuracy, completeness, merchantability, fitness particular use, non-infringement. event will PMC-Sierra, Inc. liable direct, indirect, special, incidental consequential damages, including, limited lost profits, lost business lost data resulting from reliance upon information, whether PMC-Sierra, Inc. been advised possibility such damage. 1998 PMC-Sierra, Inc. PMC-961079 (R5) PMC-xxxxxx (Rx) Issue date: 1998
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APPLICATION NOTE PMC-980901 ISSUE SPECTRA-155 PROGRAMMER'S REFERENCE

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