DESCRIPTIO Dual Outputs: 3.3V User Programmable Ultrahigh Efficie
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LTC1142/LTC1142L/LTC1142HV Dual High Efficiency Synchronous Step-Down Switching Regulators
DESCRIPTIO
Dual Outputs: 3.3V User Programmable Ultrahigh Efficiency: Over Possible Current Mode Operation Excellent Line Load Transient Response High Efficiency Maintained over Decades Output Current Standby Current Light Loads: 160µA/Output Independent Micropower Shutdown: 40µA Wide Range: 3.5V Very Dropout Operation: 100% Duty Cycle Synchronous Switching High Efficiency Available Standard 28-Pin SSOP
LTC1142/LTC1142L/LTC1142HV dual synchronous step-down switching regulator controllers featuring automatic Burst Modeoperation maintain high efficiencies output currents. devices composed separate regulator blocks, each driving pair external complementary power MOSFETs, switching frequencies 250kHz, using constant off-time current mode architecture providing constant ripple current inductor. operating current level both regulators user programmable external current sense resistor. Wide input supply range allows operation from 3.5V* (20V maximum). Constant off-time architecture provides dropout regulation limited only RDS(ON) external MOSFET resistance inductor current sense resistor. LTC1142 series ideal applications requiring dual output voltages with high conversion efficiencies over wide load current range small amount board space.
registered trademarks Linear Technology Corporation. Burst Mode trademark Linear Technology Corporation.
APPLICATIO
Notebook Palmtop Computers Battery-Operated Digital Devices Portable Instruments Power Distribution Systems
TYPICAL APPLICATIO
CIN3 22µF
5.2V
0.22µF P-CH Si9430DY VIN3 PDRIVE SHDN3
NORMAL >1.5V SHDN SHDN5 VIN5 PDRIVE
0.22µF P-CH Si9430DY 50µH
VOUT3 3.3V/2A
RSENSE3 0.05
50µH
1000pF MBRS130L N-CH Si9410DY
SENSE SENSE NDRIVE PGND3 SGND3
LTC1142HV
SENSE SENSE NDRIVE
1000pF N-CH Si9410DY MBRS130L
COUT3 220µF
ITH3
ITH5
SGND5 PGND5
RSENSE3, RSENSE5 DALE WSL-2010-.05 COILTRONICS CTX50-2-MP PINS
560pF 3300pF 3300pF 390pF
1142
NOTE: COMPONENTS OPTIMIZED HIGHEST EFFICIENCY, MINIMUM BOARD SPACE.
Figure High Efficiency Dual 3.3V, Supply
CIN5 22µF RSENSE5 0.05 VOUT5 5V/2A
COUT5 220µF
LTC1142/LTC1142L/LTC1142HV
ABSOLUTE RATI
Input Supply Voltage (Pins LTC1142, LTC1142L-ADJ 0.3V LTC1142HV, LTC1142HV-ADJ 0.3V Continuous Output Current (Pins 50mA Sense Voltages (Pins 0.3V (VIN 0.3V) 0.3V
PACKAGE/ORDER ATIO
VIEW SENSE SHDN3 SGND3 PGND3 NDRIVE PDRIVE SENSE ITH3 INTVCC3 VIN3 PDRIVE NDRIVE PGND5 SGND5 SHDN5 SENSE
ORDER PART NUMBER LTC1142CG LTC1142HVCG
VIN5 INTVCC5 ITH5 SENSE
PACKAGE 28-LEAD PLASTIC SSOP
TJMAX 125°C, 95°C/W
Consult factory Industrial Military grade parts.
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 10V, VSHDN unless otherwise noted.
SYMBOL VOUT PARAMETER Feedback Voltage Feedback Current Regulated Output Voltage 3.3V Output Output Output Voltage Line Regulation Output Voltage Load Regulation 3.3V Output Output Output Ripple (Burst Mode) I10, Input Supply Current (Note Normal Mode Sleep Mode Shutdown CONDITIONS LTC1142HV-ADJ, LTC1142L-ADJ V10, LTC1142HV-ADJ, LTC1142L-ADJ LTC1142, LTC1142HV ILOAD 700mA, ILOAD 700mA, V10, 12V, ILOAD 50mA Figure Circuit ILOAD ILOAD ILOAD LTC1142 V10, 12V, VSD1 VSD2 2.1V, V10,
ELECTRICAL CHARACTERISTICS
VOUT
(Note
Operating Ambient Temperature Range 70°C Extended Commercial Temperature Range 40°C 85°C Junction Temperature (Note 125°C Storage Temperature Range 65°C 150°C Lead Temperature (Soldering, sec). 300°C
VIEW SENSE VFB1 SHDN1 SGND1 PGND1 NDRIVE PDRIVE SENSE ITH1 INTVCC1 VIN1 PDRIVE NDRIVE PGND2 SGND2 SHDN2 VFB2 SENSE
ORDER PART NUMBER LTC1142HVCG-ADJ LTC1142LCG-ADJ
VIN2 INTVCC2 ITH2 SENSE
PACKAGE 28-LEAD PLASTIC SSOP
TJMAX 125°C, 95°C/W
1.21
1.25
1.29 3.43 5.20
UNITS mVP-P
3.23 4.90
3.33 5.05
LTC1142/LTC1142L/LTC1142HV
denotes specifications which apply over full operating temperature range, otherwise specifications 25°C. 10V, VSHDN unless otherwise noted.
SYMBOL PARAMETER Input Supply Current (Note Normal Mode Sleep Mode Shutdown Input Supply Current (Note Normal Mode Sleep Mode Shutdown Current Sense Threshold Voltage CONDITIONS LTC1142HV, LTC1142HV-ADJ V10, 18V, VSD1 VSD2 2.1V, V10, LTC1142L-ADJ (Note 3.5V V10, 3.5V V10, VSD1 VSD2 2.1V, 3.5V V10, LTC1142HV-ADJ, LTC1142L-ADJ VOUT 100mV, VREF 25mV VOUT 100mV, VREF 25mV LTC1142, LTC1142HV VOUT 100mV (Forced) VOUT 100mV (Forced) LTC1142, LTC1142HV VOUT 100mV (Forced) VOUT 100mV (Forced) VSHDN ISHDN I11, tOFF Shutdown Threshold Shutdown Input Current Discharge Current Off-Time (Note Driver Output Transition Times VSHDN V10, VOUT Regulation, VSENSE VOUT VOUT 390pF, ILOAD 700mA 3000pF (Pins 23), V10, UNITS
ELECTRICAL CHARACTERISTICS
40°C 85°C (Note 10V, unless otherwise noted.
SYMBOL VOUT PARAMETER Feedback Voltage Feedback Current Regulated Output Voltage 3.3V Output Output Input Supply Current (Note Normal Mode Sleep Mode Shutdown Input Supply Current (Note Normal Mode Sleep Mode Shutdown Input Supply Current (Note Normal Mode Sleep Mode Shutdown Current Sense Threshold Voltage CONDITIONS LTC1142HV-ADJ Only: V10, LTC1142HV-ADJ Only LTC1142, LTC1142HV ILOAD 700mA, ILOAD 700mA, LTC1142 V10, 12V, VSHDN 2.1V, V10, LTC1142HV-ADJ, LTC1142HV V10, 18V, VSHDN 2.1V, V10, LTC1142L-ADJ (Note 3.5V V10, 3.5V V10, VSD1 VSD2 2.1V, 3.5V V10, LTC1142HV-ADJ, LTC1142L-ADJ VOUT 100mV, VREF 25mV VOUT 100mV, VREF 25mV LTC1142, LTC1142HV VOUT 100mV (Forced) VOUT 100mV (Forced) 3.17 4.85 1.21 1.25 3.33 5.05 1.29 3.43 5.20 UNITS
I10,
LTC1142/LTC1142L/LTC1142HV
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS LTC1142, LTC1142HV VOUT 100mV (Forced) VOUT 100mV (Forced) VSHDN tOFF Shutdown Threshold Off-Time (Note 390pF, ILOAD 700mA
40°C 85°C (Note 10V, unless otherwise noted.
UNITS
0.55
Note Absolute Maximum Ratings those values beyond which life device impaired. Note calculated from ambient temperature power dissipation according following formula: LTC1142CG: 95°C/ Note This current regulator block. Total supply current Pins currents. Dynamic supply current higher gate charge being delivered switching frequency. Applications Information section.
Note applications where RSENSE placed ground potential, offtime increases approximately 40%. Note LTC1142/LTC1142L/LTC1142HV guaranteed meet specified performance from 70°C designed, characterized expected meet these extended temperature limits, tested 40°C 85°C. Guaranteed I-grade parts available, consult factory. Note LTC1142L-ADJ allows operation down 3.5V.
TYPICAL PERFOR CHARACTERISTICS
Output Efficiency
EFFICIENCY
EFFICIENCY
EFFICIENCY
0.01
LOAD CURRENT
3.3V Efficiency Input Voltage
FIGURE CIRCUIT VOUT 3.3V
EFFICIENCY
VOUT (mV)
ILOAD 100mA
VOUT (mV)
ILOAD
INPUT VOLTAGE
1142
3.3V Output Efficiency
Efficiency Input Voltage
FIGURE CIRCUIT VOUT ILOAD
ILOAD 100mA
0.01
LOAD CURRENT
INPUT VOLTAGE
1142
1142
Line Regulation
FIGURE CIRCUIT ILOAD
Load Regulation
FIGURE CIRCUIT RSENSE 0.05
VOUT VOUT 3.3V LOAD CURRENT
1142
1142
INPUT VOLTAGE
1142
LTC1142/LTC1142L/LTC1142HV TYPICAL PERFOR CHARACTERISTICS
Supply Current
SUPPLY CURRENT (mA) INPUT VOLTAGE SLEEP MODE
SUPPLY CURRENT (µA)
NORMALIZED FREQUENCY
ACTIVE MODE
REGULATOR BLOCK INCLUDING GATE CHARGE CURRENT PINS
Gate Charge Supply Current
GATE CHARGE CURRENT (mA)
SENSE VOLTAGE (mV)
100nC
OFF-TIME (µs)
50nC OPERATING FREQUENCY (kHz)
1142
CTIO
LTC1142/LTC1142HV
SENSE (Pin Input 3.3V Section Current Comparator. built-in offset between Pins conjunction with RSENSE3 sets current trip threshold 3.3V section. SHDN3 (Pin When grounded, 3.3V section operates normally. Pulling high holds both MOSFETs puts 3.3V section micropower shutdown mode. Requires CMOS logic-level signal with 1µs. "float" SGND3 (Pin 3.3V section small-signal ground must routed separately from other grounds terminal 3.3V section output capacitor. PGND3 (Pin 3.3V section driver power ground connects source N-channel MOSFET terminal 3.3V section input capacitor. (Pin Connection. NDRIVE (Pin High Current Drive Bottom N-Channel MOSFET, 3.3V Section. Voltage swing from ground VIN3.
1142
Supply Current Shutdown
INPUT VOLTAGE REGULATOR BLOCK PINS VSHUTDOWN
Operating Frequency VOUT
VOUT
1142
70°C 25°C
VOUT VOLTAGE
1142
Off-Time Output Voltage
VOUT 3.3V OUTPUT VOLTAGE
1142
Current Sense Threshold Voltage
TEMPERATURE (°C)
1142
VSENSE VOUT
MAXIMUM THRESHOLD
VOUT
MINIMUM THRESHOLD
LTC1142/LTC1142L/LTC1142HV
CTIO
(Pins Connection. PDRIVE (Pin High Current Drive P-Channel MOSFET, Section. Voltage swing this from VIN5 ground. VIN5 (Pin 10): Supply pin, section, must closely decoupled power ground (Pin 11): External capacitor from ground sets operating frequency section. (The actual frequency also dependent upon input voltage.) INTVCC5 (Pin Internal supply voltage section, nominally 3.3V, decoupled signal ground, externally load this pin. ITH5 (Pin 13): Gain Amplifier Decoupling Point, Section. section current comparator threshold increases with voltage. SENSE (Pin 14): Connects internal resistive divider which sets output voltage section. also input current comparator section. SENSE (Pin 15): Input Section Current Comparator. built-in offset between Pins conjunction with RSENSE5 sets current trip threshold section. SHDN5 (Pin 16): When grounded, section operates normally. Pulling high holds both MOSFETs puts section micropower shutdown mode. Requires CMOS logic signal with 1µs. "float" SGND5 (Pin 17): section small-signal ground must routed separately from other grounds terminal section output capacitor. PGND5 (Pin 18): section driver power ground connects source N-channel MOSFET terminal section input capacitor. (Pin 19): Connection. NDRIVE (Pin 20): High Current Drive Bottom N-Channel MOSFET, Section. Voltage swing from ground VIN5. (Pins 22): Connection. PDRIVE (Pin 23): High Current Drive P-Channel MOSFET, 3.3V Section. Voltage swing this from VIN3 ground. VIN3 (Pin 24): Supply pin, 3.3V section, must closely decoupled 3.3V power ground, (Pin 25): External capacitor from ground sets operating frequency 3.3V section. (The actual frequency also dependent upon input voltage.) INTVCC3 (Pin 26): Internal supply voltage 3.3V section, nominally 3.3V, decoupled signal ground, externally load this pin. ITH3 (Pin 27): Gain Amplifier Decoupling Point, 3.3V Section. 3.3V section current comparator threshold increases with voltage. SENSE (Pin 28): Connects internal resistive divider which sets output voltage 3.3V section. also input current comparator 3.3V section.
LTC1142HV-ADJ/LTC1142L-ADJ
SENSE (Pin Input Section Current Comparator. built-in offset between Pins conjunction with RSENSE1 sets current trip threshold this section. VFB1 (Pin This serves feedback from external resistive divider used output voltage section SHDN1 (Pin When grounded, section regulator operates normally. Pulling high holds both MOSFETs puts this section micropower shutdown mode. Requires CMOS logic signal with 1µs. "float" SGND1 (Pin section small-signal ground must routed separately from other grounds terminal section output capacitor. PGND1 (Pin section driver power ground connects source N-channel MOSFET terminal section input capacitor.
LTC1142/LTC1142L/LTC1142HV
CTIO
NDRIVE (Pin High Current Drive Bottom N-Channel MOSFET, Section Voltage swing from ground VIN1. (Pins Connection. PDRIVE (Pin High Current Drive P-Channel MOSFET, Section Voltage swing this from VIN2 ground. VIN2 (Pin 10): Supply pin, section must closely decoupled section power ground, (Pin 11): External capacitor from ground sets operating frequency section (The actual frequency also dependent upon input voltage.) INTVCC2 (Pin Internal supply voltage section nominally 3.3V, decoupled signal ground, externally load this pin. ITH2 (Pin 13): Gain Amplifier Decoupling Point, Section section current comparator threshold increases with voltage. SENSE (Pin 14): Connects input current comparator section SENSE (Pin 15): Input Section Current Comparator. built-in offset between Pins conjunction with RSENSE2 sets current trip threshold this section. VFB2 (Pin 16): This serves feedback from external resistive divider used output voltage section SHDN2 (Pin 17): When grounded, section regulator operates normally. Pulling high holds both MOSFETs puts section micropower shutdown mode. Requires CMOS logic signal with 1µs. "float" SGND2 (Pin 18): section small-signal ground must routed separately from other grounds terminal section output capacitor. PGND2 (Pin 19): section driver power ground connects source N-channel MOSFET terminal section input capacitor. NDRIVE (Pin 20): High Current Drive Bottom N-Channel MOSFET, Section Voltage swing from ground VIN2. (Pins 22): Connection. PDRIVE (Pin 23): High Current Drive P-Channel MOSFET, Section Voltage swing this from VIN1 ground. VIN1 (Pin 24): Supply Pin, Section Must closely decoupled section power ground (Pin 25): External capacitor from ground sets operating frequency section (The actual frequency also dependent upon input voltage.) INTVCC1 (Pin 26): Internal supply voltage section nominally 3.3V, decoupled signal ground, externally load this pin. ITH1 (Pin 27): Gain Amplifier Decoupling Point, Section section current comparator threshold increases with voltage. SENSE (Pin 28): Connects input current comparator section
LTC1142/LTC1142L/LTC1142HV
CTIO DIAGRA
NUMBERS LTC1142, LTC1142HV NUMBERS LTC1142L-ADJ LTC1142HV-ADJ 24(10) 23(9) PDRIVE
Only regulator block shown. numbers 3.3V (5V) sections LTC1142/LTC1142HV, VOUT1 (VOUT2) LTC1142L-ADJ/LTC1142HV-ADJ.
2(16) LTC1142-ADJ 3(17) SGND 3(17) LTC1142L-ADJ LTC1142HV-ADJ 4(18) SENSE 1(15) SENSE 28(14)
SLEEP
VTH2
VTH1
25(11)
OPERATIO
Refer Functional Diagram
LTC1142 series consists individual regulator blocks, each using current mode, constant off-time architectures synchronously switch external pair complementary power MOSFETs. regulators internally provide output voltages 3.3V LTC1142. LTC1142HV-ADJ/LTC1142L-ADJ configured provide user selectable output voltages, each external resistor dividers. Operating frequency individually each section external capacitors Pins output voltage sensed internal voltage divider connected Sense (14) (LTC1142) external divider returned VFB, (16) (LTC1142-ADJ). voltage comparator gain block compare divided output voltage with reference voltage 1.25V. optimize efficiency, LTC1142 series automatically switches between modes operation, Burst Mode continuous mode. voltage comparator primary control element when device Burst Mode operation, while gain block controls output voltage continuous mode.
6(20) NDRIVE LTC1142L-ADJ LTC1142HV-ADJ 2(16) NC/ADJ 4(18) PGND LTC1142L-ADJ, LTC1142HV-ADJ: 5(19)
25mV 150mV
1.25V 100k INTVCC REFERENCE 26(12)
27(13)
OFF-TIME CONTROL
SENSE
SHDN 2(16) LTC1142L-ADJ LTC1142HV-ADJ 3(17)
1142
During switch "ON" cycle continuous mode, current comparator monitors voltage between Pins (15) (14) connected across external shunt series with inductor. When voltage across shunt reaches threshold value, PDrive output switched VIN, turning P-channel MOSFET. timing capacitor connected (11) allowed discharge rate determined off-time controller. discharge current made proportional output voltage [measured (14)] model inductor current, which decays rate that also proportional output voltage. While timing capacitor discharging, NDrive output goes VIN, turning N-channel MOSFET. When voltage timing capacitor discharged past VTH1, comparator trips, setting flip-flop. This causes NDrive output (turning N-channel MOSFET) PDrive output also (turning P-channel MOSFET back on). cycle then repeats.
LTC1142/LTC1142L/LTC1142HV
OPERATIO
load current increases, output voltage decreases slightly. This causes output gain stage [Pin 27(13)] increase current comparator threshold, thus tracking load current. sequence events Burst Mode operation very similar continuous operation with cycle interrupted voltage comparator. When output voltage above desired regulated value, P-channel MOSFET held comparator timing capacitor continues discharge below VTH1. When timing capacitor discharges past VTH2, voltage comparator trips, causing internal sleep line N-channel MOSFET turn off. circuit enters sleep mode with both power MOSFETs turned off. sleep mode majority circuitry turned off, dropping quiescent current from 1.6mA 160µA (for regulator block). load current being supplied from output capacitor. When output voltage dropped amount
APPLICATIO ATIO
basic LTC1142 application circuit shown Figure External component selection driven load requirement begins with selection RSENSE. Once RSENSE known, chosen. Next, power MOSFETs selected. Finally, COUT selected loop compensated. Since 3.3V sections LTC1142 identical similarly section section LTC1142HV-ADJ/ LTC1142L-ADJ identical, process component selection same both sections. circuit shown Figure configured operation input voltage 20V. RSENSE Selection Output Current RSENSE chosen based required output current. LTC1142 current comparators have threshold range which extends from minimum 25mV/RSENSE maximum 150mV/RSENSE. current comparator threshold sets peak inductor ripple current,
Refer Functional Diagram
hysteresis comparator P-channel MOSFET again turned this process repeats. avoid operation current loop interfering with Burst Mode operation, built-in offset incorporated gain stage. This prevents current comparator threshold from increasing until output voltage dropped below minimum threshold. prevent both external MOSFETs from ever being turned same time, feedback incorporated sense state driver output pins. Before NDrive output high, PDrive output must also high. Likewise, PDrive output prevented from going while NDrive output high. Using constant off-time architecture, operating frequency function input voltage. minimize frequency variation dropout approached, off-time controller increases discharge current drops below VOUT 1.5V. dropout P-channel MOSFET turned continuously (100% duty cycle) providing dropout operation with VOUT VIN.
yielding maximum output current IMAX equal peak value less half peak-to-peak ripple current. proper Burst Mode operation, IRIPPLE(P-P) must less than equal minimum current comparator threshold. Since efficiency generally increases with ripple current, maximum allowable ripple current assumed, i.e., IRIPPLE(P-P) 25mV/RSENSE (see Selection Operating Frequency section). Solving RSENSE allowing margin variations LTC1142 external component values yields:
RSENSE
100mV IMAX
graph Selecting RSENSE Maximum Output Current given Figure load current below which Burst Mode operation commences, IBURST, peak short-circuit current ISC(PK),
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
both track IMAX. Once RSENSE been chosen, IBURST ISC(PK) predicted from following: IBURST ISC(PK) 15mV RSENSE 150mV RSENSE
LTC1142 automatically extends tOFF during short circuit allow sufficient time inductor current decay between switch cycles. resulting ripple current causes average short-circuit current ISC(AVG) reduced approximately IMAX.
0.20
0.15
RSENSE
0.10
0.05
MAXIMUM OUTPUT CURRENT
1142
Figure Selecting RSENSE
Selection Operating Frequency Each regulator section LTC1142 uses constant offtime architecture with tOFF determined external timing capacitor Each time P-channel MOSFET switch turns voltage reset approximately 3.3V. During off-time, discharged current which proportional VOUT. voltage analogous current inductor which likewise decays rate proportional VOUT. Thus inductor value must track timing capacitor value. value calculated from desired continuous mode operating frequency:
CAPACITANCE (pF)
Assumes 2VOUT, Figure circuit.
graph selecting versus frequency including effects input voltage given Figure operating frequency increased gate charge losses will higher, reducing efficiency (see Efficiency Considerations section). complete expression operating frequency circuit Figure given
VOUT tOFF
where:
tOFF VOUT
VREG desired output voltage (i.e., 3.3V). VOUT measured output voltage. Thus VREG VOUT regulation. Note that decreases, frequency decreases. When input-to-output voltage differential drops below 1.5V particular section, LTC1142 reduces tOFF that section increasing discharge current This prevents audible operation prior dropout.
1000 VSENSE VOUT
FREQUENCY (kHz)
1142
Figure Timing Capacitor Value
Once frequency been inductor must chosen provide more than 25mV/RSENSE peakto-peak inductor ripple current. This results minimum required inductor value LMIN RSENSE VREG inductor value increased from minimum value, requirements output capacitor
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
eased expense efficiency. small inductor used, inductor current will decrease past zero change polarity. consequence this that LTC1142 enter Burst Mode operation efficiency will severely degraded currents. Inductor Core Selection Once minimum value known, type inductor must selected. highest efficiency will obtained using ferrite, molypermalloy (MPP), Kool cores. Lower cost powdered iron cores provide suitable performance, efficiency Actual core loss independent core size fixed inductor value, very dependent inductance selected. inductance increases, core losses down. Unfortunately, increased inductance requires more turns wire therefore copper losses will increase. Ferrite designs have very core loss, design goals concentrate copper loss preventing saturation. Ferrite core material saturates "hard," which means that inductance collapses abruptly when peak design current exceeded. This results abrupt increase inductor ripple current consequent output voltage ripple which cause Burst Mode operation falsely triggered. allow core saturate! Kool (from Magnetics, Inc.) very good, loss core material toroids with "soft" saturation characteristic. Molypermalloy slightly more efficient high (>200kHz) switching frequencies, quite more expensive. Toroids very space efficient, especially when several layers wire. Because they generally lack bobbin, mounting more difficult. However, designs surface mount available from Coiltronics Beckman Industrial Corporation which increase height significantly. Power MOSFET Selection external power MOSFETs must selected with each section LTC1142: P-channel MOSFET main switch, N-channel MOSFET synchronous switch. main selection criteria power MOSFETs threshold voltage VGS(TH) resistance RDS(ON).
Kool registered trademark Magnetics, Inc.
minimum input voltage determines whether standard threshold logic-level threshold MOSFETs must used. standard threshold MOSFETs (VGS(TH) used. expected drop below logic-level threshold MOSFETs (VGS(TH) 2.5V) strongly recommended. When logic-level MOSFETs used, LTC1142 supply voltage must less than absolute maximum ratings MOSFETs. maximum output current IMAX determines RDS(ON) requirement MOSFETs. When LTC1142 operating continuous mode, simplifying assumption made that MOSFETs always conducting average load current. duty cycles MOSFETs given P-Ch Duty Cycle N-Ch Duty Cycle VOUT VOUT From duty cycles required RDS(ON) each MOSFET derived:
P-Ch RDS(ON)
VOUT IMAX
N-Ch RDS(ON)
(VIN VOUT) IMAX2
where allowable power dissipations temperature dependencies RDS(ON). will determined efficiency and/or thermal requirements (see Efficiency Considerations). generally given MOSFET form normalized RDS(ON) Temperature curve, 0.007/°C used approximation voltage MOSFETs. Schottky diodes shown Figure only conduct during dead-time between conduction respective power MOSFETs. sole purpose prevent body diode N-channel MOSFET from turning storing charge during
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
dead-time, which could cost much efficiency (although there other harmful effects omitted). Therefore, should selected forward voltage less than 0.6V when conducting IMAX. COUT Selection continuous mode, source current P-channel MOSFET square wave duty cycle VOUT/ VIN. prevent large voltage transients, input capacitor sized maximum current must used. maximum capacitor current given
Required IRMS IMAX
VOUT
This formula maximum 2VOUT, where IRMS IOUT/2. This simple worst case conditon commonly used design because even significant deviations offer much relief. Note that capacitor manufacturer's ripple current ratings often based only 2000 hours life. This makes advisable further derate capacitor, choose capacitor rated higher temperature than required. Several capacitors also paralleled meet size height requirements design. Always consult manufacturer there question. additional 0.1µF ceramic capacitor also required each line (Pins high frequency decoupling. selection COUT driven required Effective Series Resistance (ESR). COUT must less than twice value RSENSE proper operation LTC1142: COUT Required 2RSENSE Optimum efficiency obtained making equal RSENSE. increased 2RSENSE, efficiency degrades less than greater than 2RSENSE, voltage ripple output capacitor will prematurely trigger Burst Mode operation, resulting disruption continuous mode efficiency which several percent. Manufacturers such Nichicon United Chemicon should considered high performance capacitors. OS-CON semiconductor dielectric capacitor available
OUTPUT CAPACITANCE (µF)
from Sanyo lowest ESR/size ratio aluminum electrolytic somewhat higher price. Once requirement COUT been met, current rating generally exceeds IRIPPLE(P-P) requirement. surface mount applications multiple capacitors have parallel meet capacitance, current handling requirements application. Aluminum electrolytic tantalum capacitors both available surface mount configurations. case tantalum, critical that capacitors surge tested switching power supplies. excellent choice series surface mount tantalums, available case heights ranging from 4mm. example, 200µF/10V called application requiring height, 100µF/10V (P/N TPSD 107K010) could used. Consult manufacturer other specific recommendations. supply voltages, minimum capacitance COUT needed prevent abnormal frequency operating mode (see Figure When COUT made small, output ripple frequencies will large enough trip voltage comparator. This causes Burst Mode operation activated when LTC1142 would normally continuous operation. output remains regulation times.
1000 50µH RSENSE 0.02 25µH RSENSE 0.02
50µH RSENSE 0.05
VOUT VOLTAGE
1142
Figure Minimum Value COUT
Checking Transient Response regulator loop response checked looking load transient response. Switching regulators take several cycles respond step (resistive) load
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
current. When load step occurs, VOUT shifts amount equal ILOAD ESR, where effective series resistance COUT. ILOAD also begins charge discharge COUT until regulator loop adapts current change returns VOUT steady- state value. During this recovery time VOUT monitored overshoot ringing which would indicate stability problem. (13) external components shown Figure circuit will prove adequate compensation most applications. second, more severe transient caused switching loads with large (>1µF) supply bypass capacitors. discharged bypass capacitors effectively parallel with COUT, causing rapid drop VOUT. regulator deliver enough current prevent this problem load switch resistance driven quickly. only solution limit rise time switch drive that load rise time limited approximately CLOAD. Thus 10µF capacitor would require 250µs rise time, limiting charging current about 200mA. Efficiency Considerations percent efficiency switching regulator equal output power divided input power times 100%. often useful analyze individual losses determine what limiting efficiency which change would produce most improvement. Percent efficiency expressed %Efficiency 100% where etc., individual losses percentage input power. (For high efficiency circuits only small errors incurred expressing losses percentage output power.) Although dissipative elements circuit produce losses, three main sources usually account most losses LTC1142 circuits: LTC1142 bias current MOSFET gate charge current losses supply current current which flows into (pin 3.3V section,
section) less gate charge current. LTC1142 supply current each section 160µA with load, increases proportionally with load constant 1.6mA after LTC1142 entered continuous mode. Because bias current drawn from VIN, resulting loss increases with input voltage. bias losses generally less than load currents over 30mA. However, very load currents bias current accounts nearly loss. MOSFET gate charge current results from switching gate capacitance power MOSFETs. Each time MOSFET gate switched from high again, packet charge moves from ground. resulting dQ/dt current which typically much larger than supply current. continuous mode, IGATE(CHG) QP). typical gate charge N-channel power MOSFET 25nC, P-channel about twice that value. This results IGATE(CHG) 7.5mA 100kHz continuous operation, typical mid-current loss with 10V. Note that gate charge loss increases directly with both input voltage operating frequency. This principal reason highest efficiency circuits operate moderate frequencies. Furthermore, argues against using larger MOSFETs than necessary control losses, since overkill cost efficiency well money! losses easily predicted from resistances MOSFET, inductor, current shunt. continuous mode average output current flows through RSENSE, "chopped" between P-channel N-channel MOSFETs. MOSFETs have approximately same RDS(ON), then resistance MOSFET simply summed with resistances RSENSE obtain losses. example, each RDS(ON) 0.1, 0.15, RSENSE 0.05, then total resistance 0.3. This results losses ranging from output current increases from 0.5A losses cause efficiency roll high output currents.
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
Figure shows efficiency losses section typical LTC1142 regulator being apportioned. gate charge loss responsible majority efficiency lost mid-current region. Burst Mode operation employed currents, gate charge loss alone would cause efficiency drop unacceptable levels. With Burst Mode operation, supply current represents lone (and unavoidable) loss component which continues become higher percentage output current reduced. expected, losses dominate high load currents. Other losses including COUT dissipative losses, MOSFET switching losses, Schottky conduction losses during dead-time inductor core losses, generally account less than total additional loss.
GATE CHARGE LTC1142
EFFICIENCY/LOSS
0.01
0.03
OUTPUT CURRENT
1142
Figure Efficiency Loss
Design Example design example, assume (nominal), section, IMAX 200kHz; RSENSE, immediately calculated: RSENSE 100mV/2 0.05 tOFF (1/200kHz) (5/12)] 2.92µs 2.92µs/(1.3 104) 220pF L2MIN 0.05 220pF 28µH Assume that MOSFET dissipations limited 250mW. 50°C thermal resistance each MOSFET 50°C/ then junction temperatures will 63°C
0.007(63 0.27. required RDS(ON) each MOSFET calculated:
RDS(ON) RDS(ON) 12(0.25) 5(2)2 (1.27) 12(0.25) 5(2)2 (1.27) 0.12 0.085
P-channel requirement Si9430DY, while N-channel requirement exceeded Si9410DY. Note that most stringent requirement N-channel MOSFET with VOUT (i.e., short circuit). During continuous short circuit, worst case N-channel dissipation rises ISC(AVG)2 RDS(ON) With 0.05 sense resistor, ISC(AVG) will result, increasing 0.085 N-channel dissipation 450mW temperature 73°C. will require current rating least temperature, COUT will require 0.05 optimum efficiency. allow drop minimum value. lower input voltages operating frequency will decrease P-channel will conducting most time, causing power dissipation increase. VIN(MIN) fMIN (1/2.92µs)[1 (5V/ 7V)] 98kHz
5V(0.12)(2A)2 (1.27) 435mV
similar calculation 3.3V section results component values shown Figure LTC1142HV-ADJ/LTC1142L-ADJ Adjustable Applications When output voltage other than 3.3V required, LTC1142 adjustable version used with external resistive divider from VOUT VFB, (16). regulated output voltage determined
VOUT 1.25
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
prevent stray pickup 100pF capacitor suggested across located close LTC1142HV-ADJ/LTC1142LADJ Figure external divider network must placed across COUT with negative plate COUT returned signal ground. Refer Board Layout Checklist.
RSENSE [PIN 2(16)] 100pF SGND [PIN 4(18)]
1142
VOUT COUT
Figure LTC1142-ADJ External Feedback Network
Board Layout Checklist When laying printed circuit board, following checklist should used ensure proper operation LTC1142. These items also illustrated graphically
1000pF
RSENSE3 VOUT3
COUT3 SHDN (3.3V OUTPUT) SENSE SHDN3 SENSE ITH3 INTVCC3 VIN3 3300pF VIN3 SENSE SENSE
PGND3
N-CH
P-CH VIN5
VIN3
3300pF
BOLD LINES INDICATE HIGH CURRENT PATHS
1000pF
1142
Figure LTC1142 Layout Diagram (see Board Layout Checklist)
CIN3
layout diagram Figure general each block should self-contained with little cross coupling best performance. Check following your layout: signal power grounds segregated? LTC1142 signal ground [Pin (17) LTC1142, (18) LTC1142-ADJ] must return plate COUT. power ground returns source N-channel MOSFET, anode Schottky diode, plate CIN, which should have short lead lengths possible. Does LTC1142 Sense (14) connect point close RSENSE plate COUT? Sense Sense leads routed together with minimum trace spacing? 1000pF capacitor between Pins (15) (14) should close possible LTC1142. Ensure accurate current sensSENSE RESISTOR PATTERN SGND3
NDRIVE
CIN5
PDRIVE
P-CH
VIN5
LTC1142
N-CH
PDRIVE VIN5 INTVCC5 ITH5 SENSE
NDRIVE
PGND5 SGND5 SHDN5 SENSE COUT5 RSENSE5 SHDN OUTPUT) VOUT5
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
with Kelvin connections. sure pattern similar that shown Figure current sense resistors. Does plate connect source P-channel MOSFET closely possible? This capacitor provides current P-channel MOSFET. input decoupling capacitor (1µF/0.22µF) connected closely between (10) power ground [Pin (18) LTC1142, (19) LTC1142ADJ]? This capacitor carries MOSFET driver peak currents. shutdown Pins LTC1142 (Pins LTC1142-ADJ) actively pulled ground during normal operation? Both Shutdown pins high impedance must allowed float. Both pins driven same external signal needed. LTC1142-ADJ adjustable applications, resistive divider must connected between plate COUT signal ground. Output Crowbar added feature using N-channel MOSFET synchronous switch ability crowbar output with same MOSFET. Pulling (11) above 1.5V when output voltage greater than desired regulated value will turn "on" N-channel MOSFET that regulator section. fault condition which causes output voltage above maximum allowable value detected external circuitry. Turning N-channel MOSFET when this fault detected will cause large currents flow blow system fuse. N-channel MOSFET needs sized will safely handle this overcurrent condition. typical delay from pulling high NDrive (20) going high 250ns. Note: Under shutdown conditions, N-channel held pulling high will cause N-channel MOSFET crowbar output. simple N-channel used interface between overvoltage detect circuitry LTC1142 shown Figure
26(12) FROM CROWBAR DETECT CIRCUIT (ACTIVE WHEN VGATE WHEN VGATE GND) VN2222LL 25(11) LTC1142
1142
Figure Output Crowbar Interface
Troubleshooting Hints Since efficiency critical LTC1142 applications, very important verify that circuit functioning correctly both continuous Burst Mode operation. waveform monitor voltage Pins continuous mode (ILOAD IBURST) voltage should sawtooth with 0.9VP-P swing. This voltage should never below shown Figure When load currents (ILOAD IBURST) Burst Mode operation occurs. voltage falls ground periods time shown Figure
3.3V
CONTINUOUS MODE OPERATION 3.3V
Burst Mode OPERATION
1142
Figure Waveforms
Inductor current should also monitored. Look verify that peak-to-peak ripple current continuous mode operation approximately same Burst Mode operation. observed falling ground high output currents, indicates poor decoupling improper grounding. Refer Board Layout Checklist. Auxiliary Windings--Suppressing Burst Mode Operation LTC1142 synchronous switch removes normal limitation that power must drawn from inductor primary winding order extract power from auxiliary windings. With synchronous switching, auxiliary outputs
LTC1142/LTC1142L/LTC1142HV
APPLICATIO ATIO
loaded without regard primary output load, providing that loop remains continuous mode operation. Burst Mode operation suppressed output currents with simple external network which cancels 25mV minimum current comparator threshold. This technique also useful eliminating audible noise from certain types inductors high current (IOUT applications when they lightly loaded. external offset series with Sense subtract from built-in 25mV offset. example this technique shown Figure resistors inserted series with sense leads from sense resistor.
SENSE [PIN 1(15)] 1000pF SENSE [PIN 28(14)] RSENSE VOUT
COUT
1142
Figure Suppression Burst Mode Operation
TYPICAL APPLICATIO
CIN1 22µF 27µH 0.22µF P-CH Si9430DY
(For additional high efficiency circuits, Application Note
5.2V
VOUT1 3.6V/2A
RSENSE1 0.05
VIN1 PDRIVE
1000pF
SENSE SENSE VFB1 NDRIVE PGND1 SGND1 ITH1 ITH2 LTC1142HV-ADJ
COUT1 220µF
100k 52.3k MBRS130T3 N-CH Si9410DY
100pF
RSENSE1, RSENSE2 DALE WSL-2010-.05 SUMIDA CDRH125-270 SUMIDA CDRH125-330
Figure LTC1142HV-ADJ Dual Regulator with 3.6V/2A 5V/2A Outputs
With addition current generated through causing offset
VOFFSET VOUT
VOFFSET 25mV, built-in offset will cancelled Burst Mode operation prevented from occurring. Since VOFFSET constant, maximum load current also decreased same offset. Thus, back same IMAX, value sense resistor must lower:
SENSE 75mV
prevent noise spikes from erroneously tripping current comparator, 1000pF capacitor needed across Pins (15) Pins (14).
NORMAL >1.5V SHDN SHDN1 SHDN2 VIN2 PDRIVE SENSE SENSE VFB2 NDRIVE SGND2 PGND2 N-CH Si9410DY MBRS130T3 0.22µF P-CH Si9430DY 33µH
CIN2 22µF
RSENSE2 0.05
VOUT2 5V/2A
1000pF
150k 49.9k
COUT2 220µF
270pF 3300pF 3300pF 270pF
100pF
1142
LTC1142/LTC1142L/LTC1142HV
TYPICAL APPLICATIO
4.5V
CIN1 22µF 33µH
0.22µF P-CH Si9430DY VIN1 PDRIVE
VOUT1 2.5V/1.5A
RSENSE1 0.075
1000pF COUT1 220µF
49.9k 49.9k MBRS130T3 N-CH Si9410DY
100pF
RSENSE1: L1206-01-R075-J RSENSE2: L1206-01-R050-J
Figure LTC1142HV-ADJ High Efficiency Regulator with 3.3V/2A 2.5V/1.5A Outputs
CIN3 22µF
0.22µF P-CH Si9433DY VIN3 PDRIVE SHDN3 NORMAL >1.5V SHDN SHDN5 VIN5 PDRIVE 0.22µF P-CH Si9430DY
VOUT3 3.3V/3A
RSENSE3 0.033
10µH
1000pF MBRS130T3 N-CH Si9410DY SENSE NDRIVE PGND3 SGND3
COUT3 100µF
RSENSE3: L1206-01-R033-J RSENSE5: L1206-01-R050-J
Figure LTC1142HV High Efficiency Regulator with 3.3V/3A 5V/2A Outputs
NORMAL >1.5V SHDN SHDN1 SHDN2 VIN2 PDRIVE SENSE LTC1142HV-ADJ SENSE VFB2 NDRIVE ITH1 ITH2 SGND2 PGND2 N-CH Si9410DY MBRS130T3 0.22µF P-CH Si9430DY 25µH
CIN2 22µF
RSENSE2 0.05
VOUT2 3.3V/2A
SENSE SENSE VFB1 NDRIVE PGND1 SGND1
1000pF
84.5k
COUT2 220µF
330pF 3300pF 3300pF 330pF COILTRONICS CTX33-4 COILTRONICS CTX25-4
100pF
1142
5.2V
CIN5 22µF
22µH
RSENSE5 0.05
VOUT5 5V/2A
SENSE
LTC1142HV
SENSE SENSE NDRIVE
1000pF N-CH Si9410DY MBRS130T3
ITH3
ITH5
SGND5 PGND5
COUT5 220µF
200pF 3300pF 3300pF 150pF COILCRAFT D03316P-103 COILCRAFT D03316P-223
1142
LTC1142/LTC1142L/LTC1142HV
TYPICAL APPLICATIO
6.5V 22µF
P-CH Si9430DY
VOUT3 3.3V/2A
RSENSE3 0.05
33µH
0.01µF MBRS140T3 N-CH Si9410DY
100µF
ENABLE MAX)
12V/150mA 22µF
SHUTDOWN LT1121
1000pF
1142
RSENSE3: SL-C1-1/2-0R050J RSENSE5: SL-C1-1/2-0R040J COILTRONICS CTX33-4 DALE LPE-6562-A026 PRIMARY: SECONDARY 1:1.8
294k
Figure LTC1142 Triple Output Regulator with Switched Output
FROM WALL ADAPTER CHARGE >1.5V CHARGE OUTPUT >1.5V 3.3V OUTPUT
MBRS340T3 50µH
CIN1 22µF 0.22µF P-CH Si9430DY 1000pF VIN1 PDRIVE SENSE SENSE VFB1 NDRIVE PGND1 SGND1 ITH1 ITH2 3300pF 330pF 100pF LTC1142HV-ADJ SHDN1 SHDN2 VIN2 PDRIVE SENSE SENSE VFB2 NDRIVE SGND2 PGND2 1000pF N-CH Si9410DY MBRS140T3 0.22µF P-CH Si9433DY 25µH
CIN2 22µF
RSENSE1
RSENSE2 0.05
COUT1 220µF
274k 49.9k MBRS140T3 N-CH Si9410DY
84.5k
100pF
200pF VN2222LL
3300pF
RSENSE1: SL-C1-1/2-1R100J RSENSE2: SL-C1-1/2-1R050J COILTRONICS CTX50-4 COILTRONICS CTX25-4
TRICKLE CHARGE
FAST CHARGE 130mV/RSENSE1 1.3A TRICKLE CHARGE 130mV/RSENSE1 100mA
Figure LTC1142HV-ADJ High Efficiency Power Supply Providing 3.3V/2A with Built-In Battery Charger
Information furnished Linear Technology Corporation believed accurate reliable. However, responsibility assumed use. Linear Technology Corporation makes representation that interconnection circuits described herein will infringe existing patent rights.
VIN3 PDRIVE SHDN3
NORMAL >1.5V SHDN SHDN5 VIN5
PDRIVE P-CH Si9430DY
22µF 30µH RSENSE5 0.04
VOUT5 5V/2A
SENSE SENSE NDRIVE PGND3 SGND3
LTC1142
SENSE SENSE NDRIVE
1000pF N-CH Si9410DY MBRS140T3 220µF R1,100
ITH3
ITH5
SGND5 PGND5
VN2222LL 390pF 3300pF 3300pF 200pF
20pF
649k VOUT MBRS140T3
22µF
VBATT CELLS NiCAD
VOUT2 3.3V/2A
COUT2 220µF
1142
LTC1142/LTC1142L/LTC1142HV
TYPICAL APPLICATIO
1400 1200
OUTPUT CURRENT (mA)
Figure LTC1142HV-ADJ Output Current Trickle Charge Resistance (RX) Circuit Figure Using Current Sense Resistor RSENSE1
PACKAGE DESCRIPTIO
5.20 5.38** (0.205 0.212)
7.65 7.90 (0.301 0.311) 0.05 0.21 (0.002 0.008)
0.13 0.22 (0.005 0.009)
0.55 0.95 (0.022 0.037)
NOTE: DIMENSIONS MILLIMETERS *DIMENSIONS INCLUDE MOLD FLASH. MOLD FLASH SHALL EXCEED 0.152mm (0.006") SIDE **DIMENSIONS INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL EXCEED 0.254mm (0.010") SIDE
RELATED PARTS
PART NUMBER DESCRIPTION LTC1530 LTC1625 LTC1628 LTC1703 LTC1709 LTC1736 LTC1753 LTC1873 LTC1929 High Power Synchronous Step-Down Controller RSENSECurrent Mode Synchronous Step-Down Controller Dual High Efficiency 2-Phase Synch Step-Down Controller Dual 550kHz Synch 2-Phase Controller Mobile 2-Phase, 5-Bit Desktop Synch Step-Down Controller 5-Bit Desktop Programmable Synch Switching Dual Synchronous Switching Regulator with 5-Bit Desktop 2-Phase, Synchronous High Efficiency Converter COMMENTS SO-8 with Current Limit. RSENSE Required Above Efficiency, Needs RSENSE, 16-Lead SSOP Package Fits SO-8 Footprint Constant Frequency, Standby 3.3V LDOs, 3.5V LTC1702 5-Bit Mobile Mobile Pentium® Processor Systems Current Mode, 36V, IOUT 1.3V 3.5V Programmable Output Using Internal 5-Bit 1.3V 3.5V Programmable Core Output Plus Output Current Mode Ensures Accurate Current Sensing, 36V, IOUT
Synchronous Step-Down Controller with 5-Bit Mobile Control Fault Protection, PowerGood, 3.5V Input, Current Mode
RSENSE trademark Linear Technology Corporation. Pentium registered trademark Intel Corporation.
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, 95035-7417
(408)432-1900 FAX: (408) 434-0507 www.linear-tech.com
1000 RESISTANCE
1142
Dimensions inches (millimeters) unless otherwise noted. Package 28-Lead Plastic SSOP (0.209)
(LTC 05-08-1640)
10.07 10.33* (0.397 0.407) 1.73 1.99 (0.068 0.078)
0.65 (0.0256)
0.25 0.38 (0.010 0.015)
SSOP 1098
1142fd LT/TP 0600 PRINTED
LINEAR TECHNOLOGY CORPORATION 1995
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