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Description These SERDES Transceivers intended used Gbit/s optical SON
Top Searches for this datasheetAlcatel 1964 SONET integrated modules SERDES Transceiver STM-64 OC-192 Description These SERDES Transceivers intended used Gbit/s optical SONET rate provide electrical accesses lower Mbit/s rate. modules housed space-saving 300-pin package, providing same electrical access overall applications. transmitter side contains in-house cooled EAILM laser with laser driver temperature control loop. transmit path starts with serializer Asic. receiver contains in-house III-V detector with preamplifier front-end module, main amplifier Asic, clock data recovery function with accurate decision circuit. receive path ends with deserializer Asic. Alcatel 1964 family range SERDES transceivers modules, providing convenient flexible optical interfaces SONET systems operating 9.96 Gbit/s exceed applicable ITU-T G.691, Telcordia GR-1377-Core Optical Interworking Forum OIF99.102 standards. Features International Standard Multisource Optical Interfaces Upward compatibility with different features Applications: Intermediate-Reach Short-Reach Optical 9.96 Gbit/s rate Electrical Mbit/s rate Operating wavelength Full performance operating case temperature from Space-saving package Alcatel Reliability Qualification Program built quality Transmitter: EA-ILM 1.5µ cooled laser optical output 16x2 input data Mbit/s LVDS ref. clock PECL compatible Shut down command Analog monitoring alarms Power supplies: Power consumption: typical Receiver: InGaAs PIN-preamp detector High typical sensitivity 16x2 output data Mbit/s LVDS ref. clock PECL compatible Analog monitoring alarms Power supplies: Power consumption: typical Applications Used transmission systems from high-speed intermediate-reach long-reach applications, Alcatel 1900 family operates SONET OC-192 rates well ITU-T STM-64 rates. Covering types SONET optical interfaces (tributaries aggregates) Alcatel 1900 modules suitable line systems, Drop Multiplexers digital cross-connects well switches routers. part global Alcatel 1900 family, Alcatel 1964 ShortHaul module first version types STM-64 (Very Short Reach, Intra-office, Short-Haul Long-Haul) OC-192 (Very Short Reach, ShortReach, Intermediate-Reach LongReach) optical interfaces. These modules ensure ease offer flexibility Gbit/s optical links system designers. Optical characteristics Condition Target distance Optical budget Dispersion Path penalty Transmitter Center wavelength Optical output power Spectral width SMSR Extinction ratio Shutdown optical power Generated jitter Return loss Receiver Receiver sensitivity Receiver overload Generated jitter Reflectance Note Note Note Symb I-64.2 SR-2 1530 1550 1565 S-64.2 IR-2 1530 1550 1565 Unit ps/nm UIpp UIpp Note Note Note Note SNOM SIDLE Note Note Note RNOM RNOM Note Optical budgets defined based Telcordia GR-1377-Core ITU-T G.691. Note From bandwidth jitter TxREFCLK. Note Measured connector interface. Note maximum full width central wavelength peak; measured down from maximum amplitude under modulation condition 9.95328 Gbit/s PRBS 223-1. Note Measured connector interface under modulation conditions 9.95328 Gbit/s PRBS 223-1. Note Measured 10-12 under modulation conditions 9.95328 Gbit/s PRBS 223-1 parameters specified End-of-Life within overall relevant operating temperature range. typical values referenced nominal power supply, beginning life. Electrical characteristics Parameter Negative supply voltage Negative supply current Positive supply voltage Positive supply current Positive supply voltage Positive supply current Power dissipation Common mode LVDS input voltage Differential LVDS input swing LVDS output differential voltage LVDS differential input impedance LVTTL input voltage LVTTL input high voltage LVTTL input current LVTTL input high current LVTTL output voltage LVTTL output high voltage LVPECL differential input voltage swing Condition Symbol LVDSVI LVDSVIDTH LVDSVOD LVDSRIN LVTTLVIL LVTTLVIH LVTTLIIL LVTTLIIH LVTTLVOL LVTTLVOH LVPECL VDIF 4.94 3.13 4.75 Typical 5.45 1300 3.47 2000 5.25 1700 Unit mVpp Total -500 Note -100 Note Note Peak peak single ended voltage. Note Internally coupled parameters specified End-of-Life within overall relevant operating temperature range. typical values referenced nominal power supply, beginning life. Outline drawing Framer Transceiver clocking TxREFCLK Clocking definition TxREFCLK SDH/SONET Framer TxDin TxPICLK TxPCLK STM-64/OC-192 SERDES Transmitter Reference Clock Input: Differential clock PECL compatible input, internally coupled with terminated. Transmitter Parallel Data Input: Differencial Mbit/s LVDS input, internally differential terminated. Transmitter Reference Parallel Clock Input: Differencial clock LVDS input, internally differential terminated. Transmitter Reference Parallel Clock Output: Differencial clock LVDS output. Receiver Parallel Data Output: Differencial Mbit/s LVDS output. Receiver Reference Parallel Clock Output: Differential clock LVDS output. Receiver Reference Clock Input: Differencial clock PECL compatible input. TxDin TxPICLK TxPCLK RxDout RxDout RxPOCLK RxPIOLK RxREFCLK RxREFCLK from customer line card Rx+5VA Rx+5VA Rx3.3VA Rx3.3VA RxRESET Rx-5.2VA Rx-5.2VA Rx-5.2VA Rx-5.2VA Tx+5VA Tx+5VA Tx3.3VA Tx3.3VA Tx3.3VA Tx3.3VA TxRESET Tx-5.2VA Tx-5.2VA Tx-5.2VA Tx-5.2VA FGND FGND FGND FGND RxAGND RxAGND RxAGND RxAGND RxAGND RxAGND TxAGND TxAGND TxAGND TxAGND TxAGND TxAGND FGND FGND FGND FGND RxDout12P RxDout12N RxDigGND RxDout13P RxDout13N RxDigGND RxDout14P RxDout14N RxDigGND RxDout15P RxDout15N RxDigGND RxDigGND TxDin12P TxDin12N TxDigGND TxDin13P TxDin13N TxDigGND TxDin14P TxDin14N TxDigGND TxDin15P TxDin15N TxDigGND TxPICLKP TxPICLKN TxDigGND RxLOPMON Rx3.3VD Rx3.3VD Rx3.3VD Rx3.3VD Rx-5.2VD Rx-5.2VD Rx-5.2VD Rx-5.2VD LsBIASMON Tx3.3VD Tx3.3VD LsENABLE Tx3.3VD Tx3.3VD LsBIASALM Tx-5.2VD Tx-5.2VD LsTEMPALM Tx-5.2VD Tx-5.2VD TxREFSEL0 RxDout8P RxDout8N RxDigGND RxDout9P RxDout9N RxDigGND RxDout10P RxDout10N RxDigGND RxDout11P RxDout11N RxDigGND RxPOCLKP RxPOCLKN RxDigGND TxDin8P TxDin8N TxDigGND TxDin9P TxDin9N TxDigGND TxDin10P TxDin10N TxDigGND TxDin11P TxDin11N TxDigGND TxPCLKP TxPCLKN TxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND TxDigGND TxDigGND LsPOWMON TxDigGND TxDigGND LsTEMPMON TxDigGND TxDigGND TxDigGND TxDigGND TxDigGND TxDigGND RxDout4P RxDout4N RxDigGND RxDout5P RxDout5N RxDigGND RxDout6P RxDout6N RxDigGND RxDout7P RxDout7N RxDigGND RxMCLKP RxMCLKN RxDigGND TxDin4P TxDin4N TxDigGND TxDin5P TxDin5N TxDigGND TxDin6P TxDin6N TxDigGND TxDin7P TxDin7N TxDigGND Tx155MCKP Tx155MCKN TxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxDigGND RxLCKREFN RxDigGND RxDigGND RxDigGND RxDigGND RxLOCKERR TxDigGND TxDigGND TxSKEWSEL0 TxDigGND TxDigGND TxSKEWSEL1 TxDigGND TxDigGND TxPCLKSEL TxDigGND TxDigGND TxPICLKSEL TxDigGND TxDigGND TxLOCKERR RxDout0P RxDout0N RxDigGND RxDout1P RxDout1N RxDigGND RxDout2P RxDout2N RxDigGND RxDout3P RxDout3N RxDigGND RxREFCLKP RxREFCLKN RxDigGND TxDin0P TxDin0N TxDigGND TxDin1P TxDin1N TxDigGND TxDin2P TxDin2N TxDigGND TxDin3P TxDin3N TxDigGND TxREFCLKP TxREFCLKN TxDigGND Receiver Transmitter Receiver power supplies Receiver d.c. signals differential signals Transmitter power supplies Transmitter d.c. signals differential signals User Connection Determined (spare) Reserve Future Internal Connection Receiver description RxDout##P RxREFCLKN Receiver Data Output Positive: Mbit/s LVDS output signal. Data RxMCLKP synchronized output module with output clock RxPOCLK signal. RxDout15 most significant RxMCLKN first received. RxLOCKERR Receiver Loss Clock Error: LVTTL output alarm. logic when clock recovery locked onto optical data stream. logic high Receiver Monitor Clock Positive: normal operation. LVDS output signal. Reserve Future Use. This signal represents clock. Determined. Receiver Monitor Output Clock Negative: LVDS output signal. This signal represents clock. Receiver Lock Clock Reference: LVTTL input command. Selects reference frequency mode RxPOCLK. When logic low, RxPOCLK forced lock RxREFCLK. When logic high, RxPOCLK locked reference clock. Receiver deserializer RESET: LVTTL input command. When logic low, deserializer function reinitialized. Receiver Loss Power Monitoring: analog output monitor. This voltage proportional mean optical input power. Typical slope from guaranteed overload guaranteed sensitivity. User Connection. Internal Connection Receiver Reference Clock Negative: PECL compatible, internally coupled terminated. RxDout##N Receiver Data Output Negative: Mbit/s LVDS output signal. Data RxLCKREF synchronized output module with output clock RxPOCLK signal. RxDout15 most significant first received. RxPOCLKP Receiver Parallel Output Clock Positive: LVDS output. Regenerated clock synchronized data. falling edge RxRESET RxPOCLKP middle data pattern. Receiver Parallel Output Clock Negative: output RxLOPMon signal. Regenerated clock synchronized data. rising edge RxPOCLKN middle data pattern. Receiver Reference Clock Positive: PECL, compatible, internally coupled terminated. RxPOCLKN RxREFCLKP Transmitter description TxDin##P TxREFCLKN TxDin##N Transmitter Data Input Positive: Mbit/s LVDS input signal. Data retimed input module input clock TxPICLK signal. TxDin15 most significant first transmitted TxMCLKP Transmitter Data Input Negative: Mbit/s LVDS input signal. Data retimed input module input clock TxPICLK signal. TxMCLKN TxDin15 most significant first transmitted. Transmitter Parallel Input Clock Positive: LVDS input signal. When TxPICLKSEL TxPICLKSEL logic low, frequency rising edge TxPICLKN middle data pattern. When TxPICLKSEL logic high, frequency rising/falling edges TxREFSEL0 TxPICLKN middle data crossing point. Transmitter Reference Clock LsTEMPALM Laser Temperature Alarm: Negative: LVTTL output alarm. When PECL compatible input logic low, laser temperature signal. When TxREFSEL0 approximately above logic low, frequency below normal operating. MHz. When RxREFSEL0 When logic high, laser logic high, frequency normal operating. MHz. LsBIASMon Laser Bias Monitoring: analog Transmitter Monitor Clock output monitor. This voltage Positive: LVDS clock proportional laser output signal. This signal current. typical slope represents synthesized frequency serializer. LsPOWMon Laser Power Monitoring: Transmitter Monitor Clock Negative: LVDS clock output signal. This signal represents synthesized frequency serializer. analog output monitor. This voltage proportional laser output power. Normalized beginning life, drift output power correlates variation output voltage. TxPICLKP Transmitter Parallel Clock Select: LVTTL input command. Selects reference frequency LsTEMPMon Laser temperature Monitoring: mode TxPICLK. When analog output monitor. This logic low, frequency voltage represents laser MHz. When logic temperature deviation. high, frequency Normalized beginning MHz. life Transmitter Reference clock Select LVTTL input command. Selects reference frequency mode TxREFCLK. When logic low, frequency MHz. When logic high, frequency MHz. Reserved further additional features. defined. User Connection. This left open. Internal Connection. Allows optional feature. TxPICLKN TxPCLKP TxPCLKN TxREFCLKP Transmitter Parallel Input Clock Negative: LVDS input signal. When TxPICLKSEL logic low, frequency falling edge TxSKEWSEL0 Transmitter Adjusts Skew TxPICLKN middle TxPICLK Select: LVTTL input data pattern. When command. This digital logic TxPICLKSEL logic high, input allows delaying internally frequency TxPICLK falling edge mode. TxPICLKN middle TxSKEWSEL1 Transmitter Adjusts Skew data crossing point. TxPICLK Select: LVTTL input Transmitter Parallel Clock command. This digital output Positive: LVDS logic input allows delaying output signal. Reference clock internally TxPICLK generated from TxREFCLK mode. signal. Usable synchronize TxRESET Transmitter serializer RESET: output data stage LVTTL input command. When framer ASIC. logic low, serializer Transmitter Parallel Clock function reinitialized. output Negative: Laser Enable: LVTTL input LVDS output signal. Reference LsENABLE command. When logic high, clock generated from laser disabled. When TxREFCLK signal. Usable logic low, laser enabled. synchronize output data stage framer ASIC. TxLOCKERR Transmitter Lock Error: LVTTL output alarm. When logic Transmitter Reference Clock low, indicates that Positive: serializer locked PECL compatible input signal. TxREFCLK. When logic high, When TxREFSEL0 logic serializer normal low, frequency MHz. operating. When RxREFSEL0 logic high, frequency LsBIASALM Laser Bias Alarm: LVTTL output MHz. alarm. When logic low, laser reached life condition. When logic high, laser normal operating. Absolute maximum ratings Parameter Symbol Maximum optical output power Maximum optical input power Negative supply voltage Positive supply voltage Positive supply voltage Control input voltage Digital output voltage Analog output voltage Alarm output voltage Storage temperature TSTG Storage Operating case temperature Unit September 2000 Copyright 2000 Alcatel Optronics Customized versions available large quantities. Performance figures contained this document must specifically confirmed writing Alcatel Optronics before they become applicable particular order contract. Alcatel Optronics reserves right make changes products information contained herein without notice. Ordering information Alcatel 1964 I-64.2 SR-2 S-64.2 IR-2 Options xxxxx Dispersion (ps/nm) FC/PC SC/PC Span (km) Part Number 00468 00434 With heat sink Without heat sink Standards Compliant with ITU-T G.691 Telcordia GR-1377-CORE Optical Interworking Forum OIF99.102 Optical fiber according ITU-T G.652 Environment according 68-2 Telcordia TR-EOP-000063 EUROPE Route Villejust F-91625 NOZAY CEDEX (+33) (+33) 12030 Sunrise Valley Drive RESTON 22091-3495 (+1) 3922 (+1) 1183 CANADA Villebois, suite Gatineau (PQ) Canada, (+1) 3922 (+1) 1183 JAPAN Dai-Tokyo Kasai Shinjuku Building 3-25-3, Yoyogi, Shibuya-Ku TOKYO 0053 (+81) 5302 4341 (+81) 5302 4331 LASER RADIATION AVOID EXPOSURE BEAM Class laser product ATTENTION OBSERVE PRECAUTIONS HANDLING ELECTROSTATIC DISCHARGE SENSITIVE DEVICES Other recent searchesUPF2010 - UPF2010 UPF2010 Datasheet UF1501 - UF1501 UF1501 Datasheet UF1507 - UF1507 UF1507 Datasheet TMPL001 - TMPL001 TMPL001 Datasheet SUP90N08-4m8P - SUP90N08-4m8P SUP90N08-4m8P Datasheet SOP-16 - SOP-16 SOP-16 Datasheet PME290 - PME290 PME290 Datasheet KSC815 - KSC815 KSC815 Datasheet KSA539 - KSA539 KSA539 Datasheet HY5V66D - HY5V66D HY5V66D Datasheet A3952S - A3952S A3952S Datasheet
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