µPD789046 8-BIT SINGLE-CHIP MICROCONTROLLER µPD789046 µPD789

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µPD789046 8-BIT SINGLE-CHIP MICROCONTROLLER µPD789046 µPD789

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INTEGRATED CIRCUIT
µPD789046
8-BIT SINGLE-CHIP MICROCONTROLLER
µPD789046 µPD789046 Subseries (small-scale, general-purpose applications) product 78K/0S Series. flash memory version (µPD78F9046) that operate within same power supply voltage range mask version, various development tools being developed. Detailed function descriptions provided following user's manuals. sure read them before designing. U13600E µPD789046 Subseries User's Manual: 78K/0S Series Instructions User's Manual: U11047E
FEATURES
Internal ROM: Kbytes Internal high-speed RAM: bytes Minimum instruction execution time changed from high-speed (0.4 5.0-MHz operation with main system clock) ultra-low-speed (122 32.768-kHz operation with subsystem clock) ports: Serial interface: channel Switchable between 3-wire serial UART modes Timer: channels 16-bit timer counter: channel 8-bit timer/event counter: channel Watch timer: channel Watchdog timer: channel Vectored interrupt source: Power supply voltage: Operating ambient temperature: +85°C
APPLICATIONS
Cordless phones, etc.
ORDERING INFORMATION
Part Number Package 44-pin plastic LQFP
Remark indicates code suffix.
information this document subject change without notice. Before using this document, please confirm that this latest version.
devices/types available every country. Please check with local representative availability additional information.
Document U13380EJ1V0DS00 (1st edition) Date Published July 1999 CP(K) Printed Japan
mark
shows major revised points.
1998, 1999
µPD789046
78K/0S SERIES LINEUP
products 78K/0S Series listed below. names enclosed boxes subseries names.
mass-production Under development small-scale, generalpurpose applications 44-pin 42/44-pin 28-pin
µPD789046 µPD789026 µPD789014
PD789026 with internal subsystem clock PD789014 with enhanced timer expanded On-chip UART capable low-voltage (1.8 operation
small-scale, generalpurpose applications function 44/48-pin 44/48-pin 44-pin 44-pin 30-pin 30-pin 28/30-pin 28/30-pin 28/30-pin 28/30-pin
µPD789217AY µPD789197AY µPD789177 µPD789167 µPD789156 µPD789146 µPD789134A µPD789124A µPD789114A µPD789104A
oscillation version PD789197AY PD789177 with internal EEPROMand PD789167 with enhanced converter PD789104A with enhanced timer PD789146 with enhanced converter PD789104A with EEPROM PD789124A with enhanced converter oscillation version µPD789104A PD789104A with enhanced converter PD789026 with converter multiplier
inverter control 44-pin 78K/0S Series 88-pin 80-pin 80-pin 64-pin 64-pin 64-pin 64-pin 64-pin 64-pin
µPD789842
On-chip inverter control circuit UART
driving
µPD789830 µPD789417A µPD789407A µPD789457 µPD789447 µPD789437 µPD789427 µPD789316 µPD789306
ASSP
On-chip UART
PD789407A with enhanced converter PD789457 with enhanced PD789447 with enhanced converter oscillation version µPD789427 PD789427 with enhanced converter PD789306 with converter oscillation version PD789306 Basic subseries driving
42/44-pin 44-pin 20-pin 20-pin
µPD789800 µPD789840 µPD789861 PD789860
keyboard, on-chip function pad, on-chip oscillation version µPD789860 keyless entry, on-chip return circuit
card 5-pin
µPD789810
On-chip EEPROM security circuit
Data Sheet U13380EJ1V0DS00
µPD789046
major functional differences among subseries listed below.
Function Subseries Name Small-scale, µPD789046 generalpurpose applications Timer 8-bit 16-bit Watch UART: SMB: oscillation version, on-chip EEPROM Min. Value
Capacity
8-bit
10-bit
Serial Interface
Remarks
(UART:
µPD789026 µPD789014
Small-scale, µPD789217AY generalpurpose applications function
µPD789197AY
On-chip EEPROM
µPD789177 µPD789167 µPD789156 µPD789146 µPD789134A µPD789124A µPD789114A µPD789104A
Inverter control driving Note
(UART:
On-chip EEPROM oscillation version
µPD789842
(UART:
µPD789830 µPD789417A µPD789407A µPD789457 µPD789447 µPD789437 µPD789427 µPD789316
(UART:
(UART:
oscillation version
oscillation version
µPD789306
ASSP
(USB: oscillation version
µPD789800 µPD789840 µPD789861
µPD789860
card
On-chip EEPROM
µPD789810
Note 10-bit timer: channel
Data Sheet U13380EJ1V0DS00
µPD789046
OVERVIEW FUNCTIONS
Item Internal memory High-speed Minimum instruction execution time Kbytes bytes 0.4/1.6 5.0-MHz operation with main system clock) 32.768-kHz operation with subsystem clock) General-purpose registers Instruction bits registers 16-bit operation manipulation (set, reset, test), etc. CMOS input/output: Switchable between 3-wire serial UART modes: channel Maskable Non-maskable Internal: external: Internal: +85°C 44-pin plastic LQFP 16-bit timer counter: 8-bit timer/event counter: Watch timer: Watchdog timer: channel channel channel channel Function
ports Serial interface Timers
Timer output Vectored interrupt sources Power supply voltage Operating ambient temperature Package
Data Sheet U13380EJ1V0DS00
µPD789046
CONTENTS
CONFIGURATION (Top View) BLOCK DIAGRAM. FUNCTIONS.
Port Pins. Non-Port Pins.
Circuits Recommended Connection Unused Pins
MEMORY SPACE PERIPHERAL HARDWARE FUNCTIONS
Ports Clock Generator. Timers. Serial Interface.
INTERRUPT FUNCTIONS STANDBY FUNCTIONS RESET FUNCTIONS. INSTRUCTION OVERVIEW.
Legend. Operations.
ELECTRICAL SPECIFICATIONS. CHARACTERISTICS CURVES PACKAGE DRAWING RECOMMENDED SOLDERING CONDITIONS. APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS.
Data Sheet U13380EJ1V0DS00
µPD789046
CONFIGURATION (Top View)
44-pin plastic LQFP
VDD1
VSS1
P47/KR07 P46/KR06 P45/KR05 P44/KR04 P43/KR03 P42/KR02 P41/KR01 P40/KR00
P20/SCK20/ASCK20 P21/SO20/TxD20 P22/SI20/RxD20 P23/SS20 P24/INTP0 P25/INTP1 P26/INTP2/CPT90
Caution Connect (Internally Connected) directly VSS0 VSS1 pin. ASCK20: BZO90: CPT90: IC0: KR00 KR07: P07: P17: P27: P30, P31: P47: RESET: Asynchronous Serial Input Buzzer Output Capture Trigger Input Internally Connected Return Port Port Port Port Port Reset RxD20: SCK20: SI20: SO20: SS20: TI80: TxD20: VDD0, VDD1: VSS0, VSS1: XT1, XT2: Receive Data Serial Clock Serial Input Serial Output Chip Select Input Timer Input Transmit Data Power Supply Ground Crystal (Main System Clock) Crystal (Subsystem Clock)
INTP0 INTP2: Interrupt from Peripherals
TO80, TO90: Timer Output
Data Sheet U13380EJ1V0DS00
P27/TI80/TO80
P31/BZO90
P30/TO90
RESET
VDD0
VSS0
µPD789046
BLOCK DIAGRAM
8-bit timer/event counter 16-bit timer counter Port
TI80/TO80/P27 CPT90/INTP2/P26 TO90/P30 BZO90/P31
Port
Watch timer
78K/0S core
Port
Watchdog timer
Port
P30,
SCK20/ASCK20/P20 SO20/TxD20/P21 Sl20/RxD20/P22 SS20/P23
Port SIO20
INTP0/P24 INTP1/P25 INTP2/CPT90/P26 KR00/P40 KR07/P47
System control Interrupt control
VDD0 VDD1 VSS0 VSS1
RESET
Data Sheet U13380EJ1V0DS00
µPD789046
FUNCTIONS
Port Pins
Name Function Port 8-bit input/output port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Port 8-bit input/output port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Port 8-bit input/output port Input/output specified 1-bit units. on-chip pull-up resistor specified means software. After Reset Input Alternate Function
Input
Input
SCK20/ASCK20 SO20/TxD20 SI20/RxD20 SS20 INTP0 INTP1 INTP2/CPT90 TI80/TO80
Port 2-bit input/output port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Port 8-bit input/output port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software.
Input
TO90
BZO90
Input
KR00 KR07
Data Sheet U13380EJ1V0DS00
µPD789046
Non-Port Pins
Name INTP0 INTP1 INTP2 KR00 KR07 SI20 SO20 SCK20 SS20 ASCK20 RxD20 TxD20 TI80 TO80 TO90 BZO90 CPT90 VDD0 VDD1 VSS0 VSS1 RESET Input Input Output Input Input Input Output Input Output Output Output Input Input Input Input Positive power supply ports Positive power supply except ports Ground potential ports Ground potential except ports System reset input Internally connected. Connect directly VSS0 VSS1. Input Detection return signal Serial interface serial data input Serial interface serial data output Serial interface serial clock input/output Serial interface chip select input Asynchronous serial interface serial clock input Asynchronous serial interface serial data input Asynchronous serial interface serial data output External count clock input 8-bit timer (TM80) 8-bit timer (TM80) output 16-bit timer (TM90) output 16-bit timer (TM90) buzzer output Capture edge input Connecting crystal resonator main system clock oscillation Connecting crystal resonator subsystem clock oscillation Input Input Input Input Input Input Input Input Input Input Input Input Input Input Function External interrupt input which valid edge (rising edge, falling edge, both rising falling edges) specified After Reset Input Alternate Function P26/CPT90 P22/RxD20 P21/TxD20 P20/ASCK20 P20/SCK20 P22/SI20 P21/SO20 P27/TO80 P27/TI80 P26/INTP2
Data Sheet U13380EJ1V0DS00
µPD789046
Circuits Recommended Connection Unused Pins input/output circuit type each recommended connection unused pins shown Table 3-1. input/output circuit configuration each type, refer Figure 3-1. Table 3-1. Types Input/Output Circuits Recommended Connection Unused Pins
Name P20/SCK20/ASCK20 P21/SO20/TxD20 P22/SI20/RxD20 P23/SS20 P24/INTP0 P25/INTP1 P26/INTP2/CPT90 P27/TI80/TO80 P30/TO90 P31/BZO90 P40/KR00 P47/KR07 RESET Input Input Connect directly VSS0 VSS1. Connect VSS0 VSS1. Leave open. Circuit Type Recommended Connection Unused Pins Input: Independently connect VDD0, VDD1, VSS0, VSS1 resistor. Output: Leave open.
Data Sheet U13380EJ1V0DS00
µPD789046
Figure 3-1. Input/Output Circuits
Type Type VDD0
Pull-up enable Data Schmitt-triggered input with hysteresis characteristics VDD0 P-ch
P-ch
IN/OUT Output disable N-ch VSS0
Type Pull-up enable VDD0 Data
VDD0
P-ch
P-ch IN/OUT
Output disable
N-ch VSS0
Input enable
Data Sheet U13380EJ1V0DS00
µPD789046
MEMORY SPACE
µPD789046 access Kbytes memory space. Figure shows memory map. Figure 4-1. Memory
FFFFH Special function register bits FF00H FEFFH Internal high-speed bits FD00H FCFFH Reserved 4000H 3FFFH Program area 3FFFH
Data memory space
Program memory space
Internal 16,384 bits
0080H 007FH CALLT table area 0040H 003FH 001AH 0019H Program area Vector table area 0000H
0000H
Data Sheet U13380EJ1V0DS00
µPD789046
PERIPHERAL HARDWARE FUNCTIONS
Ports µPD789046 provided with following ports various controls available. Table 5-1. Port Functions
Port Name Port Name Function Input/output port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Input/output port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Input/output port. Input/output specified 1-bit units. on-chip pull-up resistor specified means software. Input/output port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software. Input/output port. Input/output specified 1-bit units. When used input port, on-chip pull-up resistor specified means software.
Port
Port
Port
P30,
Port
Clock Generator system clock generator incorporated. minimum instruction execution time changed. µs/1.6 5.0-MHz operation with main system clock) 32.768-kHz operation with subsystem clock) Figure 5-1. Clock Generator Block Diagram
Subsystem clock oscillator
Watch timer 16-bit timer counter
Prescaler
Main system clock oscillator
Clock peripheral hardware Prescaler
Selector
Standby control circuit
Wait control circuit
clock (fCPU)
STOP
Data Sheet U13380EJ1V0DS00
µPD789046
Timers Four timer channels incorporated. 16-bit timer counter (TM90): Watch timer (WT): Watchdog timer (WDT): channel channel channel Table 5-2. Operations Timers
TM90 Operation mode Interval timer External event counter Function Timer output Square wave output output Buzzer output Capture Interrupt request output output input TM80 channel channel output output output channel channel
8-bit timer/event counter (TM80): channel
Figure 5-2. Block Diagram 16-Bit Timer Counter
Internal
16-bit compare register (CR90) Match
Output control circuit
TO90/P30
INTTM90 fX/24 fX/26 CPT90/P26 /INTP2
Selector
fX/22
Edge detection circuit
16-bit capture register (TCP90)
16-bit counter read buffer
Internal
Data Sheet U13380EJ1V0DS00
Selector
16-bit timer register (TM90)
Output control circuit
BZO90/P31
µPD789046
Figure 5-3. Block Diagram 8-Bit Timer/Event Counter
Internal
8-bit compare register (CR80) Match INTTM80
Selector
fX/28 TI80/P27/ TO80
8-bit timer register (TM80)
Output control circuit
TO80/P27/ TI80
Clear
Internal
Figure 5-4. Watch Timer Block Diagram
Clear
Selector
fX/2
9-bit prescaler
Selector
5-bit counter Clear
INTWT
INTWTI
WTM0Note
Note watch timer mode control register (WTM) Figure 5-5. Watchdog Timer Block Diagram
Prescaler RUNNote Clear INTWDT maskable interrupt request Control circuit RESET INTWDT non-maskable interrupt request
Selector
7-bit counter
Note watchdog timer mode register (WDTM)
Data Sheet U13380EJ1V0DS00
µPD789046
Serial Interface serial interface channel incorporated. Serial interface following three types modes. Operation stop mode: 3-wire serial mode: reduce power consumption Switchable between MSB-first LSB-first transmission
Asynchronous serial interface (UART) mode: On-chip dedicated baud rate generator Figure 5-6. Serial Interface Block Diagram
Internal
Receive buffer register (RXB20/SIO20)
Transmit shift register (TXS20/SIO20)
SI20/P22/RXD20
Receive shift register (RXS20)
Data phase control
Selector
SO20/P21/TXD20
Transmit data counter Transmit data counter INTSR20/INTCSI20
INTST20
SS20/P23
Baud rate generator ASCK20/P20 /SCK20 Clock phase control
fX/2 fX/28
Data Sheet U13380EJ1V0DS00
µPD789046
INTERRUPT FUNCTIONS
total interrupt sources provided, divided into following types. Non-maskable: Maskable: Table 6-1. Interrupt Sources
Interrupt Source Internal/External Name Nonmaskable INTWDT Trigger Watchdog timer overflow (with watchdog timer mode selected) Watchdog timer overflow (with interval timer mode selected) input edge detection External 0006H 0008H 000AH serial interface UART reception serial interface 3-wire transfer reception serial interface UART transmission Watch timer interrupt Interval timer interrupt Generation matching signal 8-bit timer/event counter Generation matching signal 16-bit timer counter Detection return signal External 000EH Internal 000CH Internal
Interrupt Type Priority
Note
Vector Table Basic Configuration Note Address Type 0004H
Maskable
INTWDT
INTP0 INTP1 INTP2 INTSR20
INTCSI20
INTST20
INTWT INTWTI INTTM80
0010H 0012H 0014H
INTTM90
0016H
INTKR00
0018H
Notes Priority priority order when several maskable interrupts generated same time. highest order lowest order. Basic configuration types correspond Figure 6-1.
Data Sheet U13380EJ1V0DS00
µPD789046
Figure 6-1. Basic Configuration Interrupt Functions Internal non-maskable interrupt
Internal
Interrupt request
Vector table address generator
Standby release signal
Internal maskable interrupt
Internal
Interrupt request
Vector table address generator
Standby release signal
External maskable interrupt
Internal
INTM0, KRM00
Interrupt request
Edge detection circuit
Vector table address generator
Standby release signal
INTM0: External interrupt mode register KRM00: return mode register Interrupt request flag Interrupt enable flag Interrupt mask flag
Data Sheet U13380EJ1V0DS00
µPD789046
STANDBY FUNCTIONS
following standby functions available further reduction system current consumption. HALT mode: this mode, operation clock stopped. average current consumption reduced intermittent operation combining this mode with normal operation mode. STOP mode: this mode, oscillation main system clock stopped. operations performed main system clock suspended, resulting extremely small current consumption. Figure 7-1. Standby Functions
Note
CSS0 Main system clock operation
Subsystem clock operationNote
CSS0Note HALT instruction HALT instruction
Interrupt request
STOP instruction
Interrupt request HALT mode (Clock supply halted, oscillation maintained)
Interrupt request HALT mode (Clock supply halted, oscillation maintained)
STOP mode (Main system clock oscillation stopped)
Notes subclock control register (CSS) current consumption reduced stopping main system clock. When operating subsystem clock, (MCC) processor clock control register (PCC) stop main system clock. STOP instruction cannot used. Caution When main system clock stopped device operating subsystem clock, wait until oscillation stabilization time been secured program before switching back main system clock.
RESET FUNCTIONS
following reset methods available. External reset RESET signal input Internal reset watchdog timer runaway time detection
Data Sheet U13380EJ1V0DS00
µPD789046
INSTRUCTION OVERVIEW
instruction µPD789046 listed later. Legend 9.1.1 Operand formats descriptions
description made operand field each instruction conforms operand format instructions listed below (the details conform with assembler specification). more than operand format listed instruction, selected. Uppercase letters, pair used specify keywords, which must written exactly they appear. meanings these special characters follows: Immediate data specification Relative address specification Absolute address specification Indirect address specification Immediate data should described using appropriate values labels. specification values labels must accompanied pair Operand registers, expressed formats, described using both functional names etc.) absolute names (R0, other names listed Table 9-1). Table 9-1. Operand Formats Descriptions
Format saddr saddrp addr16 addr5 word byte Description (R0), (R1), (R2), (R3), (R4), (R5), (R6), (R7) (RP0), (RP1), (RP2), (RP3) Special function register symbol FE20H FF1FH: Immediate data label FE20H FF1FH: Immediate data label (even addresses only) 0000H FFFFH: Immediate data label (only even addresses 16-bit data transfer instructions) 0040H 007FH: Immediate data label (even addresses only) 16-bit immediate data label 8-bit immediate data label 3-bit immediate data label
Data Sheet U13380EJ1V0DS00
µPD789046
9.1.2 NMIS Descriptions operation field register; 8-bit accumulator register register register register register register register register pair; 16-bit accumulator register pair register pair register pair Program counter Stack pointer Program status word Carry flag Auxiliary carry flag Zero flag Interrupt request enable flag Flag indicate that non-maskable interrupt being handled Contents memory location indicated parenthesized address register Logical product (AND) Logical (OR) Exclusive Inverted data
Higher lower bits 16-bit register
addr16 16-bit immediate data label jdisp8 Signed 8-bit data (displacement value) 9.1.3 Descriptions flag operation field cleared cleared according result restored previous value
(blank) change
Data Sheet U13380EJ1V0DS00
µPD789046
Operations
Flag Mnemonic #byte saddr, #byte sfr, #byte saddr saddr, sfr, !addr16 !addr16, PSW, #byte PSW, [DE] [DE], [HL] [HL], byte] byte], saddr [DE] [HL] byte] MOVW #word saddrp saddrp,
Note Note Note Note Note
Operand
Byte
Clock byte (saddr) byte byte (saddr) (saddr) (addr16) (addr16) byte (DE) (DE) (HL) (HL) byte) byte) (saddr) (sfr) (DE) (HL) byte) word (saddrp) (saddrp)
Operation
Notes Except when Except when Only when Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13380EJ1V0DS00
µPD789046
Flag Mnemonic XCHW #byte saddr, #byte saddr !addr16 [HL] byte] ADDC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] SUBC #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] Operand
Note
Byte
Clock byte
Operation
(saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr), (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte)
Note Only when Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13380EJ1V0DS00
µPD789046
Flag Mnemonic #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] #byte saddr, #byte saddr !addr16 [HL] byte] ADDW SUBW CMPW #word #word #word saddr saddr INCW DECW RORC ROLC Operand Byte Clock byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) (saddr) byte (saddr) (addr16) (HL) byte) byte (saddr) byte (saddr) (addr16) (HL) byte) word word word rr+1 (saddr) (saddr) rr-1 (saddr) (saddr) (CY, Am-1 (CY, Am+1 Am-1 Am+1 Operation
Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13380EJ1V0DS00
µPD789046
Flag Mnemonic SET1 saddr. sfr. PSW. [HL]. CLR1 saddr. sfr. PSW. [HL]. SET1 CLR1 NOT1 CALL !addr16 Operand Byte Clock (saddr. bit) sfr. PSW. (HL). (saddr. bit) sfr. PSW. (HL). 3)H, 3)L, addr16, 1)H, 1)L, (00000000, addr5 (00000000, addr5), (SP), (SP), NMIS PSW, rpH, rpL, (SP), (SP), addr16 jdisp8 Operation
CALLT
[addr5]
RETI
PUSH
MOVW
!addr16 $addr16
Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13380EJ1V0DS00
µPD789046
Flag Mnemonic $addr16 $addr16 $addr16 $addr16 saddr. bit, $addr16 Operand Byte Clock Operation jdisp8 jdisp8 jdisp8 jdisp8 jdisp8 (saddr. bit) jdisp8 sfr. jdisp8 jdisp8 PSW. jdisp8 (saddr. bit) jdisp8 sfr. jdisp8 jdisp8 PSW. then jdisp8 then jdisp8 (saddr) (saddr) then jdisp8 (saddr) Operation (Enable Interrupt) (Disable Interrupt) HALT Mode STOP Mode
sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 saddr. bit, $addr16
sfr. bit, $addr16 bit, $addr16 PSW. bit, $addr16 DBNZ $addr16
$addr16
saddr, $addr16
HALT STOP
Remark instruction clock cycle based clock (fCPU), specified processor clock control register (PCC).
Data Sheet U13380EJ1V0DS00
µPD789046
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltage Input voltage Output voltage Output current, high Symbol Total pins Output current, Total pins Operating ambient temperature Storage temperature Tstg Conditions Ratings -0.3 +6.5 -0.3 -0.3 +150 Unit
Caution Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded. Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U13380EJ1V0DS00
µPD789046
Main System Clock Oscillator Characteristics +85°C,
Resonator Ceramic resonator Recommended Circuit Parameter Oscillation frequency (fX)
Note
Conditions oscillation voltage range After reaches oscillation voltage range MIN.
MIN.
TYP.
MAX.
Unit
Oscillation stabilization time
Note
Crystal resonator
Oscillation frequency (fX)
Note
Oscillation stabilization time
Note
External clock
input frequency (fX)
Note
input high-/low-level width (tXH, tXL)
input frequency (fX)
Note
OPEN
input high-/low-level width (tXH, tXL)
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. stabilizes oscillation within oscillation wait time. Cautions When using main system clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS0. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped device operating subsystem clock, wait until oscillation stabilization time been secured program before switching back main system clock. resonator that
Data Sheet U13380EJ1V0DS00
µPD789046
Subsystem Clock Oscillator Characteristics +85°C,
Resonator Crystal resonator
Recommended Circuit
Parameter Oscillation frequency (fXT)
Note
Conditions
MIN.
TYP. 32.768
MAX.
Unit
Oscillation stabilization time
Note
External clock
input frequency (fXT)
Note
input high-/low-level width (tXTH, tXTL)
14.3
15.6
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. stabilizes oscillation within oscillation wait time. Cautions When using subsystem clock oscillator, wire follows area enclosed broken lines above figure avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS0. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. subsystem clock oscillator designed low-amplitude circuit reducing current consumption, more prone malfunction noise than main system clock oscillator. Particular care therefore required with wiring method when subsystem clock used. resonator that
Data Sheet U13380EJ1V0DS00
µPD789046
Characteristics +85°C,
Parameter Output current, high Output current, Symbol Total pins Total pins Input voltage, high VIH1 P07, P17, P30, VIH2 RESET, P27, VIH3 0.7VDD 0.9VDD 0.8VDD 0.9VDD VIH4 XT1, Input voltage, VIL1 P07, P17, P30, VIL2 RESET, P27, VIL3 VIL4 XT1, Output voltage, high Output voltage, Input leakage current, high -100 ILIH1 ILIH2 Input leakage current, ILIL1 ILIL2 Output leakage current, high Output leakage current, Software pull-up resistor ILOH ILOL VOUT VOUT Pins other than XT1, XT1, Pins other than XT1, XT1, Conditions MIN. TYP. MAX. 0.3VDD 0.1VDD 0.2VDD 0.1VDD Unit
Remark
Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U13380EJ1V0DS00
µPD789046
Characteristics +85°C,
Parameter Power supply Note current Symbol IDD1 Conditions 5.0-MHz crystal oscillation operating mode 5.0-MHz crystal oscillation HALT mode 32.768-kHz crystal oscillation Note operating mode 32.768-kHz crystal oscillation Note HALT mode STOP mode
±10% ±10% ±10%
Note
MIN.
TYP. 0.45 0.25 0.15 0.05 0.05 0.05
MAX. 0.45 12.5
Unit
Note
Note
IDD2
±10% ±10% ±10%
Note
Note
Note
IDD3
±10% ±10% ±10%
IDD4
±10% ±10% ±10%
IDD5
±10% ±10%
25°C
±10%
Notes port current (including current flowing through on-chip pull-up resistor) included. When main system clock stopped High-speed mode operation (when processor clock control register (PCC) 00H) Low-speed mode operation (when 02H) Remark Unless specified otherwise, characteristics alternate-function pins same those port pins.
Data Sheet U13380EJ1V0DS00
µPD789046
Characteristics Basic operation +85°C,
Parameter Cycle time (Minimum instruction execution time) TI80 input frequency TI80 input high/low-level width Symbol Conditions Operating with main system clock MIN. tTIH, tTIL TYP. MAX. Unit
Operating with subsystem clock
Interrupt input high- tINTH, tINTL INTP0 INTP2 /low-level width RESET input low-level width tRSL
(main system clock)
Cycle time
Guaranteed operation range
Supply voltage
Data Sheet U13380EJ1V0DS00
µPD789046
Serial interface 3-wire serial mode (SCK20.Internal clock)
Parameter SCK20 cycle time Symbol tKCY1 Conditions MIN. 3,200 SCK20 high-/lowlevel width SI20 setup time SCK20 SI20 hold time (from SCK20 SO20 output delay time from SCK20 tKH1, tKL1 tKCY1/2-50 tKCY1/2-150 tSIK1 tKSI1 tKSO1
Note
TYP.
MAX.
Unit
1,000
Note load resistance load capacitance SO20 output line. 3-wire serial mode (SCK20.External clock)
Parameter SCK20 cycle time Symbol tKCY2 Conditions MIN. 3,500 SCK20 high-/lowlevel width SI20 setup time SCK20 SI20 hold time (from SCK20 SO20 output delay time from SCK20 tKH2, tKL2 1,600 tSIK2 tKSI2 tKSO2
Note
TYP.
MAX.
Unit
1,000
Note load resistance load capacitance SO20 output line. UART mode (Dedicated baud rate generator output)
Parameter Transfer rate
Symbol
Conditions
MIN.
TYP.
MAX. 78,125 19,531
Unit
Data Sheet U13380EJ1V0DS00
µPD789046
UART mode (External clock input)
Parameter ASCK20 cycle time ASCK20 high-/lowlevel width Transfer rate Symbol tKCY3 Conditions MIN. 3,500 tKH3, tKL3 1,600 39,063 9,766 ASCK20 rise/fall time TYP. MAX. Unit
Data Sheet U13380EJ1V0DS00
µPD789046
Timing Test Points (excluding inputs)
0.8VDD 0.2VDD 0.8VDD 0.2VDD
Test points
Clock Timing
1/fX VIH3 (MIN.) VIL3 (MAX.)
input
1/fXT tXTL tXTH VIH4 (MIN.) VIL4 (MAX.)
input
Timing
1/fTI tTIL tTIH
TI80
Interrupt Input Timing
tINTL tINTH
INTP0 INTP2
RESET Input Timing
tRSL
RESET
Data Sheet U13380EJ1V0DS00
µPD789046
Serial Transfer Timing 3-wire serial mode:
tKCYm tKLm tKHm
SCK20
tSIKm
tKSIm
SI20
Input data
tKSOm
SO20
Output data
Remark
UART mode (external clock input):
tKCY3 tKL3 ASCK20 tKH3
Data Sheet U13380EJ1V0DS00
µPD789046
Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention power supply voltage Release signal time Oscillation stabilization Note wait time Symbol VDDDR Conditions MIN. TYP. MAX. Unit
tSREL tWAIT Release RESET Release interrupt request
Note
Notes Oscillation stabilization wait time time stopping operation prevent unstable operation when oscillation started.
Selection /fX, /fX, possible with bits (OSTS0 OSTS2) oscillation
stabilization time select register (OSTS). Remark Main system clock oscillation frequency
Data Retention Timing (STOP mode release RESET)
Internal reset operation HALT mode STOP mode Data retention mode Operation mode
VDDDR STOP instruction execution
tSREL
RESET
tWAIT
Data Retention Timing (Standby release signal: STOP mode release interrupt signal)
HALT mode STOP mode Data retention mode Operation mode
VDDDR STOP instruction execution
tSREL
Standby release signal (interrupt request) tWAIT
Data Sheet U13380EJ1V0DS00
µPD789046
CHARACTERISTICS CURVES
MHz, 32.768 kHz)
10.0 25°C)
(HALT mode)
(HALT mode)
Supply current (mA)
Subsystem clock operation mode (CSS0
0.05 Subsystem clock operation HALT mode (CSS0
0.01
0.005
Crystal resonator
Crystal resonator 32.768
0.001 Supply voltage
Data Sheet U13380EJ1V0DS00
µPD789046
25°C)
High-level output current (mA)
25°C)
Low-level output current (mA)
Low-level output voltage
Data Sheet U13380EJ1V0DS00
µPD789046
PACKAGE DRAWING
PLASTIC (10x10)
detail lead
NOTE Each lead centerline located within 0.16 true position (T.P.) maximum material condition.
ITEM MILLIMETERS 12.0±0.2 10.0±0.2 10.0±0.2 12.0±0.2 0.37 +0.08 -0.07 (T.P.) 1.0±0.2 0.17 +0.03 -0.06 0.10 1.4±0.05 0.1±0.05 MAX. 0.6±0.15 S44GB-80-8ES-1
Data Sheet U13380EJ1V0DS00
µPD789046
RECOMMENDED SOLDERING CONDITIONS
µPD789046 should soldered mounted under following recommended conditions. details recommended soldering conditions, refer document Semiconductor Device Mounting Technology Manual (C10535E). soldering methods conditions other than those recommended below, contact your sales representative. Table 13-1. Surface Mounting Type Soldering Conditions
µPD789046GB-xxx-8ES: 44-pin plastic LQFP
Recommended Condition Symbol IR35-00-2
Soldering Method Infrared reflow
Soldering Conditions Package peak temperature: 235°C, Time: sec. Max. 210°C higher), Count: times less Package peak temperature: 215°C, Time: sec. Max. 200°C higher), Count: times less Solder bath temperature: 260°C Max., Time: sec. Max., Count: once, Preheating temperature: 120°C Max. (package surface temperature) temperature: 300°C Max., Time: sec. Max. (per row)
VP15-00-2
Wave soldering
WS60-00-1
Partial heating
Caution different soldering methods together (except partial heating).
Data Sheet U13380EJ1V0DS00
µPD789046
APPENDIX DEVELOPMENT TOOLS
following development tools available system development using µPD789046. Language Processing Software
RA78K0S
Notes
Assembler package common 78K/0S Series compiler package common 78K/0S Series Device file µPD789046 Subseries compiler library source file common 78K/0S Series
CC78K0S
Notes
DF789046
Notes
CC78K0S-L
Notes
Flash Memory Writing Tools
Flashpro Note (Part FL-PR3 PG-FP3) FA-44GB-8ES
Note
Flash programmer dedicated on-chip flash memory microcontroller
Flash memory writing adapter 44-pin plastic LQFP (GB-8ES type)
Notes Based PC-9800 series (MS-DOS+ Windows) Based PC/AT compatibles (Japanese/English Windows)
Based HP9000 series 700(HP-UXTM), SPARCstation(SunOSTM, Solaris NEWS
(NEWS-OSTM)
Products made NAITO DENSEI MACHIDA MFG. CO., LTD. (+81-44-822-3813). Contact distributor regarding purchase these products. Remark RA78K0S CC78K0S used combination with DF789046.
Data Sheet U13380EJ1V0DS00
µPD789046
Debugging Tools
IE-78K0S-NS In-circuit emulator This in-circuit emulator used debug hardware software when application systems which 78K/0S Series developed. IE-78K0S-NS supports integrated debugger (ID78K0S-NS). IE-78K0S-NS used combination with interface adapter connection adapter, emulation probe, host machine. This adapter used supply power from outlet.
IE-70000-MC-PS-B adapter IE-70000-98-IF-C Interface adapter IE-70000-CD-IF-A card/interface IE-70000-PC-IF-C Interface adapter IE-70000-PCI-IF Interface adapter IE-789046-NS-EM1 Emulation board NP-44GB Note NP-44GB-TQ SM78K0S
Notes Note
This adapter required when PC-9800 series (except notebook type) used host machine IE-78K0S-NS supported). These card interface cable required when notebook used host machine IE-78K0S-NS (PCMCIA socket supported). This adapter required when PC/AT compatible used host machine IE-78K0S-NS (ISA supported). This adapter required when incorporated personal computer used host machine IE-78K0S-NS. This board used emulate peripheral hardware specific device. IE-789046-NS-EM1 used combination with in-circuit emulator. This board used connect in-circuit emulator target system. board dedicated 44-pin plastic LQFP (GB-8ES type). System simulator common 78K/0S Series Integrated debugger common 78K/0S Series Device file µPD789046 Subseries
ID78K0S-NS DF789046
Notes
Notes
Real-time
MX78K0S
Notes
78K/0S Series
Notes Based PC-9800 series (MS-DOS Windows) Based PC/AT compatibles (Japanese/English Windows) Products made NAITO DENSEI MACHIDA MFG. CO., LTD. (+81-44-822-3813). Contact distributor regarding purchase these products. Remark SM78K0S used combination with DF789046.
Data Sheet U13380EJ1V0DS00
µPD789046
APPENDIX RELATED DOCUMENTS
Documents Related Devices
Document Document Name Japanese English This manual U13546E U13600E U11047E
µPD789046 Data Sheet µPD78F9046 Preliminary Product Information µPD789046 Subseries User's Manual
78K/0S Series Instructions User's Manual
U13380J U13546J U13600J U11047J
Documents Related Development Tools (User's Manuals)
Document Document Name Japanese RA78K0S Assembler Package Operation Assembly Language Structured Assembly Language CC78K0S Compiler Operation Language SM78K0S System Simulator Windows Based SM78K Series System Simulator Reference
External Part User Open Interface Specifications
English U11622E U11599E U11623E
U11622J U11599J U11623J
U11816J U11817J U11489J U10092J
U11816E U11817E U11489E U10092E
ID78K0S-NS Integrated Debugger Windows Based IE-78K0S-NS In-circuit Emulator IE-789046-NS-EM1 Emulation Board
Reference
U12901J U13549J prepared
U12901E U13549E prepared
Documents Related Embedded Software (User's Manuals)
Document Document Name Japanese 78K/0S Series MX78K0S Fundamental U12938J English U12938E
Caution related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U13380EJ1V0DS00
µPD789046
Other Related Documents
Document Document Name Japanese SEMICONDUCTORS SELECTION GUIDE Products Packages (CD-ROM) Semiconductor Device Mounting Technology Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Guide Microcomputer-Related Products Third Party X13769X C10535J C11531J C10983J C11892J U11416J C10535E C11531E C10983E C11892E English
Caution related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U13380EJ1V0DS00
µPD789046
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
EEPROM trademark Corporation. MS-DOS Windows either registered trademarks trademarks Microsoft Corporation United States and/or other countries. PC/AT trademark International Business Machines Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc. NEWS NEWS-OS trademarks Sony Corporation.
Data Sheet U13380EJ1V0DS00
µPD789046
Regional Information
Some information contained this document vary from country country. Before using product your application, pIease contact office your country obtain list authorized representatives distributors. They will verify:
Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements
addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country.
Electronics Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782 Fax: 408-588-6130 800-729-9288
Electronics (Germany) GmbH
Benelux Office Eindhoven, Netherlands Tel: 040-2445845 Fax: 040-2444580
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318 Fax: 2886-9022/9044
Electronics Hong Kong Ltd. Electronics (France) S.A.
Velizy-Villacoublay, France Tel: 01-30-67 Fax: 01-30-67 Seoul Branch Seoul, Korea Tel: 02-528-0303 Fax: 02-528-4411
Electronics (Germany) GmbH
Duesseldorf, Germany Tel: 0211-65 Fax: 0211-65
Electronics (France) S.A. Electronics (UK) Ltd.
Milton Keynes, Tel: 01908-691-133 Fax: 01908-670-290 Spain Office Madrid, Spain Tel: 91-504-2787 Fax: 91-504-2860
Electronics Singapore Pte. Ltd.
United Square, Singapore 1130 Tel: 65-253-8311 Fax: 65-250-3583
Electronics Taiwan Ltd. Electronics Italiana s.r.l.
Milano, Italy Tel: 02-66 Fax: 02-66
Electronics (Germany) GmbH
Scandinavia Office Taeby, Sweden Tel: 08-63 Fax: 08-63
Taipei, Taiwan Tel: 02-2719-2377 Fax: 02-2719-5951
Brasil S.A.
Electron Devices Division Rodovia Presidente Dutra, 07210-902-Guarulhos-SP Brasil Tel: 55-11-6465-6810 Fax: 55-11-6465-6829
J99.1
Data Sheet U13380EJ1V0DS00
µPD789046
related documents indicated this publication include preliminary versions. However, preliminary versions marked such.
export this product from Japan regulated Japanese government. export this product prohibited without governmental license, need which must judged customer. export re-export this product from country other than Japan also prohibited without license from that country. Please call sales representative.
information this document subject change without notice. Before using this document, please confirm that this latest version. part this document copied reproduced form means without prior written consent Corporation. Corporation assumes responsibility errors which appear this document. Corporation does assume liability infringement patents, copyrights other intellectual property rights third parties arising from device described herein other liability arising from such device. license, either express, implied otherwise, granted under patents, copyrights other intellectual property rights Corporation others. Descriptions circuits, software, other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software, information design customer's equipment shall done under full responsibility customer. Corporation assumes responsibility losses incurred customer third parties arising from these circuits, software, information. While Corporation been making continuous effort enhance reliability semiconductor devices, possibility defects cannot eliminated entirely. minimize risks damage injury persons property arising from defect semiconductor device, customers must incorporate sufficient safety measures design, such redundancy, fire-containment, anti-failure features. devices classified into following three quality grades: "Standard", "Special", "Specific". Specific quality grade applies only devices developed based customer designated "quality assurance program" specific application. recommended applications device depend quality grade, indicated below. Customers must check quality grade each device before using particular application. Standard: Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support) Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade devices "Standard" unless otherwise specified NEC's Data Sheets Data Books. customers intend devices applications other than those specified Standard quality grade, they should contact sales representative advance.

µPD789046 8-BIT SINGLE-CHIP MICROCONTROLLER µPD789046 µPD789

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