µPD78P0308, 78P0308Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESC

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µPD78P0308, 78P0308Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESC

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INTEGRATED CIRCUIT
µPD78P0308, 78P0308Y
8-BIT SINGLE-CHIP MICROCONTROLLERS
DESCRIPTION
µPD78P0308 78P0308Y members µPD780308 780308Y Subseries 78K/0 Series, which on-chip mask µPD780308 780308Y replaced with one-time PROM. Because this device programmed users, ideally suited system evaluation, small-scale multiple-device production, early development time-to-market. Detailed function descriptions provided following user's manuals. sure read them before designing.
µPD780308, 780308Y Subseries User's Manual: U11377E
78K/0 Series Instructions User's Manual: U12326E
FEATURES
Pin-compatible with mask version (except pin) Program memory (one-time PROM): KBNote Internal high-speed RAM: Internal expansion RAM: display RAM: Supply voltage: 1024 bytes 1024 bytes bits
Note internal PROM capacity changed setting internal memory size switching register (IMS). Remark Refer DIFFERENCES BETWEEN µPD78P0308, 78P0308Y MASK VERSIONS difference between one-time PROM mask versions.
information this document subject change without notice. Before using this document, please confirm that this latest version.
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Document U11776EJ2V0DS00 (2nd edition) Date Published December 2003 CP(K) Printed Japan
mark
shows major revised points.
1996, 2003
µPD78P0308, 78P0308Y
ORDERING INFORMATION
Part Number Package 100-pin plastic LQFP (fine pitch) 100-pin plastic LQFP (fine pitch) 100-pin plastic 100-pin plastic Internal One-time PROM One-time PROM One-time PROM One-time PROM
µPD78P0308GC-8EU µPD78P0308YGC-8EU µPD78P0308GF-3BA µPD78P0308YGF-3BA
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
78K/0 SERIES LINEUP
products 78K/0 Series listed below. names enclosed boxes subseries name.
Products mass production Products under development
subseries products compatible with bus. Control 100-pin 100-pin 100-pin 100-pin 80-pin 80-pin 80-pin 80-pin 64-pin 64-pin 64-pin 52-pin 52-pin 64-pin 64-pin 42/44-pin
PD78075B PD78078 PD78070A PD780058 PD78058F µPD78054 µPD780065 PD780078 PD780034A PD780024A PD780034AS
PD780024AS µPD78014H
EMI-noise reduced version µPD78078
µPD78078Y PD78070AY PD780018AY PD780058Y PD78058FY PD78054Y
PD78054 with timer enhanced external interface
ROMless version PD78078 PD78078Y with enhanced serial limited functions
PD78054 with enhanced serial
EMI-noise reduced version PD78054
PD78018F with UART converter, enhanced PD780024A with expanded PD780034A with timer enhanced serial PD780078Y PD780034AY PD780024A with enhanced converter PD780024AY PD78018F with enhanced serial 52-pin version PD780034A
52-pin version PD780024A EMI-noise reduced version PD78018F
µPD78018F PD78083
Inverter control
PD78018FY
Basic subseries control On-chip UART, capable operating voltage (1.8
64-pin
µPD780988
drive
On-chip inverter controller UART. EMI-noise reduced.
100-pin 80-pin 80-pin 80-pin
PD780208 PD780232 µPD78044H µPD78044F
drive
PD78044F with enhanced C/D. Display output total:
panel control. On-chip C/D. Display output total:
PD78044F with N-ch open-drain I/O. Display output total:
Basic subseries driving VFD. Display output total:
78K/0 Series
100-pin 100-pin 120-pin 120-pin 120-pin 100-pin 100-pin 100-pin
PD780354 PD780344 PD780338 PD780328 µPD780318 PD780308 µPD78064B µPD78064
µPD780354Y PD780344Y
PD780344 with enhanced converter PD780308 with enhanced display function timer. PD780308 with enhanced display function timer. PD780308 with enhanced display function timer. PD780308 with enhanced display function timer.
Segment signal output: pins max. Segment signal output: pins max. Segment signal output: pins max. Segment signal output: pins max.
PD780308Y PD78064Y
PD78064 with enhanced SIO, expanded EMI-noise reduced version PD78064
Basic subseries driving LCDs, on-chip UART
interface supported 100-pin 80-pin 80-pin 80-pin 80-pin 64-pin
PD780948 PD78098B PD780702Y PD780703AY PD780833Y
µPD780816
Meter control
On-chip controller
PD78054 with IEBuscontroller
On-chip IEBus controller On-chip controller On-chip controller compliant with J1850 (Class Specialized controller function
100-pin 80-pin 80-pin
µPD780958 µPD780852 µPD780828B
industrial meter control On-chip automobile meter controller/driver automobile meter driver. On-chip controller
Remark (Vacuum Fluorescent Display) referred FIP(Fluorescent Indicator Panel) some documents, functions same.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
major functional differences between subseries shown below. Subseries without suffix
Function Subseries Name Control Capacity Timer 8-Bit 16-Bit Watch 8-Bit 10-Bit 8-Bit (UART: Serial Interface External MIN. Expansion Value
µPD78075B µPD78078 µPD78070A
(time-division UART: (UART:
µPD780058 µPD78058F µPD78054
µPD780065 µPD780078
µPD780034A µPD780024A
µPD780034AS µPD780024AS
(UART: (UART: (UART:
µPD78014H µPD78018F µPD78083
Inverter control drive Note
(UART: (UART:
µPD780988 µPD780208 µPD780232 µPD78044H µPD78044F
drive
µPD780354 µPD780344 µPD780338 µPD780328 µPD780318 µPD780308 µPD78064B µPD78064
(UART:
(UART:
(time-division UART: (UART:
µPD780948
(UART:
interface µPD78098B supported µPD780816 Meter control µPD780958 Dashboard µPD780852 control
(UART: (UART: (UART:
µPD780828B
Note
16-bit timer: channels 10-bit timer: channel
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Subseries with suffix
Function Subseries Name Control Capacity Timer 8-Bit 10-Bit 8-Bit (UART: I2C: (I2C: Serial Interface External
8-Bit 16-Bit Watch
MIN. Value Expansion
µPD78078Y µPD78070AY
µPD780018AY µPD780058Y µPD78058FY µPD78054Y µPD780078Y
(time-division UART: I2C: (UART: I2C: (UART: I2C: (UART: I2C: (I2C:
µPD780034AY µPD780024AY µPD78018FY
drive
µPD780354Y µPD780344Y µPD780308Y µPD78064Y
(UART: I2C:
(time-division UART: I2C: (UART: I2C:
µPD780702Y
(UART: I2C:
interface µPD780703AY 59.5 supported µPD780833Y
Remark functions subseries without suffix subseries with suffix same, except serial interface subseries without suffix available).
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
OVERVIEW FUNCTIONS
Item Internal memory One-time PROM High-speed Expansion display General-purpose registers Minimum instruction execution time When main system clock selected When subsystem clock selected Instruction 16-bit operation Multiply/divide bits bits, bits bits) manipulation (set, reset, test, Boolean operation) adjustment, etc. ports (Segment signal output pins included) converter controller/driver Total: CMOS input: CMOS I/O: 32.768 operation) KBNote 1024 bytes 1024 bytes bits bits registers bits registers banks) On-chip minimum instruction execution time variable function µs/0.8 µs/1.6 µs/3.2 µs/6.4 µs/12.8 operation)
µPD78P0308
µPD78P0308Y
8-bit resolution channels Segment signal output: pins maximum Common signal output: pins maximum Bias: 1/2,1/3 bias convertible 3-wire serial I/O/2-wire serial I/O/I2C mode selectable: channel channel channels channel channel
Serial interface
3-wire serial I/O/SBI/2-wire serial mode selectable: channel 3-wire serial mode:
3-wire serial I/O/UART mode selectable: channel Timer 16-bit timer/event counter: channel 8-bit timer/event counter: Watch timer: Watchdog timer: Timer output Clock output
pins (14-bit output enable: pin) 19.5 kHz, 39.1 kHz, 78.1 kHz, kHz, kHz, kHz, 1.25 MHz, MHz, operation with main system clock) 32.768 32.768 operation with subsystem clock)
Buzzer output
kHz, kHz, kHz, operation with main system clock)
Note internal PROM capacity changed setting internal memory size switching register (IMS).
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Item Vectored interrupt sources Test input Supply voltage Package Maskable Non-maskable Software Internal: Internal: External: 100-pin plastic LQFP (fine pitch) 100-pin plastic
µPD78P0308
Internal: External:
µPD78P0308Y
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
CONFIGURATIONS (TOP VIEW) Normal operating mode 100-pin plastic LQFP (fine pitch)
µPD78P0308GC-8EU, 78P0308YGC-8EU
P11/ANI1 P12/ANI2 P13/ANI3 P14/ANI4 P15/ANI5 P16/ANI6 P17/ANI7 VDD0 AVREF P100 P101 VSS1 P102 P103 P30/TO0 P31/TO1 P32/TO2 P33/TI1 P34/TI2 P35/PCL P36/BUZ COM0 COM1 COM2
P110/S13 P05/INTP5 P04/INTP4 P03/INTP3 P02/INTP2 P01/INTP1/TI01 P00/INTP0/TI00 RESET XT1/P07 VDD1 P72/SCK2/ASCK P71/SO2/TXD
P10/ANI0 AVSS P117 P116 P115 P114/RXD P113/TXD P112/SCK3 P111/SO3
P70/SI2/RxD P27/SCK0[/SCL] P26/SO0/SB1[/SDA1] P25/SI0/SB0[/SDA0] P80/S39 P81/S38 P82/S37 P83/S36 P84/S35 P85/S34 P86/S33 P87/S32 P90/S31 P91/S30 P92/S29 P93/S28 P94/S27 P95/S26 P96/S25 P97/S24
COM3 BIAS VLC0 VLC1
Cautions
Connect directly VSS0 VSS1. Connect AVSS VSS0.
Remarks µPD78P0308Y only When device used applications where noise generated inside microcontroller needs reduced, implementation noise reduction measures, such supplying voltage VDD0 VDD1 individually connecting VSS0 VSS1 different ground lines, recommended.
VLC2 VSS0
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
100-pin plastic
µPD78P0308GF-3BA, 78P0308YGF-3BA
P25/SI0/SB0[/SDA0]
P80/S39
P81/S38
P82/S37
P83/S36
P84/S35
P85/S34
P86/S33
P87/S32
P90/S31
P91/S30
P92/S29
P93/S28
P94/S27
P95/S26
P96/S25
P97/S24
P26/SO0/SB1[/SDA1] P27/SCK0[/SCL] P70/SI2/RXD P71/SO2/TXD P72/SCK2/ASCK
VDD1
VSS0 VLC2 VLC1 VLC0 BIAS COM3 COM2 COM1 COM0
XT1/P07
RESET P00/INTP0/TI00 P01/INTP1/TI01 P02/INTP2 P03/INTP3 P04/INTP4
P05/INTP5 P110/SI3 P111/SO3 P112/SCK3 P113/TXD
P114/RXD P115
P116 P117 AVSS P10/ANI0 P11/ANI1 P12/ANI2
P15/ANI5
AVREF
P30/TO0
P31/TO1 P32/TO2
P33/TI1
P13/ANI3
P14/ANI4
P16/ANI6
P17/ANI7
P34/TI2
P36/BUZ
P35/PCL
P101
P102
P103
P100
VDD0
Cautions
Connect directly VSS0 VSS1. Connect AVSS VSS0.
Remarks µPD78P0308Y only When device used applications where noise generated inside microcontroller needs reduced, implementation noise reduction measures, such supplying voltage VDD0 VDD1 individually connecting VSS0 VSS1 different ground lines, recommended.
VSS1
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
ANI0 ANI7: ASCK: AVREF: AVSS: BIAS: BUZ: Analog input Asynchronous serial clock Analog reference voltage Analog ground power supply bias control Buzzer clock RxD: S39: SB0, SB1: SCK0, SCK2, SCK3: SCL: SDA0, SDA1: SI0, SI2, SI3: SO0, SO2, SO3: TI00, TI01: TI1, TI2: TO2: TxD: VDD0, VDD1: VLC0 VLC2: VPP: VSS0, VSS1: XT1, XT2: Receive data Segment output Serial Serial clock Serial clock Serial data Serial input Serial output Timer input Timer input Timer output Transmit data Power supply power supply Programming power supply Ground Crystal (main system clock) Crystal (subsystem clock)
COM0 COM3: Common output INTP0 INTP5: External interrupt input P05, P07: Port P17: P27: P37: P72: P87: P97: P100 P103: P110 P117: PCL: RESET: Port Port Port Port Port Port Port Port Programmable clock Reset
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM programming mode 100-pin plastic LQFP (fine pitch)
µPD78P0308GC-8EU, 78P0308YGC-8EU
RESET Open
Open
Cautions
(L): VSS: Open:
Independently connect pull-down resistor. Connect GND. Leave open.
RESET: level.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
100-pin plastic
µPD78P0308GF-3BA, 78P0308YGF-3BA
Open Open
RESET
Cautions A16: PGM:
(L): VSS: Open:
Independently connect pull-down resistor. Connect GND. Leave open. RESET: VDD: VPP: VSS: Reset Power supply Programming power supply Ground
RESET: level.
Address Chip enable Data Output enable Program
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
BLOCK DIAGRAM
TO0/P30 TI00/INTP0/P00 TI01/INTP1/P01 Port TO1/P31 TI1/P33 TO2/P32 TI2/P34 8-bit timer/event counter Port 8-bit timer/event counter Port Watchdog timer Port Watch timer Port SI0/SB0[/SDA0]/P25 SO0/SB1[/SDA1]/P26 SCK0[/SCL]/P27
16-bit timer/ event counter
Serial interface
Port
SI2/RxD/P70 SO2/TxD/P71 RxD/P114 TxD/P113 SCK2/ASCK/P72 Serial interface
78K/0 core
PROM
Port
Port
P100 P103
SI3/P110 SO3/P111 SCK3/P112
Port Serial interface
P110 P117
ANI0/P10 ANI7/P17 AVSS AVREF converter (2048 bytes) S24/P97 S31/P90 S32/P87 S39/P80 controller/driver COM0 COM3 VLC0 VLC2 INTP0/P00 INTP5/P05 Interrupt control BIAS fLCD RESET XT1/P07
BUZ/P36
Buzzer output System control
PCL/P35
Clock output control
VDD0, VDD1 VSS0, VSS1
Remark µPD78P0308Y only
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
CONTENTS
DIFFERENCES BETWEEN µPD78P0308, 78P0308Y MASK VERSIONS FUNCTIONS Pins Normal Operating Mode Pins PROM Programming Mode Circuits Recommended Connection Unused Pins INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS) INTERNAL EXPANSION SIZE SWITCHING REGISTER (IXS) PROM PROGRAMMING Operating Modes PROM Write Procedure PROM Read Procedure ONE-TIME PROM VERSION SCREENING ELECTRICAL SPECIFICATIONS PACKAGE DRAWINGS RECOMMENDED SOLDERING CONDITIONS APPENDIX DEVELOPMENT TOOLS APPENDIX RELATED DOCUMENTS
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
DIFFERENCES BETWEEN µPD78P0308, 78P0308Y MASK VERSIONS
µPD78P0308 78P0308Y single-chip microcontrollers with on-chip one-time PROM which program written only once. possible make functions except PROM specifications mask option drive power supply dividing resistor same those mask versions setting internal memory size switching register (IMS). Differences between one-time PROM versions (µPD78P0308, 78P0308Y) mask versions (µPD780306, 780308, 780306Y, 780308Y) shown Table 1-1. Table 1-1. Differences Between µPD78P0308, 78P0308Y Mask Versions
Item Internal configuration Internal capacity Internal capacity change internal memory size switching register (IMS) Mask options drive power supply dividing resistor Serial interface (SBI) Serial interface (I2C) Electrical specifications, recommended soldering conditions Provided provided provided Provided Provided provided provided Provided None Available
µPD78P0308
One-time PROM PossibleNote
µPD78P0308Y
Mask Versions
µPD780308 Subseries µPD780308Y Subseries
Mask
µPD780306, 780306Y: µPD780308, 780308Y:
Impossible
Refer data sheet individual product.
Note internal PROM capacity RESET input. Caution There differences noise immunity noise radiation between one-time PROM mask versions. When pre-producing application with one-time PROM version then mass-producing with mask version, sure conduct sufficient evaluations commercial samples (CS) (not engineering samples (ES)) mask version.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
FUNCTIONS
Pins Normal Operating Mode
Port pins (1/2)
Name P07Note Input Port 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings.Note Port 3-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. Port 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. Input SO0/SB1[/SDA1] SCK0[/SCL] Input SI0/SB0[/SDA0] Input Port 7-bit port Function Input only Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. Input only Input Input After Reset Input Input Alternate Function INTP0/TI00 INTP1/TI01 INTP2 INTP3 INTP4 INTP5 ANI0 ANI7
Notes
When P07/XT1 used input port, (FRC) processor clock control register (PCC) sure feedback resistor subsystem clock oscillator. When P10/ANI0 P17/ANI7 pins used analog inputs converter, shift port input mode. on-chip pull-up resistors automatically disabled.
Remark µPD78P0308Y only
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Port pins (2/2)
Name Port 3-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. Port 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. port/segment signal output function specifiable 2-bit units display control register (LCDC). Port 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. port/segment signal output function specifiable 2-bit units display control register (LCDC). P100 P103 Port 4-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. possible directly drive LEDs. P110 P111 P112 P113 P114 P115 P117 Port 8-bit port Input/output specified 1-bit units. When used input port, on-chip pull-up resistor connection specified software settings. Falling edge detection possible. Input SCK3 Input Input Input SO2/TXD SCK2/ASCK Function After Reset Input Alternate Function SI2/RXD
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Non-port pins (1/2)
Name INTP0 INTP1 INTP2 INTP3 INTP4 INTP5 SDA0 SDA1 SCK0 SCK2 SCK3 ASCK TI00 TI01 COM0 COM3 VLC0 VLC2 BIAS Output controller/driver common signal output. drive voltage. drive power supply. Output Output Output Output Output Input Output Input Input Serial interface serial clock input/output. Input Serial interface serial data input/output. Input Output Serial interface serial data output. Input Input Serial interface serial data input. Input Input Function External interrupt request input which valid edge (rising edge, falling edge, both rising falling edges) specified. After Reset Input Alternate Function P00/TI00 P01/TI01 P25/SB0[/SDA0] P70/RxD P110 P26/SB1[/SDA1] P71/TxD P111 P25/SI0[/SDA0] P26/SO0[/SDA1] P25/SI0/SB0 P26/SO0/SB1 P27[/SCL] P72/ASCK P112
µPD78P0308Y only
µPD78P0308Y only
Asynchronous serial interface serial data input. Asynchronous serial interface serial data output. Asynchronous serial interface serial clock input. External count clock input 16-bit timer (TM0). Capture trigger signal input capture register (CR00). External count clock input 8-bit timer (TM1). External count clock input 8-bit timer (TM2). 16-bit timer (TM0) output (also used 14-bit output). 8-bit timer (TM1) output. 8-bit timer (TM2) output. Clock output (for main system clock, subsystem clock trimming). Buzzer output. controller/driver segment signal output. Input Output Input Input Input Input Input Input Input
P27/SCK0 P70/SI2, P114 P71/SO2, P113 P72/SCK2 P00/INTP0 P01/INTP1
Remark µPD78P0308Y only
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Non-port pins (2/2)
Name ANI0 ANI7 AVREF AVSS RESET VDD0 VSS0 VDD1 VSS1 Input Input Input Input Input Function converter analog input. converter reference voltage input (also used analog power supply). converter ground potential. same potential VSS0. System reset input. Crystal resonator connection main system clock oscillation. Crystal resonator connection subsystem clock oscillation. Positive power supply ports. Ground potential ports. Positive power supply (except ports analog). Ground potential (except ports analog). High voltage application program write/verify mode. Connect directly VSS0 VSS1 normal operating mode. Input After Reset Input Alternate Function
Pins PROM Programming Mode
Name Input PROM programming mode setting. When +12.5 applied low-level signal applied RESET pin, this chip PROM programming mode. Function
RESET
Input Input Input Input Input
PROM programming mode setting high voltage application during program write/verification. Address bus. Data bus. PROM enable input/program pulse input. Read strobe input PROM. Program/program inhibit input PROM programming mode. Positive power supply. Ground potential.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Circuits Recommended Connection Unused Pins
types circuits recommended connection unused pins shown Table 2-1. configuration each type circuit, Figure 2-1. Table 2-1. Type Circuit Each (1/2)
Name P00/INTP0/TI00 P01/INTP1/TI01 P02/INTP2 P03/INTP3 P04/INTP4 P05/INTP5 P07/XT1 P10/ANI0 P17/ANI7 P25/SI0/SB0[/SDA0] P26/SO0/SB1[/SDA1] P27/SCK0[/SCL] P30/TO0 P31/TO1 P32/TO2 P33/TI1 P34/TI2 P35/PCL P36/BUZ P70/SI2/RXD P71/SO2/TXD P72/SCK2/ASCK P80/S39 P87/S32 P90/S31 P97/S24 P100 P103 P110/SI3 P111/SO3 P112/SCK3 P113/TXD P114/RXD P115 P117 COM0 COM3 17-B 18-A Output Leave open. Input: Independently connect VDD0 resistor. Output: Leave open. 17-C 11-B 10-B Input Connect VDD0. Input: Independently connect VDD0 VSS0 resistor. Output: Leave open. Circuit Type Input Input: Recommended Connection Unused Pins Connect VSS0. Independently connect VSS0 resistor. Output: Leave open.
Remark µPD78P0308Y only
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Table 2-1. Type Circuit Each (2/2)
Name VLC0 VLC2 BIAS RESET AVREF AVSS Connect directly VSS0 VSS1. Input Leave open. Connect VSS0. Circuit Type Recommended Connection Unused Pins Leave open.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Figure 2-1. List Circuits (1/2)
Type
Type 10-B
VDD0
Pull-up enable Data VDD0 P-ch
P-ch
IN/OUT Schmitt-triggered input with hysteresis characteristics Open drain Output disable N-ch VSS0
Type Pull-up enable VDD0 Data
VDD0
Type 11-B Pull-up enable Data
VDD0
P-ch
P-ch VDD0 P-ch IN/OUT
P-ch IN/OUT Output disable P-ch N-ch VSS0 Comparator VSS0 N-ch
Output disable
Input enable
AVSS N-ch VREF (threshold voltage) Input enable VDD0 Type Feedback cut-off P-ch
Type
Pull-up enable VDD0 Data P-ch
P-ch
IN/OUT Output disable N-ch VSS0
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Figure 2-1. List Circuits (2/2)
Type 17-B VLC0 VLC1 N-ch P-ch data P-ch VLC2 N-ch VSS1 N-ch
Type 17-C VDD0 P-ch Pull-up enable VDD0 Data P-ch IN/OUT Output disable VSS0 Input enable N-ch P-ch
Type 18-A VLC0 VLC0 VLC1 P-ch N-ch P-ch N-ch data VLC2 P-ch VLC2 N-ch VSS1 VSS1 N-ch P-ch N-ch P-ch VLC1 N-ch P-ch
data
N-ch
P-ch
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
INTERNAL MEMORY SIZE SWITCHING REGISTER (IMS)
This register used disable part internal memory software. setting internal memory size switching register (IMS), possible same memory that mask versions with different internal memory (ROM) capacity. with 8-bit memory manipulation instruction. RESET input sets CFH. Figure 3-1. Format Internal Memory Size Switching Register
Symbol RAM2 RAM1 RAM0 ROM3 ROM2 ROM1 ROM0 Address FFF0H After reset
ROM3 ROM2 ROM1 ROM0 Internal capacity selection Setting prohibited
Other than above
RAM2 RAM1 RAM0
Internal high-speed capacity selection 1024 bytes Setting prohibited
Other than above
Table shows setting values that make memory mapping same that mask versions. Table 3-1. Internal Memory Size Switching Register Setting Values
Target Mask Versions Setting Value
µPD780306, 780306Y µPD780308, 780308Y
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
INTERNAL EXPANSION SIZE SWITCHING REGISTER (IXS)
This register used internal expansion capacity software. setting internal expansion size switching register (IXS), possible same memory that mask versions with different internal expansion capacity. with 8-bit memory manipulation instruction. RESET input sets 0AH. Figure 4-1. Format Internal Expansion Size Switching Register
Symbol IXRAM3 IXRAM2 IXRAM1 IXRAM0 Address FFF4H After reset
IXRAM3
IXRAM2
IXRAM1
IXRAM0
Internal expansion capacity selection 1024 bytes Setting prohibited
Other than above
Table shows setting values that make memory mapping same that mask versions. Table 4-1. Internal Expansion Size Switching Register Setting Values
Target Mask Versions Setting Value
µPD780306, 780306Y µPD780308, 780308Y
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM PROGRAMMING
µPD78P0308 78P0308Y have on-chip PROM program memory. programming, PROM programming mode with RESET pins. connection unused pins, refer CONFIGURATIONS PROM programming mode. Caution Programs must written addresses 0000H EFFFH (the last address EFFFH must specified). They cannot written PROM programmer that cannot specify write address. Operating Modes
When +12.5 applied low-level signal applied RESET pin, PROM programming mode set. This mode will become operating mode shown Table when pins shown. Further, when read mode set, possible read contents PROM. Table 5-1. Operating Modes PROM Programming
Operating Mode Page data latch Page write Byte write Program verify Program inhibit +12.5 +6.5 Read Output disable Standby Data output High-impedance High-impedance Data input High-impedance Data input Data output High-impedance RESET
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Read mode Read mode set. Output disable mode Data output becomes high-impedance, output disable mode, set. Therefore, data read from device controlling pin, multiple µPD78P0308 78P0308Ys connected data bus. Standby mode Standby mode set. this mode, data outputs become high-impedance irrespective status. Page data latch mode Page data latch mode beginning page write mode. this mode, 1-page 4-byte data latched internal address/data latch circuit. Page write mode After page bytes addresses data latched page data latch mode, page write executed applying program pulse (active low) with Then, program verification performed, set. programming performed one-time program pulse, write verification operations should executed times repeatedly. Byte write mode Byte write executed when program pulse (active low) applied with Then, program verification performed set. programming performed one-time program pulse, write verification operations should executed times repeatedly. Program verify mode Program verify mode set. this mode, check write operation performed correctly after write. Program inhibit mode Program inhibit mode used when pin, pin, pins multiple µPD78P0308 78P0308Ys connected parallel write performed those devices. When write operation performed, page write mode byte write mode described above used. this time, write performed device whose driven high.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM Write Procedure Figure 5-1. Page Program Mode Flow Chart
Start Address 12.5
Latch Address Address Latch Address Address Latch Address Address Address Address Latch
X=X+1 program pulse
Verify bytes Pass Address
Fail
Pass
Verify bytes pass Write
Fail
Defective product
Start address Program last address
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Figure 5-2. Page Program Mode Timing
Page data latch
Page program
Program verify
Hi-Z Data input Data output
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Figure 5-3. Byte Program Mode Flow Chart
Start Address 12.5
X=X+1 program pulse Address Address Fail Verify Pass Address
Pass
Verify bytes pass Write
Fail
Defective product
Start address Program last address
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Figure 5-4. Byte Program Mode Timing
Program
Program verify
Hi-Z Data input Data output
Cautions
should applied before VPP, after VPP. should exceed +13.5 including overshoot. Disconnection during application +12.5 have adverse effect reliability.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM Read Procedure
contents PROM readable external data according read procedure shown below. RESET level, supply pin, connect other unused pins shown CONFIGURATIONS PROM programming mode. Supply pins. Input address data read pins. Read mode Output data pins. timing steps above shown Figure 5-5. Figure 5-5. PROM Read Timing
Address input
(input)
(input)
Hi-Z
Data output
Hi-Z
ONE-TIME PROM VERSION SCREENING
one-time PROM versions (µPD78P0308GC-8EU, 78P0308GF-3BA, 78P0308YGC-8EU, 78P0308YGF3BA) cannot tested completely Electronics before they shipped, because their structure. recommended perform screening verify PROM after writing necessary data performing high-temperature storage under conditions below.
Storage Temperature 125°C Storage Time hours
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings 25°C)
Parameter Supply voltage Symbol AVREF AVSS Input voltage P05, P07, P17, P27, P37, P72, P87, P97, P100 P103, P110 P117, XT2, RESET Output voltage Analog input voltage Output current, high Total P05, P17, P27, P72, P110 P117 Total P37, P87, P97, P100 P103 Output current, Peak value r.m.s. value Total P05, P17, P110 P117 Total P37, P100 P103 Total P27, P72, P87, Operating ambient temperature Storage temperature Tstg Peak value r.m.s. value Peak value r.m.s. value Peak value r.m.s. value 15Note
Note
Conditions
Ratings -0.3 +7.0 -0.3 +13.5 -0.3 -0.3 +0.3 -0.3
Unit
PROM programming mode
-0.3 +13.5 -0.3
Analog input
AVSS AVREF
100Note
Note
+150
Note root mean square (r.m.s.) value should calculated follows: [r.m.s. value] [Peak value] Duty Caution Product quality suffer absolute maximum rating exceeded even momentarily parameter. That absolute maximum ratings rated values which product verge suffering physical damage, therefore product must used under conditions that ensure that absolute maximum ratings exceeded. Remark Unless otherwise specified, characteristics alternate-function pins same those port pins. Capacitance 25°C,
Parameter Input capacitance Output capacitance capacitance Symbol COUT Conditions Unmeasured pins returned MIN. TYP. MAX. Unit
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Main System Clock Oscillator Characteristics +85°C, 2.0Note
Resonator Recommended Circuit Ceramic resonator Oscillation frequency Oscillation stabilization timeNote Crystal resonator Oscillation frequency (fX)Note (fX)Note Oscillation voltage range After reaches oscillation voltage range MIN. Oscillation voltage range Note timeNote
Note
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Oscillation stabilization
External clock
input frequency (fX)Note
input high-/lowlevel width (tXH, tXL)
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reset STOP mode release. After reaches oscillation voltage range MIN. However, oscillation start voltage higher higher (for external clock, higher). Cautions When using main system clock oscillator, wire follows area enclosed broken lines above figures avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS1. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. When main system clock stopped system operating subsystem clock, wait until oscillation stabilization time been secured program before switching back main system clock. Remark resonator selection oscillator constant, customers required either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Subsystem Clock Oscillator Characteristics +85°C, 2.0Note
Resonator Recommended Circuit Crystal resonator Oscillation frequency (fXT)Note Oscillation stabilization input frequency (fXT)Note input high-/lowlevel width (tXTH, tXTL) timeNote Oscillation voltage range VNote 32.768 Parameter Conditions MIN. TYP. MAX. Unit
External clock
Notes Indicates only oscillator characteristics. Refer Characteristics instruction execution time. Time required stabilize oscillation after reaches oscillation voltage range MIN. After reaches oscillation voltage range MIN. However, oscillation start voltage higher higher (for external clock, higher). Cautions When using subsystem clock oscillator, wire follows area enclosed broken lines above figure avoid adverse effect from wiring capacitance. Keep wiring length short possible. cross wiring with other signal lines. route wiring near signal line through which high fluctuating current flows. Always make ground point oscillator capacitor same potential VSS1. ground capacitor ground pattern through which high current flows. fetch signals from oscillator. subsystem clock oscillator designed low-amplitude circuit reducing current consumption, more prone malfunction noise than main system clock oscillator. Particular care therefore required with wiring method when subsystem clock used. Remark resonator selection oscillator constant, customers required either evaluate oscillation themselves apply resonator manufacturer evaluation.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Characteristics +85°C,
Parameter Input voltage, high Symbol VIH1 Conditions P17, P32, P37, P87, P97, P100 P103 VIH2 P05, P27, P33, P34, P72, P110 P117, RESET VIH3 VIH4 XT1/P07, VNote Input voltage, VIL1 P17, P32, P37, P87, P97, P100 P103 VIL2 P05, P27, P33, P34, P72, P110 P117, RESET VIL3 VIL4 XT1/P07, Output voltage, high Output voltage, P05, P17, P27, P37, P72, P87, P97, P110 P117 VOL2 SB0, SB1, SCK0 open-drain, pulled VOL3 0.2VDD VOL1 -100 P100 P103
Note
MIN. 0.7VDD 0.8VDD 0.8VDD 0.85VDD 0.8VDD 0.9VDD 0.9VDD
TYP.
MAX. 0.3VDD 0.2VDD 0.2VDD 0.15VDD 0.2VDD 0.1VDD 0.1VDD
Unit
Note Remark
When XT1/P07 used P07, input inverse phase pin. Unless otherwise specified, characteristics alternate-function pins same those port pins.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Characteristics +85°C,
Parameter Input leakage current, high Symbol ILIH1 Conditions P05, P17, P27, P37, P72, P87, P97, P100 P103, P110 P117, RESET ILIH2 Input leakage current, ILIL1 XT1/P07, P05, P17, P27, P37, P72, P87, P97, P100 P103, P110 P117, RESET ILIL2 Output leakage current, high Output leakage current, Software pull-up resistor P05, P17, P27, P37, P72, P87, P97, P100 P103, P110 P117 Supply currentNote IDD1 5.00 crystal oscillation (fXX MHz)Note operating mode 5.00 crystal oscillation (fXX IDD2 MHz)Note operating mode 5.00 crystal oscillation (fXX MHz)Note HALT mode 5.00 crystal oscillation (fXX MHz)Note HALT mode IDD3 32.768 crystal oscillation operating modeNote IDD4 32.768 crystal oscillation HALT modeNote IDD5 STOP mode When feedback resistor connected IDD6 STOP mode When feedback resistor disconnected ±10%Note ±10%Note ±10%Note ±10%Note ±10%Note ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% ±10% 0.05 0.05 1500 1950 12.5 ILOL VOUT ILOH VOUT XT1/P07, MIN. TYP. MAX. Unit
Notes Current flowing pin. including current flowing converter, on-chip pull-up resistors, dividing resistors. Main system clock fX/2 operation (when oscillation mode selection register (OSMS) 00H) Main system clock operation (when OSMS 01H) When main system clock stopped. High-speed mode operation (when processor clock control register (PCC) 00H) Low-speed mode operation (when 04H) Remark Unless otherwise specified, characteristics alternate-function pins same those port pins.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Controller/Driver Characteristics Normal Operation) Static display mode +85°C,
Parameter drive voltage dividing resistor output voltage deviationNote deviationNote (common) VODS Symbol VLCD RLCD VODC VLCD0 VLCD VLCD ±0.2 Conditions MIN. TYP. MAX. ±0.2 Unit
output voltage (segment)
Note
voltage deviation difference between output voltage corresponding ideal value segment common output (VLCDn;
bias method +85°C,
Parameter drive voltage dividing resistor output voltage deviationNote deviationNote (common) VODS Symbol VLCD RLCD VODC VLCD0 VLCD VLCD1 VLCD VLCD2 VLCD VLCD ±0.2 Conditions MIN. TYP. MAX. ±0.2 Unit
output voltage (segment)
Note
voltage deviation difference between output voltage corresponding ideal value segment common output (VLCDn;
bias method +85°C,
Parameter drive voltage dividing resistor output voltage deviationNote deviationNote (common) VODS Symbol VLCD RLCD VODC VLCD0 VLCD VLCD1 VLCD VLCD2 VLCD1 VLCD ±0.2 Conditions MIN. TYP. MAX. ±0.2 Unit
output voltage (segment)
Note
voltage deviation difference between output voltage corresponding ideal value segment common output (VLCDn;
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Controller/Driver Characteristics Low-Voltage Operation) Static display mode +85°C,
Parameter drive voltage dividing resistor output voltage deviationNote (common) output voltage deviationNote (segment) VODS Symbol VLCD RLCD VODC VLCD0 VLCD VLCD ±0.2 Conditions MIN. TYP. MAX. ±0.2 Unit
Note
voltage deviation difference between output voltage corresponding ideal value segment common output (VLCDn;
bias method +85°C,
Parameter drive voltage dividing resistor output voltage deviationNote deviationNote (common) VODS Symbol VLCD RLCD VODC VLCD0 VLCD VLCD1 VLCD VLCD2 VLCD VLCD ±0.2 Conditions MIN. TYP. MAX. ±0.2 Unit
output voltage (segment)
Note
voltage deviation difference between output voltage corresponding ideal value segment common output (VLCDn;
bias method +85°C,
Parameter drive voltage dividing resistor output voltage deviation
Note
Symbol VLCD RLCD VODC
Conditions
MIN.
TYP.
MAX.
Unit
±0.2 ±0.2
VLCD0 VLCD VLCD1 VLCD
(common) VODS
output voltage deviationNote (segment)
VLCD2 VLCD1 VLCD
Note
voltage deviation difference between output voltage corresponding ideal value segment common output (VLCDn;
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Characteristics Basic operation +85°C,
Parameter Cycle time (Min. instruction execution time) Symbol Conditions Operating main system clock (fXX MHz)Note MIN. 40Note TYP. MAX. 1/tTI00 Unit
Operating main system clock (fXX MHz)Note Operating subsystem clock
TI00 input frequency TI00 input high-/ low-level width
fTI00
tTI00 tTIH00 tTIL00 INTP0 INTP1 INTP5, P110 P117
tTIH00, tTIL00
2/fsam 0.1Note 2/fsam 0.2Note 2/fsam 0.5Note 2/fsam 0.1Note 2/fsam 0.2Note 2/fsam 0.5Note
TI01 input frequency TI01 input high-/ low-level width TI1, input frequency TI1, input high-/ low-level width Interrupt request input high-/lowlevel width
fTI01
tTIH01, tTIL01 fTI1
tTIH1, tTIL1 tINTH, tINTL
RESET low-level width
tRSL
Notes Main system clock fX/2 operation (when oscillation mode selection register (OSMS) 00H) Main system clock operation (when OSMS 01H) This value when external clock used. value (min.) when crystal resonator used. combination with bits (SCS0) (SCS1) sampling clock select register (SCS), selection fsam possible between fXX/2N, fXX/32, fXX/64, fXX/128 (when
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
main system clock fX/2 operation) main system clock operation)
Cycle time [µs]
Guaranteed operation range
Cycle time [µs]
Guaranteed operation range
Supply voltage
Supply voltage
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Serial interface +85°C, Serial interface channel 3-wire serial mode (SCK0.internal clock output)
Parameter SCK0 cycle time Symbol tKCY1 Conditions SCK0 high-/low-level width tKH1, tKL1 setup time SCK0) tSIK1 hold time (from SCK0) output delay time from SCK0 tKSI1 tKSO1 pFNote MIN. 1600 3200 tKCY1/2 tKCY1/2 TYP. MAX. Unit
Note load capacitance SCK0 output lines. (ii) 3-wire serial mode (SCK0.external clock input)
Parameter SCK0 cycle time Symbol tKCY2 Conditions SCK0 high-/low-level width tKH2, tKL2 setup time SCK0) hold time (from SCK0) output delay time from SCK0 SCK0 rise, fall time tR2, 1000 tSIK2 tKSI2 tKSO2 pFNote MIN. 1600 3200 1600 TYP. MAX. Unit
Note load capacitance output line.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
(iii) mode (SCK0.internal clock output): µPD78P0308 only
Parameter SCK0 cycle time Symbol tKCY3 Conditions SCK0 high-/low-level width SB0, setup time SCK0) SB0, hold time (from SCK0) SB0, output delay time from SCK0 SB0, from SCK0 SCK0 from SB0, SB0, high-level width SB0, low-level width tSBL tKCY3 tKSB tSBK tSBH tKSO3 pFNote tKCY3 tKCY3 tKCY3 1000 tKSI3 tKH3, tKL3 tSIK3 MIN. 3200 tKCY3/2 tKCY3/2 tKCY3/2 TYP. MAX. Unit
Note load resistance load capacitance SCK0, SB0, output lines. (iv) mode (SCK0.external clock input): µPD78P0308 only
Parameter SCK0 cycle time Symbol tKCY4 Conditions SCK0 high-/low-level width SB0, setup time SCK0) SB0, hold time (from SCK0) SB0, output delay time from SCK0 SB0, from SCK0 SCK0 from SB0, SB0, high-level width SB0, low-level width SCK0 rise, fall time tR4, 1000 tSBL tKCY4 tKSB tSBK tSBH tKSO4 pFNote tKCY4 tKCY4 tKCY4 1000 tKSI4 tKH4, tKL4 tSIK4 MIN. 3200 1600 tKCY4/2 TYP. MAX. Unit
Note load resistance load capacitance output lines.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
2-wire serial mode (SCK0.internal clock output)
Parameter SCK0 cycle time Symbol tKCY5 pFNote SCK0 high-level width tKH5 Conditions MIN. 1600 3200 TYP. MAX. Unit
tKCY5/2 tKCY5/2 tKCY5/2 tKCY5/2
SCK0 low-level width
tKL5
SB0, setup time SCK0)
tSIK5
SB0, hold time (from SCK0) SB0, output delay time from SCK0
tKSI5
tKSO5
Note load resistance load capacitance SCK0, SB0, output lines. (vi) 2-wire serial mode (SCK0.external clock input)
Parameter SCK0 cycle time Symbol tKCY6 Conditions SCK0 high-level width tKH6 SCK0 low-level width tKL6 SB0, setup time SCK0) SB0, hold time (from SCK0) SB0, output delay time from SCK0 SCK0 rise, fall time tR6, tKSO6 pFNote 1000 tKSI6 tKCY6/2 tSIK6 MIN. 1600 3200 1300 1600 TYP. MAX. Unit
Note load resistance load capacitance output lines.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
(vii) mode (SCL.internal clock output): µPD78P0308Y only
Parameter cycle time Symbol tKCY7 high-level width tKH7 pFNote Conditions low-level width tKL7 SDA0, SDA1 setup time SCL) SDA0, SDA1 hold time (from SCL) SDA0, SDA1 output delay time from SDA0, SDA1 from SDA0, SDA1 from from SDA0, SDA1 SDA0, SDA1 high-level width tSBK tSBH tKSB tKSO7 tKSI7 tSIK7 MIN. tKCY7 tKCY7 tKCY7 tKCY7 TYP. MAX. Unit
Note load resistance load capacitance SCL, SDA0, SDA1 output lines. (viii) mode (SCL.external clock input): µPD78P0308Y only
Parameter cycle time high-/low-level width SDA0, SDA1 setup time SCL) SDA0, SDA1 hold time (from SCL) SDA0, SDA1 output delay time from SDA0, SDA1 from SDA0, SDA1 from from SDA0, SDA1 SDA0, SDA1 high-level width rise, fall time tR8, 1000 tSBK tSBH tKSB tKSO8 pFNote tKSI8 Symbol tKCY8 tKH8, tKL8 tSIK8 Conditions MIN. 1000 TYP. MAX. Unit
Note load resistance load capacitance SDA0 SDA1 output lines.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Serial interface channel 3-wire serial mode (SCK2.internal clock output)
Symbol tKCY9 Conditions SCK2 high-/low-level width tKH9, tKL9 setup time SCK2) tSIK9 hold time (from SCK2) output delay time from SCK2 tKSI9 tKSO9 pFNote MIN. 1600 3200 tKCY9/2 tKCY9/2 TYP. MAX. Unit
Parameter SCK2 cycle time
Note load capacitance SCK2 output lines. (ii) 3-wire serial mode (SCK2.external clock input)
Parameter SCK2 cycle time Symbol tKCY10 Conditions SCK2 high-/low-level width tKH10, tKL10 setup time SCK2) hold time (from SCK2) output delay time from SCK2 SCK2 rise, fall time tR10, tF10 1000 tSIK10 tKSI10 tKSO10
Note
MIN. 1600 3200 1600
TYP.
MAX.
Unit
Note load capacitance output line.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
(iii) UART mode (dedicated baud rate generator output)
Parameter Transfer rate Symbol Conditions MIN. TYP. MAX. 78125 39063 19531 Unit
(iv) UART mode (external clock input)
Parameter ASCK cycle time Symbol tKCY11 Conditions ASCK high-/low-level width tKH11, tKL11 Transfer rate ASCK rise, fall time tR11, tF11 MIN. 1600 3200 1600 39063 19531 9766 1000 TYP. MAX. Unit
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Serial interface channel 3-wire serial mode (SCK3.internal clock output)
Symbol tKCY12 Conditions SCK3 high-/low-level width tKH12, tKL12 setup time SCK3) tSIK12 hold time (from SCK3) output delay time from SCK3 tKSI12 tKSO12 pFNote MIN. 1600 3200 tKCY12/2 tKCY12/2 TYP. MAX. Unit
Parameter SCK3 cycle time
Note
load capacitance SCK3 output lines. (ii) 3-wire serial mode (SCK3.external clock input)
Parameter Symbol tKCY13 Conditions MIN. 1600 3200 1600 pFNote TYP. MAX. Unit
SCK3 cycle time
SCK3 high-/low-level width
tKH13, tKL13
setup time SCK3) hold time (from SCK3) output delay time from SCK3 SCK3 rise, fall time
tSIK13 tKSI13 tKSO13
tR13, tF13
1000
Note
load capacitance output line.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Timing Test Points (Excluding Inputs)
0.8VDD 0.2VDD
Test points
0.8VDD 0.2VDD
Clock Timing
1/fX
input
1/fXT
tXTL input
tXTH VIH4 (MIN.) VIL4 (MAX.)
Timing
tTIL00, tTIL01
tTIH00, tTIH01
TI00, TI01
1/fTI1
tTIL1
tTIH1
TI1,
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Serial Transfer Timing 3-wire serial mode:
tKCYm
tKLm SCK0, SCK2, SCK3 tSIKm tKSIm
tKHm
SI0, SI2, tKSOm
Input data
SO0, SO2,
Output data
mode (bus release signal transfer, µPD78P0308 only):
tKCY3, tKL3, SCK0 tKSB tSBL tSBH tSBK tSIK3, tKSI3, tKH3,
SB0, tKSO3,
mode (command signal transfer, µPD78P0308 only):
tKCY3, tKL3, SCK0 tKSB tSBK tSIK3, tKSI3, tKH3,
SB0, tKSO3,
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
2-wire serial mode:
tKCY5, tKL5, SCK0 tSIK5, tKSO5, tKSI5, tKH5,
SB0,
mode (µPD78P0308Y only):
tKL7, SDA0, SDA1 tSBH tSBK tKH7, tKSI7, tKSB tSIK7, tKSO7, tSBK tKSB
tKCY7,
UART mode:
tKCY11 tKL11 tR11 ASCK tKH11 tF11
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Converter Characteristics +85°C, AVSS
Parameter Resolution Overall errorNote AVREF AVREF Conversion time tCONV AVREF AVREF Sampling time Analog input voltage Reference voltage AVREF-AVSS resistance AVREF current tSAMP VIAN AVREF RAIREF AIREF When conversion operating When conversion operatingNote When conversion operatingNote 19.1 38.2 24/fXX AVSS AVREF Symbol Conditions MIN. TYP. MAX. ±0.6 ±1.4 Unit %FSR %FSR
Notes Quantization error (±1/2 LSB) included. This expressed percentage (%FSR) full-scale value. Indicates current flowing AVREF when converter mode register (ADM) Indicates current flowing AVREF when
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Data Memory STOP Mode Supply Voltage Data Retention Characteristics +85°C)
Parameter Data retention supply voltage Data retention supply current IDDDR VDDDR Subsystem clock stop feedback resistor disconnected. Release signal time Oscillation stabilization wait time tSREL tWAIT Release RESET Release interrupt request Note
Symbol VDDDR
Conditions
MIN.
TYP.
MAX.
Unit
Note combination with bits (OSTS0 OSTS2) oscillation stabilization time select register (OSTS), selection 212/fXX 214/fXX 217/fXX possible. Data Retention Timing (STOP Mode Release RESET)
Internal reset operation HALT mode STOP mode Operating mode
Data retention mode
STOP instruction execution RESET
VDDDR tSREL
tWAIT
Data Retention Timing (Standby Release Signal: STOP Mode Release Interrupt Request Signal)
HALT mode STOP mode Operating mode
Data retention mode
STOP instruction execution Standby release signal (interrupt request)
VDDDR tSREL
tWAIT
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Interrupt Request Input Timing
tINTL
tINTH
INTP0 INTP5
RESET Input Timing
tRSL
RESET
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM Programming Characteristics Characteristics PROM write mode ±5°C, ±0.25 12.5 ±0.3
Parameter Input voltage, high Input voltage, Output voltage, high Output voltage, Input leakage current supply voltage supply voltage supply current supply current Symbol 12.2 6.25 12.5 Conditions MIN. 0.7VDD 12.8 6.75 TYP. MAX. 0.3VDD Unit
PROM read mode ±5°C, ±0.5 ±0.6
Parameter Input voltage, high Input voltage, Output voltage, high Symbol VOH1 VOH2 Output voltage, Input leakage current Output leakage current supply voltage supply voltage supply current supply current VIL, -100 VOUT VDD, Conditions MIN. 0.7VDD TYP. MAX. 0.3VDD Unit
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Characteristics PROM write mode Page program mode ±5°C, ±0.25 12.5 ±0.3
Parameter Address setup time setup time setup time Input data setup time Address hold time (from Symbol tOES tCES tAHL tAHV Input data hold time (from Data output float delay time from setup time setup time Program pulse width Valid data delay time from pulse width during data latching setup time hold time hold time tVPS tVDS tPGMS tCEH tOEH Conditions MIN. 0.095 0.105 TYP. MAX. Unit
Byte program mode ±5°C, ±0.25 12.5 ±0.3
Parameter Address setup time PGM) setup time setup time PGM) Input data setup time PGM) Address hold time (from Input data hold time (from PGM) Data output float delay time from setup time PGM) setup time PGM) Program pulse width Valid data delay time from hold time Symbol tOES tCES tVPS tVDS tOEH Conditions MIN. 0.095 0.105 TYP. MAX. Unit
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM read mode ±5°C, ±0.5 ±0.6
Parameter Data output delay time from address Data output delay time from Data output delay time from Data output float delay time from Data hold time from address Symbol tACC Conditions MIN. TYP. MAX. Unit
PROM programming mode setting 25°C,
Parameter PROM programming mode setup time Symbol tSMA Conditions MIN. TYP. MAX. Unit
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM Write Mode Timing (Page Program Mode)
Page data latch Page program Program verify
Hi-Z Hi-Z tPGMS Data output Hi-Z tAHL tAHV
tVPS tVDS
Data input
tCES tOES tCEH
tOEH
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM Write Mode Timing (Byte Program Mode)
Program Program verify
Hi-Z tVPS tOES tCES tVDS tOEH Hi-Z Hi-Z
Data input
Data output
Cautions should applied before VPP, after VPP. should exceed +13.5 including overshoot. Disconnection during application 12.5 have adverse effect reliability. PROM Read Mode Timing
Valid address
tACCNote Hi-Z tOENote Data output Hi-Z tDFNote
Notes want read within tACC range, make input delay time from fall maximum tACC tOE. time from when either first reaches VIH.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PROM Programming Mode Setting Timing
RESET
tSMA
Valid address
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
PACKAGE DRAWINGS
100-PIN PLASTIC LQFP (FINE PITCH) (14x14)
detail lead
NOTE Each lead centerline located within 0.08 true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 16.00±0.20 14.00±0.20 14.00±0.20 16.00±0.20 1.00 1.00 0.22 +0.05 -0.04 0.08 0.50 (T.P.) 1.00±0.20 0.50±0.20 0.17 +0.03 -0.07 0.08 1.40±0.05 0.10±0.05 1.60 MAX.
S100GC-50-8EU, 8EA-2
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
100-PIN PLASTIC (14x20)
detail lead
NOTE Each lead centerline located within 0.15 true position (T.P.) maximum material condition.
ITEM
MILLIMETERS 23.6±0.4 20.0±0.2 14.0±0.2 17.6±0.4 0.30±0.10 0.15 0.65 (T.P.) 1.8±0.2 0.8±0.2 0.15+0.10 -0.05 0.10 2.7±0.1 0.1±0.1 5°±5° MAX.
P100GF-65-3BA1-4
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
RECOMMENDED SOLDERING CONDITIONS
This product should soldered mounted under following recommended conditions. soldering methods conditions other than those recommended below, contact Electronics sales representative. technical information, following website. Semiconductor Device Mount Manual Table 9-1. Surface Mounting Type Soldering Conditions 100-pin plastic
µPD78P0308GF-3BA, 78P0308YGF-3BA
Soldering Method Infrared reflow Wave soldering Soldering Conditions Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: Three times less Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: Three times less Solder bath temperature: 260°C max., Time: seconds max., Count: Once, Preheating temperature: 120°C max. (package surface temperature) Partial heating temperature: 300°C max., Time: seconds max. (per row) Recommended Condition Symbol IR35-00-3 VP15-00-3 WS60-00-1
Caution different soldering methods together (except partial heating). 100-pin plastic LQFP (fine pitch)
µPD78P0308GC-8EU, 78P0308YGC-8EU
Soldering Method Infrared reflow Soldering Conditions Package peak temperature: 235°C, Time: seconds max. 210°C higher), Count: Twice less, Exposure limit: daysNote (after that, prebake 125°C hours) Package peak temperature: 215°C, Time: seconds max. 200°C higher), Count: Twice less, Exposure limit: daysNote (after that, prebake 125°C hours) temperature: 300°C max., Time: seconds max. (per row) Recommended Condition Symbol IR35-107-2
VP15-107-2
Partial heating
Note
After opening pack, store 25°C less less allowable storage period. different soldering methods together (except partial heating).
Caution
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
APPENDIX DEVELOPMENT TOOLS
following development tools provided system development using µPD78P0308 78P0308Y. Also refer Precautions When Using Development Tools. Software Package
SP78K0 CD-ROM which development tools (software) common 78K/0 Series products integrated package
Language Processing Software
RA78K0 CC78K0 DF780308 CC78K0-L Assembler package common 78K/0 Series products compiler package common 78K/0 Series products Device file µPD780308 780308Y Subseries products (part number: compiler library source file common 78K/0 Series products
PROM Write Tools
PG-1500 PA-78P0308GC PA-78P0308GF PG-1500 controller Control program PG-1500 PROM programmer Programmer adapter connected PG-1500
Debugging Tools When using IE-78K0-NS IE-78K0-NS-A in-circuit emulator
IE-78K0-NS IE-78K0-NS-PA IE-78K0-NS-A IE-70000-MC-PS-B IE-70000-98-IF-C In-circuit emulator common 78K/0 Series products Performance board enhance/expand functions IE-78K0-NS Combination IE-78K0-NS IE-78K0-NS-PA Power supply unit IE-78K0-NS Adapter required when using PC-9800 series (excluding notebook-type PCs) host machine supported) IE-70000-CD-IF-A card interface cable required when using notebook type host machine (PCMCIA socket supported) IE-70000-PC-IF-C Adapter required when using PC/ATcompatible host machine (ISA supported) IE-70000-PCI-IF-A IE-780308-NS-EM1 NP-100GC NP-H100GC-TQ NP-100GF NP-100GF-TQ NP-H100GF-TQ TGC-100SDW Conversion adapter connect NP-100GC NP-H100GC-TQ target system board made mounted 100-pin plastic LQFP (GC-8EU type) EV-9200GF-100 Conversion socket connect NP-100GF target system board made mounted 100-pin plastic (GF-3BA type) TGF-100RBP Conversion socket connect NP-100GF-TQ NP-H100GF-TQ target system board made mounted 100-pin plastic (GF-3BA type) ID78K0-NS SM78K0 DF780308 Integrated debugger IE-78K0-NS IE-78K0-NS-A System simulator common 78K/0 Series products Device file µPD780308 780308Y Subseries products (part number:
Data Sheet U11776EJ2V0DS
Adapter required when using with on-chip host machine Emulation board emulate µPD780308 780308Y Subseries products Emulation probe 100-pin plastic LQFP (GC-8EU type)
Emulation probe 100-pin plastic (GF-3BA type)
µPD78P0308, 78P0308Y
When using IE-78001-R-A in-circuit emulator
IE-78001-R-ANote IE-70000-98-IF-C In-circuit emulator common 78K/0 Series products Adapter required when using PC-9800 series (excluding notebook-type PCs) host machine supported) IE-70000-PC-IF-C Adapter required when using PC/AT compatible host machine (ISA supported) IE-70000-PCI-IF-A IE-780308-R-EM EP-78064GC-R EP-78064GF-R TGC-100SDW
Note
Adapter required when using with on-chip host machine Emulation board emulate µPD780308 780308Y Subseries products Emulation probe 100-pin plastic LQFP (GC-8EU type) Emulation probe 100-pin plastic (GF-3BA type) Conversion adapter connect EP-78064GC-R target system board made mounted 100-pin plastic LQFP (GC-8EU type)
EV-9200GF-100
Conversion socket connect EP-78064GF-R target system board made mounted 100-pin plastic (GF-3BA type)
ID78K0 SM78K0 DF780308
Integrated debugger IE-78001-R-A System simulator common 78K/0 Series products Device file µPD780308 780308Y Subseries products (part number:
Note Maintenance product Real-Time
RX78K0 Real-time 78K/0 Series products
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Precautions When Using Development Tools package name DF780308 DF78064. ID78K0-NS, ID78K0, SM78K0 combination with DF780308. CC78K0 RX78K0 combination with RA78K0 DF780308. NP-100GC, NP-H100GC-TQ, NP-100GF, NP-100GF-TQ, NP-H100GF-TQ products Naito Densei Machida Mfg. Co., Ltd. (tel: +81-45-475-4191). TGC-100SDW TGF-100RBP products TOKYO ELETECH CORPORATION. Contact: Daimaru Kogyo, Ltd. Tokyo Electronics Department (tel: +81-3-3820-7112) Osaka Electronics Department (tel: +81-6-6244-6672) Please refer Single-Chip Microcontroller Development Tools Selection Guide (U11069E) information third party development tools. following table shows software supported each host machine
Host machine [OS] Software RA78K0 CC78K0 PG-1500 controller ID78K0-NS ID78K0 SM78K0 RX78K0 PC-9800 series [Japanese Windows PC/AT compatibles [Japanese/English Windows] Note Note
Note
HP9000 series 700[HP-UXTM] SPARCstation[SunOSTM, SolarisTM]
Note
Note DOS-based software
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Drawing Conversion Adapter (TGC-100SDW)
Figure A-1. Drawing TGC-100SDW (for Reference Only)
Protrusion height
ITEM
MILLIMETERS 21.55 0.5x24=12 0.5x24=12 15.0 21.55
INCHES 0.848 0.020x0.945=0.472 0.020 0.020x0.945=0.472 0.591 0.848
ITEM
MILLIMETERS
14.45
INCHES
0.569
1.85±0.25
0.073±0.010
0.138 0.079
0.25
0.154 0.010
3.55
10.9 13.3 15.7 18.1 13.75 0.5x24=12.0 1.125±0.3 1.125±0.2 10.0 11.3 18.1
0.140
0.429 0.524 0.618 0.713 0.541 0.020x0.945=0.472 0.044±0.012 0.044±0.008 0.295 0.394 0.445 0.713
16.0 1.125±0.3 0~5°
0.177
0.630 0.044±0.012 0.000~0.197° 0.232 0.031 0.094 0.106
TGC-100SDW-G1E
0.197
0.197 0.051 0.071 0.079
0.035 0.012
note: Product TOKYO ELETECH CORPORATION.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Drawings Conversion Socket (EV-9200GF-100) Recommended Footprints
Figure A-2. Drawing EV-9200GF-100 (for Reference Only)
EV-9200GF-100
No.1 index
EV-9200GF-100-G0E ITEM MILLIMETERS 24.6 18.6 12.0 22.6 25.3 16.6 19.3 0.35 INCHES 0.969 0.827 0.591 0.732 0.079 0.031 0.472 0.89 0.996 0.236 0.654 0.76 0.323 0.315 0.098 0.079 0.014
0.091 0.059
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Figure A-3. Recommended Footprints EV-9200GF-100 (for Reference Only)
EV-9200GF-100-P1E ITEM MILLIMETERS 26.3 21.6 INCHES 1.035 0.85
0.65±0.02 29=18.85±0.05 0.026 +0.001 1.142=0.742+0.002 -0.002 -0.002 0.65±0.02 19=12.35±0.05 0.026 +0.001 0.748=0.486 +0.003 -0.002 -0.002 15.6 20.3 0.05 0.05 0.35 0.02 0.614 0.799 0.472 +0.003 -0.002 0.236 +0.003 -0.002 0.014 +0.001 -0.001
2.36 0.03 1.57 0.03
0.093+0.001 -0.002 0.091 0.062+0.001 -0.002
Caution Dimensions mount EV-9200 that target device (QFP) different some parts. recommended mount dimensions QFP, refer "SEMICONDUCTOR DEVICE MOUNT MANUAL" website
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
APPENDIX RELATED DOCUMENTS
related documents indicated this publication include preliminary versions. However, preliminary versions marked such. Documents Related Devices
Document Name Document U11377E U11105E U12251E This document U12326E Basic (III) U10182E
µPD780308, 780308Y Subseries User's Manual µPD780306, 780308 Data Sheet µPD780306Y, 780308Y Data Sheet µPD78P0308, 78P0308Y Data Sheet
78K/0 Series Instructions User's Manual 78K/0 Series Application Note
Documents Related Development Tools (Software) (User's Manuals)
Document Name RA78K0 Assembler Package Operation Language Structured Assembly Language CC78K0 Compiler Operation Language SM78K Series System Simulator Ver.2.30 Later Operation (Windows Based) External Part User Open Interface Specifications ID78K Series Integrated Debugger Ver.2.30 Later RX78K0 Real-Time Operation (Windows Based) Fundamentals Installation Project Manager Ver.3.12 Later (Windows Based) Document U14445E U14446E U11789E U14297E U14298E U15373E U15802E U15185E U11537E U11536E U14610E
Documents Related Development Tools (Hardware) (User's Manuals)
Document Name IE-78K0-NS In-Circuit Emulator IE-78K0-NS-A In-Circuit Emulator IE-78K0-NS-PA Performance Board IE-780308-NS-EM1 Emulation Board IE-78001-R-A In-Circuit Emulator IE-780308-R-EM Emulation Board Document U13731E U14889E prepared U13304E U14142E U11362E
Documents Related PROM Programming (User's Manuals)
Document Name PG-1500 PROM Programmer PG-1500 Controller PC-9800 series (MS-DOSTM) Based Document U11940E EEU-1291 U10540E
series DOSTM) Based
Caution
related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Other Documents
Document Name SEMICONDUCTOR SELECTION GUIDE Products Packages Semiconductor Device Mount Manual Quality Grades Semiconductor Devices Semiconductor Device Reliability/Quality Control System Guide Prevent Damage Semiconductor Devices Electrostatic Discharge (ESD) Document X13769X Note C11531E C10983E C11892E
Note "Semiconductor Device Mount Manual" website Caution related documents listed above subject change without notice. sure latest version each document designing.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
NOTES CMOS DEVICES
PRECAUTION AGAINST SEMICONDUCTORS Note: Strong electric field, when exposed device, cause destruction gate oxide ultimately degrade device operation. Steps must taken stop generation static electricity much possible, quickly dissipate once, when occurred. Environmental control must adequate. When dry, humidifier should used. recommended avoid using insulators that easily build static electricity. Semiconductor devices must stored transported anti-static container, static shielding conductive material. test measurement tools including work bench floor should grounded. operator should grounded using wrist strap. Semiconductor devices must touched with bare hands. Similar precautions need taken boards with semiconductor devices HANDLING UNUSED INPUT PINS CMOS Note: connection CMOS device inputs cause malfunction. connection provided input pins, possible that internal input level generated noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar NMOS devices. Input levels CMOS devices must fixed high using pull-up pull-down circuitry. Each unused should connected with resistor, considered have possibility being output pin. handling related unused pins must judged device device related specifications governing devices. STATUS BEFORE INITIALIZATION DEVICES Note: Power-on does necessarily define initial status device. Production process does define initial operation status device. Immediately after power source turned devices with reset function have been initialized. Hence, power-on does guarantee out-pin levels, settings contents registers. Device initialized until reset signal received. Reset operation must executed immediately after power-on devices having reset function.
Purchase Electronics components conveys license under Philips Patent Rights these components system, provided that system conforms Standard Specification defined Philips.
IEBus trademarks Electronics Corporation. MS-DOS Windows either registered trademarks trademarks Microsoft Corporation United States and/or other countries. PC/AT trademarks International Business Machines Corporation. HP9000 series HP-UX trademarks Hewlett-Packard Company. SPARCstation trademark SPARC International, Inc. Solaris SunOS trademarks Microsystems, Inc.
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
Regional Information
Some information contained this document vary from country country. Before using Electronics product your application, pIease contact Electronics office your country obtain list authorized representatives distributors. They will verify:
Device availability Ordering information Product release schedule Availability related technical literature Development environment specifications (for example, specifications third-party tools components, host computers, power plugs, supply voltages, forth) Network requirements
addition, trademarks, registered trademarks, export restrictions, other legal issues also vary from country country. [GLOBAL SUPPORT]
Electronics America, Inc. (U.S.)
Santa Clara, California Tel: 408-588-6000 800-366-9782
Electronics (Europe) GmbH
Duesseldorf, Germany Tel: 0211-65 Sucursal Madrid, Spain Tel: 091-504 Succursale France Tel: 01-30-67 Filiale Italiana Milano, Italy Tel: 02-66 Branch Netherlands Eindhoven, Netherlands Tel: 040-244 Tyskland Filial Taeby, Sweden Tel: 08-63 United Kingdom Branch Milton Keynes, Tel: 01908-691-133
Electronics Hong Kong Ltd.
Hong Kong Tel: 2886-9318
Electronics Hong Kong Ltd.
Seoul Branch Seoul, Korea Tel: 02-558-3737
Electronics Shanghai, Ltd.
Shanghai, P.R. China Tel: 021-6841-1138
Electronics Taiwan Ltd.
Taipei, Taiwan Tel: 02-2719-2377
Electronics Singapore Pte. Ltd.
Novena Square, Singapore Tel: 6253-8311
J03.4
Data Sheet U11776EJ2V0DS
µPD78P0308, 78P0308Y
These commodities, technology software, must exported accordance with export administration regulations exporting country. Diversion contrary that country prohibited.
information this document current June, 2003. information subject change without notice. actual design-in, refer latest publications Electronics data sheets data books, etc., most up-to-date specifications Electronics products. products and/or types available every country. Please check with Electronics sales representative availability additional information. part this document copied reproduced form means without prior written consent Electronics. Electronics assumes responsibility errors that appear this document. Electronics does assume liability infringement patents, copyrights other intellectual property rights third parties arising from Electronics products listed this document other liability arising from such products. license, express, implied otherwise, granted under patents, copyrights other intellectual property rights Electronics others. Descriptions circuits, software other related information this document provided illustrative purposes semiconductor product operation application examples. incorporation these circuits, software information design customer's equipment shall done under full responsibility customer. Electronics assumes responsibility losses incurred customers third parties arising from these circuits, software information. While Electronics endeavors enhance quality, reliability safety Electronics products, customers agree acknowledge that possibility defects thereof cannot eliminated entirely. minimize risks damage property injury (including death) persons arising from defects Electronics products, customers must incorporate sufficient safety measures their design, such redundancy, fire-containment anti-failure features. Electronics products classified into following three quality grades: "Standard", "Special" "Specific". "Specific" quality grade applies only Electronics products developed based customerdesignated "quality assurance program" specific application. recommended applications Electronics product depend quality grade, indicated below. Customers must check quality grade each Electronics product before using particular application. "Standard": Computers, office equipment, communications equipment, test measurement equipment, audio visual equipment, home electronic appliances, machine tools, personal electronic equipment industrial robots. "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment medical equipment (not specifically designed life support). "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems medical equipment life support, etc. quality grade Electronics products "Standard" unless otherwise expressly specified Electronics data sheets data books, etc. customers wish Electronics products applications intended Electronics, they must contact Electronics sales representative advance determine Electronics' willingness support given application. (Note) "NEC Electronics" used this statement means Electronics Corporation also includes majority-owned subsidiaries. "NEC Electronics products" means product developed manufactured Electronics defined above).
11-1

µPD78P0308, 78P0308Y 8-BIT SINGLE-CHIP MICROCONTROLLERS DESC

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